| Message ID | 20201228161107.11804-3-miquel.raynal@bootlin.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Silvaco I3C master driver | expand |
On Mon, Dec 28, 2020 at 05:11:05PM +0100, Miquel Raynal wrote: > Silvaco provide a dual-role I3C master. > > Description is rather simple: it needs a register mapping, three > clocks and an interrupt. > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > --- > .../bindings/i3c/silvaco,i3c-master.yaml | 63 +++++++++++++++++++ > 1 file changed, 63 insertions(+) > create mode 100644 Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml > > diff --git a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml > new file mode 100644 > index 000000000000..509de48455b0 > --- /dev/null > +++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml > @@ -0,0 +1,63 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Silvaco I3C master > + > +maintainers: > + - Conor Culhane <conor.culhane@silvaco.com> > + > +properties: > + compatible: > + const: silvaco,i3c-master Kind of generic. Only 1 version? > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: pclk, the system clock > + - description: fast_clk, for the bus > + - description: slow_clk, for other events The names of the clocks go... > + > + clock-names: > + minItems: 3 > + maxItems: 3 here. > + > + resets: > + maxItems: 1 > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 0 This 2 should be defined by a bus binding. Care to convert i3c.txt? > + > +required: > + - compatible > + - reg > + - interrupts > + - clock-names > + - clocks > + - "#address-cells" > + - "#size-cells" > + > +additionalProperties: false No, don't you need child nodes? > + > +examples: > + - | > + i3c-master@a0000000 { > + compatible = "silvaco,i3c-master"; > + clocks = <&zynqmp_clk 71>, <&fclk>, <&sclk>; > + clock-names = "pclk", "fast_clk", "slow_clk"; > + interrupt-parent = <&gic>; > + interrupts = <0 89 4>; > + reg = <0xa0000000 0x1000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > -- > 2.20.1 >
Hi Rob, > > +properties: > > + compatible: > > + const: silvaco,i3c-master > > Kind of generic. Only 1 version? I appended a -v1 because I have no clue of the numbering neither if more versions will actually come. [...] > > + > > + clocks: > > + items: > > + - description: pclk, the system clock > > + - description: fast_clk, for the bus > > + - description: slow_clk, for other events > > The names of the clocks go... Issues corrected. [...] > > + > > + "#address-cells": > > + const: 1 > > + > > + "#size-cells": > > + const: 0 > > This 2 should be defined by a bus binding. Care to convert i3c.txt? Please see v4 of this series, which includes a converstion attempt to i3c.yaml. I am far from comfortable with yaml schema but, let's see what you think. Thanks, Miquèl
diff --git a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml new file mode 100644 index 000000000000..509de48455b0 --- /dev/null +++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silvaco I3C master + +maintainers: + - Conor Culhane <conor.culhane@silvaco.com> + +properties: + compatible: + const: silvaco,i3c-master + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: pclk, the system clock + - description: fast_clk, for the bus + - description: slow_clk, for other events + + clock-names: + minItems: 3 + maxItems: 3 + + resets: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - clock-names + - clocks + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + i3c-master@a0000000 { + compatible = "silvaco,i3c-master"; + clocks = <&zynqmp_clk 71>, <&fclk>, <&sclk>; + clock-names = "pclk", "fast_clk", "slow_clk"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + reg = <0xa0000000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + };
Silvaco provide a dual-role I3C master. Description is rather simple: it needs a register mapping, three clocks and an interrupt. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- .../bindings/i3c/silvaco,i3c-master.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml