Message ID | 20210114181751.768687-1-jackmanb@google.com (mailing list archive) |
---|---|
Headers | show |
Series | Atomics for eBPF | expand |
Hello: This series was applied to bpf/bpf-next.git (refs/heads/master): On Thu, 14 Jan 2021 18:17:40 +0000 you wrote: > There's still one unresolved review comment from John[3] which I > will resolve with a followup patch. > > Differences from v6->v7 [1]: > > * Fixed riscv build error detected by 0-day robot. > > [...] Here is the summary with links: - [bpf-next,v7,01/11] bpf: x86: Factor out emission of ModR/M for *(reg + off) https://git.kernel.org/bpf/bpf-next/c/11c11d0751fc - [bpf-next,v7,02/11] bpf: x86: Factor out emission of REX byte https://git.kernel.org/bpf/bpf-next/c/74007cfc1f71 - [bpf-next,v7,03/11] bpf: x86: Factor out a lookup table for some ALU opcodes https://git.kernel.org/bpf/bpf-next/c/e5f02caccfae - [bpf-next,v7,04/11] bpf: Rename BPF_XADD and prepare to encode other atomics in .imm https://git.kernel.org/bpf/bpf-next/c/91c960b00566 - [bpf-next,v7,05/11] bpf: Move BPF_STX reserved field check into BPF_STX verifier code https://git.kernel.org/bpf/bpf-next/c/c5bcb5eb4db6 - [bpf-next,v7,06/11] bpf: Add BPF_FETCH field / create atomic_fetch_add instruction https://git.kernel.org/bpf/bpf-next/c/5ca419f2864a - [bpf-next,v7,07/11] bpf: Add instructions for atomic_[cmp]xchg https://git.kernel.org/bpf/bpf-next/c/5ffa25502b5a - [bpf-next,v7,08/11] bpf: Pull out a macro for interpreting atomic ALU operations https://git.kernel.org/bpf/bpf-next/c/462910670e4a - [bpf-next,v7,09/11] bpf: Add bitwise atomic instructions https://git.kernel.org/bpf/bpf-next/c/981f94c3e921 - [bpf-next,v7,10/11] bpf: Add tests for new BPF atomic operations https://git.kernel.org/bpf/bpf-next/c/98d666d05a1d - [bpf-next,v7,11/11] bpf: Document new atomic instructions https://git.kernel.org/bpf/bpf-next/c/de948576f8e7 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
On Thu, Jan 14, 2021 at 10:18 AM Brendan Jackman <jackmanb@google.com> wrote: > > There's still one unresolved review comment from John[3] which I > will resolve with a followup patch. > > Differences from v6->v7 [1]: > > * Fixed riscv build error detected by 0-day robot. Applied. Thanks a lot. Please address John's request in a followup and these few issues: - rst doesn't look correct. Example: rst2man Documentation/networking/filter.rst >/dev/null Documentation/networking/filter.rst:1053: (WARNING/2) Inline emphasis start-string without end-string. > Except ``BPF_ADD`` _without_ ``BPF_FETCH`` (for legacy reasons), all 4 byte > atomic operations require alu32 mode. Clang enables this mode by default in > architecture v3 (``-mcpu=v3``). For older versions it can be enabled with > ``-Xclang -target-feature -Xclang +alu32``. It reads confusing to me. I would rephrase 'clang enables this mode by default' into 'clang can generate new atomic instruction when -mcpu=v3 is enabled'. 'For older versions...' This part I didn't get. The users need clang 12 that is capable to emit these insns. What 'older versions' you're talking about?