| Message ID | 20210121095420.5023-2-wsa+renesas@sang-engineering.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | v3u: add support for I2C | expand |
On Thu, Jan 21, 2021 at 10:56 AM Wolfram Sang <wsa+renesas@sang-engineering.com> wrote: > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> > --- > > Changes since v1: > * use S1D4 as parent clock as described in the datasheet Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-clk-for-v5.12. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index ef45b7c10074..613f7b499cfc 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -166,6 +166,13 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { DEF_MOD("hscif1", 515, R8A779A0_CLK_S1D2), DEF_MOD("hscif2", 516, R8A779A0_CLK_S1D2), DEF_MOD("hscif3", 517, R8A779A0_CLK_S1D2), + DEF_MOD("i2c0", 518, R8A779A0_CLK_S1D4), + DEF_MOD("i2c1", 519, R8A779A0_CLK_S1D4), + DEF_MOD("i2c2", 520, R8A779A0_CLK_S1D4), + DEF_MOD("i2c3", 521, R8A779A0_CLK_S1D4), + DEF_MOD("i2c4", 522, R8A779A0_CLK_S1D4), + DEF_MOD("i2c5", 523, R8A779A0_CLK_S1D4), + DEF_MOD("i2c6", 524, R8A779A0_CLK_S1D4), DEF_MOD("msi0", 618, R8A779A0_CLK_MSO), DEF_MOD("msi1", 619, R8A779A0_CLK_MSO), DEF_MOD("msi2", 620, R8A779A0_CLK_MSO),
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- Changes since v1: * use S1D4 as parent clock as described in the datasheet drivers/clk/renesas/r8a779a0-cpg-mssr.c | 7 +++++++ 1 file changed, 7 insertions(+)