| Message ID | 20201106011637.14289-10-weijiang.yang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce support for guest CET feature | expand |
On 06/11/20 02:16, Yang Weijiang wrote: > Report all CET MSRs, including the synthetic GUEST_SSP MSR, as > to-be-saved, e.g. for migration, if CET is supported by KVM. > > Co-developed-by: Sean Christopherson <sean.j.christopherson@intel.com> > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com> > --- > arch/x86/kvm/x86.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 751b62e871e5..d573cadf5baf 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -1248,6 +1248,8 @@ static const u32 msrs_to_save_all[] = { > MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17, > > MSR_IA32_XSS, > + MSR_IA32_U_CET, MSR_IA32_S_CET, MSR_IA32_INT_SSP_TAB, MSR_KVM_GUEST_SSP, > + MSR_IA32_PL0_SSP, MSR_IA32_PL1_SSP, MSR_IA32_PL2_SSP, MSR_IA32_PL3_SSP, > }; > > static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)]; > @@ -5761,6 +5763,13 @@ static void kvm_init_msr_list(void) > if (!supported_xss) > continue; > break; > + case MSR_IA32_U_CET: > + case MSR_IA32_S_CET: > + case MSR_IA32_INT_SSP_TAB: > + case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP: > + if (!kvm_cet_supported()) > + continue; > + break; > default: > break; > } > Missing "case MSR_KVM_GUEST_SSP". Paolo
On Thu, Jan 28, 2021 at 06:46:37PM +0100, Paolo Bonzini wrote: > On 06/11/20 02:16, Yang Weijiang wrote: > > Report all CET MSRs, including the synthetic GUEST_SSP MSR, as > > to-be-saved, e.g. for migration, if CET is supported by KVM. > > > > Co-developed-by: Sean Christopherson <sean.j.christopherson@intel.com> > > Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> > > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com> > > --- > > arch/x86/kvm/x86.c | 9 +++++++++ > > 1 file changed, 9 insertions(+) > > > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > > index 751b62e871e5..d573cadf5baf 100644 > > --- a/arch/x86/kvm/x86.c > > +++ b/arch/x86/kvm/x86.c > > @@ -1248,6 +1248,8 @@ static const u32 msrs_to_save_all[] = { > > MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17, > > MSR_IA32_XSS, > > + MSR_IA32_U_CET, MSR_IA32_S_CET, MSR_IA32_INT_SSP_TAB, MSR_KVM_GUEST_SSP, > > + MSR_IA32_PL0_SSP, MSR_IA32_PL1_SSP, MSR_IA32_PL2_SSP, MSR_IA32_PL3_SSP, > > }; > > static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)]; > > @@ -5761,6 +5763,13 @@ static void kvm_init_msr_list(void) > > if (!supported_xss) > > continue; > > break; > > + case MSR_IA32_U_CET: > > + case MSR_IA32_S_CET: > > + case MSR_IA32_INT_SSP_TAB: > > + case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP: > > + if (!kvm_cet_supported()) > > + continue; > > + break; > > default: > > break; > > } > > > > Missing "case MSR_KVM_GUEST_SSP". > OK, will fix it in next version. > Paolo
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 751b62e871e5..d573cadf5baf 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1248,6 +1248,8 @@ static const u32 msrs_to_save_all[] = { MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17, MSR_IA32_XSS, + MSR_IA32_U_CET, MSR_IA32_S_CET, MSR_IA32_INT_SSP_TAB, MSR_KVM_GUEST_SSP, + MSR_IA32_PL0_SSP, MSR_IA32_PL1_SSP, MSR_IA32_PL2_SSP, MSR_IA32_PL3_SSP, }; static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)]; @@ -5761,6 +5763,13 @@ static void kvm_init_msr_list(void) if (!supported_xss) continue; break; + case MSR_IA32_U_CET: + case MSR_IA32_S_CET: + case MSR_IA32_INT_SSP_TAB: + case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP: + if (!kvm_cet_supported()) + continue; + break; default: break; }