| Message ID | 20210130022618.317351-2-saeed@kernel.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | bdbc13c204ee3e742289730618002ff9f21109bf |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net-next,01/11] net/mlx5: DR, Fix potential shift wrapping of 32-bit value | expand |
| Context | Check | Description |
|---|---|---|
| netdev/cover_letter | warning | Series does not have a cover letter |
| netdev/fixes_present | success | Link |
| netdev/patch_count | success | Link |
| netdev/tree_selection | success | Clearly marked for net-next |
| netdev/subject_prefix | success | Link |
| netdev/cc_maintainers | warning | 2 maintainers not CCed: leon@kernel.org markb@mellanox.com |
| netdev/source_inline | success | Was 0 now: 0 |
| netdev/verify_signedoff | success | Link |
| netdev/module_param | success | Was 0 now: 0 |
| netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
| netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| netdev/verify_fixes | success | Link |
| netdev/checkpatch | warning | WARNING: line length of 83 exceeds 80 columns WARNING: line length of 92 exceeds 80 columns |
| netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
| netdev/header_inline | success | Link |
| netdev/stable | success | Stable not CCed |
Hello: This series was applied to netdev/net-next.git (refs/heads/master): On Fri, 29 Jan 2021 18:26:08 -0800 you wrote: > From: Yevgeny Kliteynik <kliteyn@nvidia.com> > > Fix 32-bit variable shift wrapping in dr_ste_v0_get_miss_addr. > > Fixes: 6b93b400aa88 ("net/mlx5: DR, Move STEv0 setters and getters") > Reported-by: Dan Carpenter <dan.carpenter@oracle.com> > Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> > Reviewed-by: Alex Vesker <valex@nvidia.com> > Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> > > [...] Here is the summary with links: - [net-next,01/11] net/mlx5: DR, Fix potential shift wrapping of 32-bit value https://git.kernel.org/netdev/net-next/c/bdbc13c204ee - [net-next,02/11] net/mlx5: DR, Add match STEv1 structs to ifc https://git.kernel.org/netdev/net-next/c/3a77c238909b - [net-next,03/11] net/mlx5: DR, Add HW STEv1 match logic https://git.kernel.org/netdev/net-next/c/10b694186410 - [net-next,04/11] net/mlx5: DR, Allow native protocol support for HW STEv1 https://git.kernel.org/netdev/net-next/c/9f125ced1750 - [net-next,05/11] net/mlx5: DR, Add STEv1 setters and getters https://git.kernel.org/netdev/net-next/c/a6098129c781 - [net-next,06/11] net/mlx5: DR, Add STEv1 action apply logic https://git.kernel.org/netdev/net-next/c/4e856c5db9b4 - [net-next,07/11] net/mlx5: DR, Add STEv1 modify header logic https://git.kernel.org/netdev/net-next/c/c349b4137cfd - [net-next,08/11] net/mlx5: DR, Use the right size when writing partial STE into HW https://git.kernel.org/netdev/net-next/c/f06d496985f4 - [net-next,09/11] net/mlx5: DR, Use HW specific logic API when writing STE https://git.kernel.org/netdev/net-next/c/4fe45e1d31ef - [net-next,10/11] net/mlx5: DR, Copy all 64B whenever replacing STE in the head of miss-list https://git.kernel.org/netdev/net-next/c/8fdac12acf32 - [net-next,11/11] net/mlx5: DR, Allow SW steering for sw_owner_v2 devices https://git.kernel.org/netdev/net-next/c/64f45c0fc4c7 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c index b76fdff08890..9ec079247c4b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c @@ -248,8 +248,8 @@ static void dr_ste_v0_set_miss_addr(u8 *hw_ste_p, u64 miss_addr) static u64 dr_ste_v0_get_miss_addr(u8 *hw_ste_p) { u64 index = - (MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) | - MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32) << 26); + ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) | + ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32)) << 26); return index << 6; }