diff mbox series

[RFC,1/4] include/standard-headers/linux/pci_regs: temp hack to add necessary DOE definitions.

Message ID 20210201151629.29656-2-Jonathan.Cameron@huawei.com (mailing list archive)
State New, archived
Headers show
Series hw/cxl/ + /hw/pci/: PCI DOE + CXL CDAT emulation | expand

Commit Message

Jonathan Cameron Feb. 1, 2021, 3:16 p.m. UTC
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 include/standard-headers/linux/pci_regs.h | 33 ++++++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

Comments

Ben Widawsky Feb. 2, 2021, 3:39 p.m. UTC | #1
On 21-02-01 23:16:26, Jonathan Cameron wrote:
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
>  include/standard-headers/linux/pci_regs.h | 33 ++++++++++++++++++++++-
>  1 file changed, 32 insertions(+), 1 deletion(-)
> 
> diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h
> index e709ae8235..7e852d3dd0 100644
> --- a/include/standard-headers/linux/pci_regs.h
> +++ b/include/standard-headers/linux/pci_regs.h
> @@ -730,7 +730,8 @@
>  #define PCI_EXT_CAP_ID_DVSEC	0x23	/* Designated Vendor-Specific */
>  #define PCI_EXT_CAP_ID_DLF	0x25	/* Data Link Feature */
>  #define PCI_EXT_CAP_ID_PL_16GT	0x26	/* Physical Layer 16.0 GT/s */
> -#define PCI_EXT_CAP_ID_MAX	PCI_EXT_CAP_ID_PL_16GT
> +#define PCI_EXT_CAP_ID_DOE	0x2E	/* Data Object Exchange */
> +#define PCI_EXT_CAP_ID_MAX	PCI_EXT_CAP_ID_DOE
>  
>  #define PCI_EXT_CAP_DSN_SIZEOF	12
>  #define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
> @@ -1092,4 +1093,34 @@
>  #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK		0x000000F0
>  #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT	4
>  
> +/* Data Object Exchange */
> +#define PCI_DOE_CAP		0x04
> +#define  PCI_DOE_CAP_INT_SUPPORT			0x00000001
> +#define  PCI_DOE_CAP_INT_MSG_NUM			0x00000FFE
> +
> +#define PCI_DOE_CTRL		0x08
> +#define  PCI_DOE_CTRL_DOE_ABORT				0x00000001
> +#define  PCI_DOE_CTRL_DOE_INT_EN			0x00000002
> +#define  PCI_DOE_CTRL_DOE_GO				0x80000000
> +
> +#define PCI_DOE_STATUS		0x0c
> +#define  PCI_DOE_STATUS_DOE_BUSY			0x00000001
> +#define  PCI_DOE_STATUS_INT_STATUS			0x00000002
> +#define  PCI_DOE_STATUS_DOE_ERROR			0x00000004
> +#define  PCI_DOE_STATUS_DATA_OBJECT_READY		0x80000000
> +
> +#define PCI_DOE_WRITE_MAILBOX	0x10
> +#define PCI_DOE_READ_MAILBOX	0x14
> +
> +/* Data Object Format DOE ECN 6.xx.1 */
> +#define PCI_DATA_OBJ_DW0_VID				0x0000ffff
> +#define PCI_DATA_OBJ_DW0_TYPE				0x00ff0000
> +#define PCI_DATA_OBJ_DW1_LEN				0x0003ffff
> +
> +/* DOE Discover Data Object */
> +#define PCI_DOE_DIS_OBJ_TYPE	 0x1
> +#define PCI_DOE_DIS_REQ_D0_DW0_INDEX			0x000000ff
> +#define PCI_DOE_DIS_RSP_DO_DW0_VID			0x0000ffff
> +#define PCI_DOE_DIS_RSP_D0_DW0_PROT			0x00ff0000
> +#define PCI_DOE_DIS_RSP_D0_DW0_NEXT_INDEX		0xff000000
>  #endif /* LINUX_PCI_REGS_H */

I think a lot of these should have had _MASK at the end.

As for the accuracy of the values, lgtm.
Michael S. Tsirkin Feb. 2, 2021, 11:13 p.m. UTC | #2
On Tue, Feb 02, 2021 at 07:39:51AM -0800, Ben Widawsky wrote:
> On 21-02-01 23:16:26, Jonathan Cameron wrote:
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > ---
> >  include/standard-headers/linux/pci_regs.h | 33 ++++++++++++++++++++++-
> >  1 file changed, 32 insertions(+), 1 deletion(-)
> > 
> > diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h
> > index e709ae8235..7e852d3dd0 100644
> > --- a/include/standard-headers/linux/pci_regs.h
> > +++ b/include/standard-headers/linux/pci_regs.h
> > @@ -730,7 +730,8 @@
> >  #define PCI_EXT_CAP_ID_DVSEC	0x23	/* Designated Vendor-Specific */
> >  #define PCI_EXT_CAP_ID_DLF	0x25	/* Data Link Feature */
> >  #define PCI_EXT_CAP_ID_PL_16GT	0x26	/* Physical Layer 16.0 GT/s */
> > -#define PCI_EXT_CAP_ID_MAX	PCI_EXT_CAP_ID_PL_16GT
> > +#define PCI_EXT_CAP_ID_DOE	0x2E	/* Data Object Exchange */
> > +#define PCI_EXT_CAP_ID_MAX	PCI_EXT_CAP_ID_DOE
> >  
> >  #define PCI_EXT_CAP_DSN_SIZEOF	12
> >  #define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
> > @@ -1092,4 +1093,34 @@
> >  #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK		0x000000F0
> >  #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT	4
> >  
> > +/* Data Object Exchange */
> > +#define PCI_DOE_CAP		0x04
> > +#define  PCI_DOE_CAP_INT_SUPPORT			0x00000001
> > +#define  PCI_DOE_CAP_INT_MSG_NUM			0x00000FFE
> > +
> > +#define PCI_DOE_CTRL		0x08
> > +#define  PCI_DOE_CTRL_DOE_ABORT				0x00000001
> > +#define  PCI_DOE_CTRL_DOE_INT_EN			0x00000002
> > +#define  PCI_DOE_CTRL_DOE_GO				0x80000000
> > +
> > +#define PCI_DOE_STATUS		0x0c
> > +#define  PCI_DOE_STATUS_DOE_BUSY			0x00000001
> > +#define  PCI_DOE_STATUS_INT_STATUS			0x00000002
> > +#define  PCI_DOE_STATUS_DOE_ERROR			0x00000004
> > +#define  PCI_DOE_STATUS_DATA_OBJECT_READY		0x80000000
> > +
> > +#define PCI_DOE_WRITE_MAILBOX	0x10
> > +#define PCI_DOE_READ_MAILBOX	0x14
> > +
> > +/* Data Object Format DOE ECN 6.xx.1 */
> > +#define PCI_DATA_OBJ_DW0_VID				0x0000ffff
> > +#define PCI_DATA_OBJ_DW0_TYPE				0x00ff0000
> > +#define PCI_DATA_OBJ_DW1_LEN				0x0003ffff
> > +
> > +/* DOE Discover Data Object */
> > +#define PCI_DOE_DIS_OBJ_TYPE	 0x1
> > +#define PCI_DOE_DIS_REQ_D0_DW0_INDEX			0x000000ff
> > +#define PCI_DOE_DIS_RSP_DO_DW0_VID			0x0000ffff
> > +#define PCI_DOE_DIS_RSP_D0_DW0_PROT			0x00ff0000
> > +#define PCI_DOE_DIS_RSP_D0_DW0_NEXT_INDEX		0xff000000
> >  #endif /* LINUX_PCI_REGS_H */
> 
> I think a lot of these should have had _MASK at the end.
> 
> As for the accuracy of the values, lgtm.

just add them in the source file where they are used.
standard-headers are over-written by scripts, adding
your own macros there won't help.
diff mbox series

Patch

diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-headers/linux/pci_regs.h
index e709ae8235..7e852d3dd0 100644
--- a/include/standard-headers/linux/pci_regs.h
+++ b/include/standard-headers/linux/pci_regs.h
@@ -730,7 +730,8 @@ 
 #define PCI_EXT_CAP_ID_DVSEC	0x23	/* Designated Vendor-Specific */
 #define PCI_EXT_CAP_ID_DLF	0x25	/* Data Link Feature */
 #define PCI_EXT_CAP_ID_PL_16GT	0x26	/* Physical Layer 16.0 GT/s */
-#define PCI_EXT_CAP_ID_MAX	PCI_EXT_CAP_ID_PL_16GT
+#define PCI_EXT_CAP_ID_DOE	0x2E	/* Data Object Exchange */
+#define PCI_EXT_CAP_ID_MAX	PCI_EXT_CAP_ID_DOE
 
 #define PCI_EXT_CAP_DSN_SIZEOF	12
 #define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
@@ -1092,4 +1093,34 @@ 
 #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK		0x000000F0
 #define  PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT	4
 
+/* Data Object Exchange */
+#define PCI_DOE_CAP		0x04
+#define  PCI_DOE_CAP_INT_SUPPORT			0x00000001
+#define  PCI_DOE_CAP_INT_MSG_NUM			0x00000FFE
+
+#define PCI_DOE_CTRL		0x08
+#define  PCI_DOE_CTRL_DOE_ABORT				0x00000001
+#define  PCI_DOE_CTRL_DOE_INT_EN			0x00000002
+#define  PCI_DOE_CTRL_DOE_GO				0x80000000
+
+#define PCI_DOE_STATUS		0x0c
+#define  PCI_DOE_STATUS_DOE_BUSY			0x00000001
+#define  PCI_DOE_STATUS_INT_STATUS			0x00000002
+#define  PCI_DOE_STATUS_DOE_ERROR			0x00000004
+#define  PCI_DOE_STATUS_DATA_OBJECT_READY		0x80000000
+
+#define PCI_DOE_WRITE_MAILBOX	0x10
+#define PCI_DOE_READ_MAILBOX	0x14
+
+/* Data Object Format DOE ECN 6.xx.1 */
+#define PCI_DATA_OBJ_DW0_VID				0x0000ffff
+#define PCI_DATA_OBJ_DW0_TYPE				0x00ff0000
+#define PCI_DATA_OBJ_DW1_LEN				0x0003ffff
+
+/* DOE Discover Data Object */
+#define PCI_DOE_DIS_OBJ_TYPE	 0x1
+#define PCI_DOE_DIS_REQ_D0_DW0_INDEX			0x000000ff
+#define PCI_DOE_DIS_RSP_DO_DW0_VID			0x0000ffff
+#define PCI_DOE_DIS_RSP_D0_DW0_PROT			0x00ff0000
+#define PCI_DOE_DIS_RSP_D0_DW0_NEXT_INDEX		0xff000000
 #endif /* LINUX_PCI_REGS_H */