| Message ID | 20210203065027.314622-1-like.xu@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: vmx/pmu: Add VMCS fields check before exposing LBR_FMT | expand |
On 03/02/21 07:50, Like Xu wrote: > Before KVM exposes guest LBR_FMT perf capabilities, it needs to check > whether VMCS has GUEST_IA32_DEBUGCTL guest status field and vmx switch > support on IA32_DEBUGCTL MSR (including VM_EXIT_SAVE_DEBUG_CONTROLS > and VM_ENTRY_LOAD_DEBUG_CONTROLS). It helps nested LBR enablement. > > Signed-off-by: Like Xu <like.xu@linux.intel.com> > --- > arch/x86/kvm/vmx/capabilities.h | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h > index d1d77985e889..ac3af06953a8 100644 > --- a/arch/x86/kvm/vmx/capabilities.h > +++ b/arch/x86/kvm/vmx/capabilities.h > @@ -378,6 +378,12 @@ static inline bool vmx_pt_mode_is_host_guest(void) > return pt_mode == PT_MODE_HOST_GUEST; > } > > +static inline bool cpu_has_vmx_lbr(void) > +{ > + return (vmcs_config.vmexit_ctrl & VM_EXIT_SAVE_DEBUG_CONTROLS) && > + (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_DEBUG_CONTROLS); > +} > + > static inline u64 vmx_get_perf_capabilities(void) > { > u64 perf_cap = 0; > @@ -385,7 +391,8 @@ static inline u64 vmx_get_perf_capabilities(void) > if (boot_cpu_has(X86_FEATURE_PDCM)) > rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap); > > - perf_cap &= PMU_CAP_LBR_FMT; > + if (cpu_has_vmx_lbr()) > + perf_cap &= PMU_CAP_LBR_FMT; This is incorrect in the case where cpu_has_vmx_lbr() is false. You would need something like u64 perf_cap = 0; u64 host_perf_cap = 0; if (boot_cpu_has(X86_FEATURE_PDCM)) rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap); if (cpu_has_vmx_lbr()) perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT; However, KVM won't run without VM_ENTRY_LOAD_DEBUG_CONTROLS and VM_EXIT_SAVE_DEBUG_CONTROLS (see setup_vmcs_config), so this change is not needed either. Paolo
diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h index d1d77985e889..ac3af06953a8 100644 --- a/arch/x86/kvm/vmx/capabilities.h +++ b/arch/x86/kvm/vmx/capabilities.h @@ -378,6 +378,12 @@ static inline bool vmx_pt_mode_is_host_guest(void) return pt_mode == PT_MODE_HOST_GUEST; } +static inline bool cpu_has_vmx_lbr(void) +{ + return (vmcs_config.vmexit_ctrl & VM_EXIT_SAVE_DEBUG_CONTROLS) && + (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_DEBUG_CONTROLS); +} + static inline u64 vmx_get_perf_capabilities(void) { u64 perf_cap = 0; @@ -385,7 +391,8 @@ static inline u64 vmx_get_perf_capabilities(void) if (boot_cpu_has(X86_FEATURE_PDCM)) rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap); - perf_cap &= PMU_CAP_LBR_FMT; + if (cpu_has_vmx_lbr()) + perf_cap &= PMU_CAP_LBR_FMT; /* * Since counters are virtualized, KVM would support full
Before KVM exposes guest LBR_FMT perf capabilities, it needs to check whether VMCS has GUEST_IA32_DEBUGCTL guest status field and vmx switch support on IA32_DEBUGCTL MSR (including VM_EXIT_SAVE_DEBUG_CONTROLS and VM_ENTRY_LOAD_DEBUG_CONTROLS). It helps nested LBR enablement. Signed-off-by: Like Xu <like.xu@linux.intel.com> --- arch/x86/kvm/vmx/capabilities.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)