| Message ID | 20210203225547.32221-3-yu-cheng.yu@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Control-flow Enforcement: Shadow Stack | expand |
On Wed, Feb 03, 2021 at 02:55:24PM -0800, Yu-cheng Yu wrote: > Shadow Stack provides protection against function return address > corruption. It is active when the processor supports it, the kernel has > CONFIG_X86_CET enabled, and the application is built for the feature. > This is only implemented for the 64-bit kernel. When it is enabled, legacy > non-Shadow Stack applications continue to work, but without protection. > > Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> > --- > arch/x86/Kconfig | 22 ++++++++++++++++++++++ > arch/x86/Kconfig.assembler | 5 +++++ > 2 files changed, 27 insertions(+) > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > index 21f851179ff0..074b3c0e6bf6 100644 > --- a/arch/x86/Kconfig > +++ b/arch/x86/Kconfig > @@ -1951,6 +1951,28 @@ config X86_SGX > > If unsure, say N. > > +config ARCH_HAS_SHADOW_STACK > + def_bool n > + > +config X86_CET > + prompt "Intel Control-flow protection for user-mode" > + def_bool n > + depends on X86_64 > + depends on AS_WRUSS > + select ARCH_USES_HIGH_VMA_FLAGS > + select ARCH_HAS_SHADOW_STACK This seems backwards to me? Shouldn't 'config X86_64' do the 'select ARCH_HAS_SHADOW_STACK' and 'config X86_CET' do a 'depends on ARCH_HAS_SHADOW_STACK' instead? > + help > + Control-flow protection is a set of hardware features which place > + additional restrictions on indirect branches. These help > + mitigate ROP attacks. Applications must be enabled to use it, > + and old userspace does not get protection "for free". > + Support for this feature is present on Tiger Lake family of > + processors released in 2020 or later. Enabling this feature > + increases kernel text size by 3.7 KB. > + See Documentation/x86/intel_cet.rst for more information. > + > + If unsure, say N. > + > config EFI > bool "EFI runtime service support" > depends on ACPI > diff --git a/arch/x86/Kconfig.assembler b/arch/x86/Kconfig.assembler > index 26b8c08e2fc4..00c79dd93651 100644 > --- a/arch/x86/Kconfig.assembler > +++ b/arch/x86/Kconfig.assembler > @@ -19,3 +19,8 @@ config AS_TPAUSE > def_bool $(as-instr,tpause %ecx) > help > Supported by binutils >= 2.31.1 and LLVM integrated assembler >= V7 > + > +config AS_WRUSS > + def_bool $(as-instr,wrussq %rax$(comma)(%rbx)) > + help > + Supported by binutils >= 2.31 and LLVM integrated assembler > -- > 2.21.0 >
On 2/4/2021 11:56 AM, Kees Cook wrote: > On Wed, Feb 03, 2021 at 02:55:24PM -0800, Yu-cheng Yu wrote: >> Shadow Stack provides protection against function return address >> corruption. It is active when the processor supports it, the kernel has >> CONFIG_X86_CET enabled, and the application is built for the feature. >> This is only implemented for the 64-bit kernel. When it is enabled, legacy >> non-Shadow Stack applications continue to work, but without protection. >> >> Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> >> --- >> arch/x86/Kconfig | 22 ++++++++++++++++++++++ >> arch/x86/Kconfig.assembler | 5 +++++ >> 2 files changed, 27 insertions(+) >> >> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig >> index 21f851179ff0..074b3c0e6bf6 100644 >> --- a/arch/x86/Kconfig >> +++ b/arch/x86/Kconfig >> @@ -1951,6 +1951,28 @@ config X86_SGX >> >> If unsure, say N. >> >> +config ARCH_HAS_SHADOW_STACK >> + def_bool n >> + >> +config X86_CET >> + prompt "Intel Control-flow protection for user-mode" >> + def_bool n >> + depends on X86_64 >> + depends on AS_WRUSS >> + select ARCH_USES_HIGH_VMA_FLAGS >> + select ARCH_HAS_SHADOW_STACK > > This seems backwards to me? Shouldn't 'config X86_64' do the 'select > ARCH_HAS_SHADOW_STACK' and 'config X86_CET' do a 'depends on > ARCH_HAS_SHADOW_STACK' instead? I will change it. Thanks! -- Yu-cheng
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 21f851179ff0..074b3c0e6bf6 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1951,6 +1951,28 @@ config X86_SGX If unsure, say N. +config ARCH_HAS_SHADOW_STACK + def_bool n + +config X86_CET + prompt "Intel Control-flow protection for user-mode" + def_bool n + depends on X86_64 + depends on AS_WRUSS + select ARCH_USES_HIGH_VMA_FLAGS + select ARCH_HAS_SHADOW_STACK + help + Control-flow protection is a set of hardware features which place + additional restrictions on indirect branches. These help + mitigate ROP attacks. Applications must be enabled to use it, + and old userspace does not get protection "for free". + Support for this feature is present on Tiger Lake family of + processors released in 2020 or later. Enabling this feature + increases kernel text size by 3.7 KB. + See Documentation/x86/intel_cet.rst for more information. + + If unsure, say N. + config EFI bool "EFI runtime service support" depends on ACPI diff --git a/arch/x86/Kconfig.assembler b/arch/x86/Kconfig.assembler index 26b8c08e2fc4..00c79dd93651 100644 --- a/arch/x86/Kconfig.assembler +++ b/arch/x86/Kconfig.assembler @@ -19,3 +19,8 @@ config AS_TPAUSE def_bool $(as-instr,tpause %ecx) help Supported by binutils >= 2.31.1 and LLVM integrated assembler >= V7 + +config AS_WRUSS + def_bool $(as-instr,wrussq %rax$(comma)(%rbx)) + help + Supported by binutils >= 2.31 and LLVM integrated assembler
Shadow Stack provides protection against function return address corruption. It is active when the processor supports it, the kernel has CONFIG_X86_CET enabled, and the application is built for the feature. This is only implemented for the 64-bit kernel. When it is enabled, legacy non-Shadow Stack applications continue to work, but without protection. Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> --- arch/x86/Kconfig | 22 ++++++++++++++++++++++ arch/x86/Kconfig.assembler | 5 +++++ 2 files changed, 27 insertions(+)