Message ID | 20210204184710.1880895-2-jernej.skrabec@siol.net (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
Series | sunxi: fix H6 HDMI related issues | expand |
On Fri, Feb 5, 2021 at 2:48 AM Jernej Skrabec <jernej.skrabec@siol.net> wrote: > > CLK_SET_RATE_PARENT flag is checked on parent clock instead of current > one. Fix that. > > Fixes: 3f790433c3cb ("clk: sunxi-ng: Adjust MP clock parent rate when allowed") > Tested-by: Andre Heider <a.heider@gmail.com> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
diff --git a/drivers/clk/sunxi-ng/ccu_mp.c b/drivers/clk/sunxi-ng/ccu_mp.c index fa4ecb915590..5f40be6d2dfd 100644 --- a/drivers/clk/sunxi-ng/ccu_mp.c +++ b/drivers/clk/sunxi-ng/ccu_mp.c @@ -108,7 +108,7 @@ static unsigned long ccu_mp_round_rate(struct ccu_mux_internal *mux, max_m = cmp->m.max ?: 1 << cmp->m.width; max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1); - if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) { + if (!(clk_hw_get_flags(&cmp->common.hw) & CLK_SET_RATE_PARENT)) { ccu_mp_find_best(*parent_rate, rate, max_m, max_p, &m, &p); rate = *parent_rate / p / m; } else {