| Message ID | 20210126090120.19900-9-gabriel.fernandez@foss.st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce STM32MP1 RCC in secured mode | expand |
On Tue, 26 Jan 2021 10:01:14 +0100, gabriel.fernandez@foss.st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > > stm32mp15 TZ secure firmware provides SCMI reset domains for > secure resources. This change defines the SCMI reset domain > identifiers used by SCMI agents and servers. > > Stm32mp15 TZ secure firmware provides SCMI clocks for oscillators, some > PLL output and few secure aware interfaces. This change defines the > SCMI clock identifiers used by SCMI agents and servers. > > Server SCMI0 exposes reset controllers for resources under RCC[TZEN] > configuration control. > > Signed-off-by: Etienne Carriere <etienne.carriere@st.com> > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > --- > include/dt-bindings/reset/stm32mp1-resets.h | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/include/dt-bindings/reset/stm32mp1-resets.h b/include/dt-bindings/reset/stm32mp1-resets.h index f0c3aaef67a0..bc71924faa54 100644 --- a/include/dt-bindings/reset/stm32mp1-resets.h +++ b/include/dt-bindings/reset/stm32mp1-resets.h @@ -105,4 +105,17 @@ #define GPIOJ_R 19785 #define GPIOK_R 19786 +/* SCMI reset domain identifiers */ +#define RST_SCMI0_SPI6 0 +#define RST_SCMI0_I2C4 1 +#define RST_SCMI0_I2C6 2 +#define RST_SCMI0_USART1 3 +#define RST_SCMI0_STGEN 4 +#define RST_SCMI0_GPIOZ 5 +#define RST_SCMI0_CRYP1 6 +#define RST_SCMI0_HASH1 7 +#define RST_SCMI0_RNG1 8 +#define RST_SCMI0_MDMA 9 +#define RST_SCMI0_MCU 10 + #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */