| Message ID | 20201210142908.169597-6-andre.przywara@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Unify I/O port and MMIO trap handling | expand |
Hi Andre, On 12/10/20 2:28 PM, Andre Przywara wrote: > The i8042 is clearly an 8-bit era device, so there is little room for > 32-bit registers. > Clean up the data types used. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > hw/i8042.c | 20 ++++++++++---------- > 1 file changed, 10 insertions(+), 10 deletions(-) > > diff --git a/hw/i8042.c b/hw/i8042.c > index 37a99a2d..36ee183f 100644 > --- a/hw/i8042.c > +++ b/hw/i8042.c > @@ -64,11 +64,11 @@ > struct kbd_state { > struct kvm *kvm; > > - char kq[QUEUE_SIZE]; /* Keyboard queue */ > + u8 kq[QUEUE_SIZE]; /* Keyboard queue */ > int kread, kwrite; /* Indexes into the queue */ > int kcount; /* number of elements in queue */ > > - char mq[QUEUE_SIZE]; > + u8 mq[QUEUE_SIZE]; > int mread, mwrite; > int mcount; I think the write_cmd field further down should also be u8 because it stores the first byte of a command (and it's set only to an 8 bit value in kbd_write_command()). Otherwise, it looks ok to me. osdev wiki seems to confirm that the device is indeed 8 bit only, and all the registers are 8 bit now: Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Thanks, Alex > > @@ -173,9 +173,9 @@ static void kbd_write_command(struct kvm *kvm, u8 val) > /* > * Called when the OS reads from port 0x60 (PS/2 data) > */ > -static u32 kbd_read_data(void) > +static u8 kbd_read_data(void) > { > - u32 ret; > + u8 ret; > int i; > > if (state.kcount != 0) { > @@ -202,9 +202,9 @@ static u32 kbd_read_data(void) > /* > * Called when the OS read from port 0x64, the command port > */ > -static u32 kbd_read_status(void) > +static u8 kbd_read_status(void) > { > - return (u32)state.status; > + return state.status; > } > > /* > @@ -212,7 +212,7 @@ static u32 kbd_read_status(void) > * Things written here are generally arguments to commands previously > * written to port 0x64 and stored in state.write_cmd > */ > -static void kbd_write_data(u32 val) > +static void kbd_write_data(u8 val) > { > switch (state.write_cmd) { > case I8042_CMD_CTL_WCTR: > @@ -304,8 +304,8 @@ static bool kbd_in(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void * > break; > } > case I8042_DATA_REG: { > - u32 value = kbd_read_data(); > - ioport__write32(data, value); > + u8 value = kbd_read_data(); > + ioport__write8(data, value); > break; > } > case I8042_PORT_B_REG: { > @@ -328,7 +328,7 @@ static bool kbd_out(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void > break; > } > case I8042_DATA_REG: { > - u32 value = ioport__read32(data); > + u8 value = ioport__read8(data); > kbd_write_data(value); > break; > }
On Thu, 11 Feb 2021 16:55:43 +0000 Alexandru Elisei <alexandru.elisei@arm.com> wrote: Hi, > On 12/10/20 2:28 PM, Andre Przywara wrote: > > > The i8042 is clearly an 8-bit era device, so there is little room for > > 32-bit registers. > > Clean up the data types used. > > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > --- > > hw/i8042.c | 20 ++++++++++---------- > > 1 file changed, 10 insertions(+), 10 deletions(-) > > > > diff --git a/hw/i8042.c b/hw/i8042.c > > index 37a99a2d..36ee183f 100644 > > --- a/hw/i8042.c > > +++ b/hw/i8042.c > > @@ -64,11 +64,11 @@ > > struct kbd_state { > > struct kvm *kvm; > > > > - char kq[QUEUE_SIZE]; /* Keyboard queue */ > > + u8 kq[QUEUE_SIZE]; /* Keyboard queue */ > > int kread, kwrite; /* Indexes into the queue */ > > int kcount; /* number of elements in queue */ > > > > - char mq[QUEUE_SIZE]; > > + u8 mq[QUEUE_SIZE]; > > int mread, mwrite; > > int mcount; > > I think the write_cmd field further down should also be u8 because it stores the > first byte of a command (and it's set only to an 8 bit value in kbd_write_command()). Yes, looks like it, will change it on the way. I guess I wanted to suppress my rewrite-everything complex ;-) If you allow, I will also fix the confusing indentation bug in the big switch statement on the way. > Otherwise, it looks ok to me. osdev wiki seems to confirm that the device is > indeed 8 bit only, and all the registers are 8 bit now: > > Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Thanks! Andre > > > > > @@ -173,9 +173,9 @@ static void kbd_write_command(struct kvm *kvm, u8 val) > > /* > > * Called when the OS reads from port 0x60 (PS/2 data) > > */ > > -static u32 kbd_read_data(void) > > +static u8 kbd_read_data(void) > > { > > - u32 ret; > > + u8 ret; > > int i; > > > > if (state.kcount != 0) { > > @@ -202,9 +202,9 @@ static u32 kbd_read_data(void) > > /* > > * Called when the OS read from port 0x64, the command port > > */ > > -static u32 kbd_read_status(void) > > +static u8 kbd_read_status(void) > > { > > - return (u32)state.status; > > + return state.status; > > } > > > > /* > > @@ -212,7 +212,7 @@ static u32 kbd_read_status(void) > > * Things written here are generally arguments to commands previously > > * written to port 0x64 and stored in state.write_cmd > > */ > > -static void kbd_write_data(u32 val) > > +static void kbd_write_data(u8 val) > > { > > switch (state.write_cmd) { > > case I8042_CMD_CTL_WCTR: > > @@ -304,8 +304,8 @@ static bool kbd_in(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void * > > break; > > } > > case I8042_DATA_REG: { > > - u32 value = kbd_read_data(); > > - ioport__write32(data, value); > > + u8 value = kbd_read_data(); > > + ioport__write8(data, value); > > break; > > } > > case I8042_PORT_B_REG: { > > @@ -328,7 +328,7 @@ static bool kbd_out(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void > > break; > > } > > case I8042_DATA_REG: { > > - u32 value = ioport__read32(data); > > + u8 value = ioport__read8(data); > > kbd_write_data(value); > > break; > > }
diff --git a/hw/i8042.c b/hw/i8042.c index 37a99a2d..36ee183f 100644 --- a/hw/i8042.c +++ b/hw/i8042.c @@ -64,11 +64,11 @@ struct kbd_state { struct kvm *kvm; - char kq[QUEUE_SIZE]; /* Keyboard queue */ + u8 kq[QUEUE_SIZE]; /* Keyboard queue */ int kread, kwrite; /* Indexes into the queue */ int kcount; /* number of elements in queue */ - char mq[QUEUE_SIZE]; + u8 mq[QUEUE_SIZE]; int mread, mwrite; int mcount; @@ -173,9 +173,9 @@ static void kbd_write_command(struct kvm *kvm, u8 val) /* * Called when the OS reads from port 0x60 (PS/2 data) */ -static u32 kbd_read_data(void) +static u8 kbd_read_data(void) { - u32 ret; + u8 ret; int i; if (state.kcount != 0) { @@ -202,9 +202,9 @@ static u32 kbd_read_data(void) /* * Called when the OS read from port 0x64, the command port */ -static u32 kbd_read_status(void) +static u8 kbd_read_status(void) { - return (u32)state.status; + return state.status; } /* @@ -212,7 +212,7 @@ static u32 kbd_read_status(void) * Things written here are generally arguments to commands previously * written to port 0x64 and stored in state.write_cmd */ -static void kbd_write_data(u32 val) +static void kbd_write_data(u8 val) { switch (state.write_cmd) { case I8042_CMD_CTL_WCTR: @@ -304,8 +304,8 @@ static bool kbd_in(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void * break; } case I8042_DATA_REG: { - u32 value = kbd_read_data(); - ioport__write32(data, value); + u8 value = kbd_read_data(); + ioport__write8(data, value); break; } case I8042_PORT_B_REG: { @@ -328,7 +328,7 @@ static bool kbd_out(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void break; } case I8042_DATA_REG: { - u32 value = ioport__read32(data); + u8 value = ioport__read8(data); kbd_write_data(value); break; }
The i8042 is clearly an 8-bit era device, so there is little room for 32-bit registers. Clean up the data types used. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- hw/i8042.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)