| Message ID | 20210212025806.556217-5-nobuhiro1.iwamatsu@toshiba.co.jp (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: stmmac: Add Toshiba Visconti SoCs glue driver | expand |
| Context | Check | Description |
|---|---|---|
| netdev/cover_letter | success | Link |
| netdev/fixes_present | success | Link |
| netdev/patch_count | success | Link |
| netdev/tree_selection | success | Guessed tree name to be net-next |
| netdev/subject_prefix | success | Link |
| netdev/cc_maintainers | success | CCed 4 of 4 maintainers |
| netdev/source_inline | success | Was 0 now: 0 |
| netdev/verify_signedoff | success | Link |
| netdev/module_param | success | Was 0 now: 0 |
| netdev/build_32bit | success | Errors and warnings before: 0 this patch: 0 |
| netdev/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| netdev/verify_fixes | success | Link |
| netdev/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 57 lines checked |
| netdev/build_allmodconfig_warn | success | Errors and warnings before: 0 this patch: 0 |
| netdev/header_inline | success | Link |
| netdev/stable | success | Stable not CCed |
On Fri, Feb 12, 2021 at 4:03 AM Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> wrote: > @@ -384,6 +398,16 @@ spi6: spi@28146000 { > #size-cells = <0>; > status = "disabled"; > }; > + > + piether: ethernet@28000000 { > + compatible = "toshiba,visconti-dwmac"; Shouldn't there be a more specific compatible string here, as well as the particular version of the dwmac you use? In the binding example, you list the device as "dma-coherent", but in this instance, it is not marked that way. Can you find out whether the device is in fact connected properly to a cache-coherent bus? Note that failing to mark it as cache-coherent will make the device rather slow and possibly not work correctly if it is in fact coherent, but the default is non-coherent since a lot of SoCs are lacking that hardware support. Arnd
Hi, Thanks for your review. On Fri, Feb 12, 2021 at 10:32:09AM +0100, Arnd Bergmann wrote: > On Fri, Feb 12, 2021 at 4:03 AM Nobuhiro Iwamatsu > <nobuhiro1.iwamatsu@toshiba.co.jp> wrote: > > @@ -384,6 +398,16 @@ spi6: spi@28146000 { > > #size-cells = <0>; > > status = "disabled"; > > }; > > + > > + piether: ethernet@28000000 { > > + compatible = "toshiba,visconti-dwmac"; > > Shouldn't there be a more specific compatible string here, as well as the > particular version of the dwmac you use? I rechecked the code again based on your point. I need to specify the version of dwmac. I also noticed that it could remove some unnecessary code. I will fix this. > > In the binding example, you list the device as "dma-coherent", > but in this instance, it is not marked that way. Can you find out > whether the device is in fact connected properly to a cache-coherent > bus? > > Note that failing to mark it as cache-coherent will make the device > rather slow and possibly not work correctly if it is in fact coherent, > but the default is non-coherent since a lot of SoCs are lacking > that hardware support. Thanks for point out. This hardware does not require dma-coherent. I will remove dma-coherent from DT binding document. > > Arnd > Best regards, Nobuhiro
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index ed0bf7f13f54..48fa8776e36f 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -41,3 +41,21 @@ &uart1 { clocks = <&uart_clk>; clock-names = "apb_pclk"; }; + +&piether { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + clocks = <&clk300mhz>, <&clk125mhz>; + clock-names = "stmmaceth", "phy_ref_clk"; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@1 { + device_type = "ethernet-phy"; + reg = <0x1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 242f25f4e12a..fabb8d66ef93 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -134,6 +134,20 @@ uart_clk: uart-clk { #clock-cells = <0>; }; + clk125mhz: clk125mhz { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + #clock-cells = <0>; + clock-output-names = "clk125mhz"; + }; + + clk300mhz: clk300mhz { + compatible = "fixed-clock"; + clock-frequency = <300000000>; + #clock-cells = <0>; + clock-output-names = "clk300mhz"; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -384,6 +398,16 @@ spi6: spi@28146000 { #size-cells = <0>; status = "disabled"; }; + + piether: ethernet@28000000 { + compatible = "toshiba,visconti-dwmac"; + reg = <0 0x28000000 0 0x10000>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + snps,txpbl = <4>; + snps,rxpbl = <4>; + status = "disabled"; + }; }; };
Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file. And enable this node in TMPV7708 RM main board's board-specific DT file. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> --- .../boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 18 ++++++++++++++ arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 24 +++++++++++++++++++ 2 files changed, 42 insertions(+)