| Message ID | 20210210095641.23856-6-hch@lst.de (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | a86497d66dd5891cef594744b8d56bc451aac418 |
| Headers | show |
| Series | [1/6] MIPS/malta: simplify plat_setup_iocoherency | expand |
Reviewed-by: Huacai Chen <chenhuacai@kernel.org> On Wed, Feb 10, 2021 at 6:04 PM Christoph Hellwig <hch@lst.de> wrote: > > CONFIG_DMA_MAYBE_COHERENT just guards two early init options now. Just > enable them unconditionally for CONFIG_DMA_NONCOHERENT. > > Signed-off-by: Christoph Hellwig <hch@lst.de> > --- > arch/mips/Kconfig | 8 ++------ > arch/mips/kernel/setup.c | 2 +- > 2 files changed, 3 insertions(+), 7 deletions(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index 0e86162df65541..1f1603a08a6d2d 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -181,7 +181,7 @@ config MIPS_ALCHEMY > select CEVT_R4K > select CSRC_R4K > select IRQ_MIPS_CPU > - select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is > + select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is > select MIPS_FIXUP_BIGPHYS_ADDR if PCI > select SYS_HAS_CPU_MIPS32_R1 > select SYS_SUPPORTS_32BIT_KERNEL > @@ -546,7 +546,7 @@ config MIPS_MALTA > select CLKSRC_MIPS_GIC > select COMMON_CLK > select CSRC_R4K > - select DMA_MAYBE_COHERENT > + select DMA_NONCOHERENT > select GENERIC_ISA_DMA > select HAVE_PCSPKR_PLATFORM > select HAVE_PCI > @@ -1127,10 +1127,6 @@ config FW_CFE > config ARCH_SUPPORTS_UPROBES > bool > > -config DMA_MAYBE_COHERENT > - select DMA_NONCOHERENT > - bool > - > config DMA_PERDEV_COHERENT > bool > select ARCH_HAS_SETUP_DMA_OPS > diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c > index d6b2ba527f5b81..b25d07675b1ee1 100644 > --- a/arch/mips/kernel/setup.c > +++ b/arch/mips/kernel/setup.c > @@ -805,7 +805,7 @@ static int __init debugfs_mips(void) > arch_initcall(debugfs_mips); > #endif > > -#ifdef CONFIG_DMA_MAYBE_COHERENT > +#ifdef CONFIG_DMA_NONCOHERENT > static int __init setcoherentio(char *str) > { > dma_default_coherent = true; > -- > 2.29.2 >
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 0e86162df65541..1f1603a08a6d2d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -181,7 +181,7 @@ config MIPS_ALCHEMY select CEVT_R4K select CSRC_R4K select IRQ_MIPS_CPU - select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is + select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is select MIPS_FIXUP_BIGPHYS_ADDR if PCI select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL @@ -546,7 +546,7 @@ config MIPS_MALTA select CLKSRC_MIPS_GIC select COMMON_CLK select CSRC_R4K - select DMA_MAYBE_COHERENT + select DMA_NONCOHERENT select GENERIC_ISA_DMA select HAVE_PCSPKR_PLATFORM select HAVE_PCI @@ -1127,10 +1127,6 @@ config FW_CFE config ARCH_SUPPORTS_UPROBES bool -config DMA_MAYBE_COHERENT - select DMA_NONCOHERENT - bool - config DMA_PERDEV_COHERENT bool select ARCH_HAS_SETUP_DMA_OPS diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index d6b2ba527f5b81..b25d07675b1ee1 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -805,7 +805,7 @@ static int __init debugfs_mips(void) arch_initcall(debugfs_mips); #endif -#ifdef CONFIG_DMA_MAYBE_COHERENT +#ifdef CONFIG_DMA_NONCOHERENT static int __init setcoherentio(char *str) { dma_default_coherent = true;
CONFIG_DMA_MAYBE_COHERENT just guards two early init options now. Just enable them unconditionally for CONFIG_DMA_NONCOHERENT. Signed-off-by: Christoph Hellwig <hch@lst.de> --- arch/mips/Kconfig | 8 ++------ arch/mips/kernel/setup.c | 2 +- 2 files changed, 3 insertions(+), 7 deletions(-)