| Message ID | 20210225193543.2920532-18-suzuki.poulose@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: coresight: Add support for ETE and TRBE | expand |
Hi Suzuki,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on next-20210226]
[cannot apply to kvmarm/next arm64/for-next/core tip/perf/core v5.11]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 6fbd6cf85a3be127454a1ad58525a3adcf8612ab
config: arm-randconfig-r024-20210225 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project a921aaf789912d981cbb2036bdc91ad7289e1523)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/0day-ci/linux/commit/c37564326cdf11e0839eae06c1bfead47d3e5775
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447
git checkout c37564326cdf11e0839eae06c1bfead47d3e5775
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/hwtracing/coresight/coresight-core.c:800:6: error: implicit declaration of function 'coresight_is_percpu_source' [-Werror,-Wimplicit-function-declaration]
if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) &&
^
>> drivers/hwtracing/coresight/coresight-core.c:800:43: error: implicit declaration of function 'coresight_is_percpu_sink' [-Werror,-Wimplicit-function-declaration]
if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) &&
^
drivers/hwtracing/coresight/coresight-core.c:1024:7: error: implicit declaration of function 'coresight_is_percpu_source' [-Werror,-Wimplicit-function-declaration]
if (coresight_is_percpu_source(csdev))
^
3 errors generated.
vim +/coresight_is_percpu_source +800 drivers/hwtracing/coresight/coresight-core.c
775
776 /**
777 * _coresight_build_path - recursively build a path from a @csdev to a sink.
778 * @csdev: The device to start from.
779 * @sink: The final sink we want in this path.
780 * @path: The list to add devices to.
781 *
782 * The tree of Coresight device is traversed until an activated sink is
783 * found. From there the sink is added to the list along with all the
784 * devices that led to that point - the end result is a list from source
785 * to sink. In that list the source is the first device and the sink the
786 * last one.
787 */
788 static int _coresight_build_path(struct coresight_device *csdev,
789 struct coresight_device *sink,
790 struct list_head *path)
791 {
792 int i, ret;
793 bool found = false;
794 struct coresight_node *node;
795
796 /* An activated sink has been found. Enqueue the element */
797 if (csdev == sink)
798 goto out;
799
> 800 if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) &&
801 sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) {
802 if (_coresight_build_path(sink, sink, path) == 0) {
803 found = true;
804 goto out;
805 }
806 }
807
808 /* Not a sink - recursively explore each port found on this element */
809 for (i = 0; i < csdev->pdata->nr_outport; i++) {
810 struct coresight_device *child_dev;
811
812 child_dev = csdev->pdata->conns[i].child_dev;
813 if (child_dev &&
814 _coresight_build_path(child_dev, sink, path) == 0) {
815 found = true;
816 break;
817 }
818 }
819
820 if (!found)
821 return -ENODEV;
822
823 out:
824 /*
825 * A path from this element to a sink has been found. The elements
826 * leading to the sink are already enqueued, all that is left to do
827 * is tell the PM runtime core we need this element and add a node
828 * for it.
829 */
830 ret = coresight_grab_device(csdev);
831 if (ret)
832 return ret;
833
834 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL);
835 if (!node)
836 return -ENOMEM;
837
838 node->csdev = csdev;
839 list_add(&node->link, path);
840
841 return 0;
842 }
843
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
On 2/26/21 6:34 AM, kernel test robot wrote: > Hi Suzuki, > > Thank you for the patch! Yet something to improve: > > [auto build test ERROR on linus/master] > [also build test ERROR on next-20210226] > [cannot apply to kvmarm/next arm64/for-next/core tip/perf/core v5.11] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in > https://git-scm.com/docs/git-format-patch] > > url: https://github.com/0day-ci/linux/commits/Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447 > base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 6fbd6cf85a3be127454a1ad58525a3adcf8612ab > config: arm-randconfig-r024-20210225 (attached as .config) > compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project a921aaf789912d981cbb2036bdc91ad7289e1523) > reproduce (this is a W=1 build): > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # install arm cross compiling tool for clang build > # apt-get install binutils-arm-linux-gnueabi > # https://github.com/0day-ci/linux/commit/c37564326cdf11e0839eae06c1bfead47d3e5775 > git remote add linux-review https://github.com/0day-ci/linux > git fetch --no-tags linux-review Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447 > git checkout c37564326cdf11e0839eae06c1bfead47d3e5775 > # save the attached .config to linux build tree > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot <lkp@intel.com> Thanks for the report. The following fixup should clear this : ---8>--- diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 8a3a3c199087..85008a65e21f 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -429,6 +429,33 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o csa->write(val, offset, false, true); } +#else /* !CONFIG_64BIT */ + +static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, + u32 offset) +{ + WARN_ON(1); + return 0; +} + +static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset) +{ + WARN_ON(1); + return 0; +} + +static inline void csdev_access_relaxed_write64(struct csdev_access *csa, + u64 val, u32 offset) +{ + WARN_ON(1); +} + +static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset) +{ + WARN_ON(1); +} +#endif /* CONFIG_64BIT */ + static inline bool coresight_is_percpu_source(struct coresight_device *csdev) { return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && @@ -440,32 +467,6 @@ static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM); } -#else /* !CONFIG_64BIT */ - -static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, - u32 offset) -{ - WARN_ON(1); - return 0; -} - -static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset) -{ - WARN_ON(1); - return 0; -} - -static inline void csdev_access_relaxed_write64(struct csdev_access *csa, - u64 val, u32 offset) -{ - WARN_ON(1); -} - -static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset) -{ - WARN_ON(1); -} -#endif /* CONFIG_64BIT */ extern struct coresight_device * coresight_register(struct coresight_desc *desc);
On 3/1/21 7:24 PM, Suzuki K Poulose wrote: > On 2/26/21 6:34 AM, kernel test robot wrote: >> Hi Suzuki, >> >> Thank you for the patch! Yet something to improve: >> >> [auto build test ERROR on linus/master] >> [also build test ERROR on next-20210226] >> [cannot apply to kvmarm/next arm64/for-next/core tip/perf/core v5.11] >> [If your patch is applied to the wrong git tree, kindly drop us a note. >> And when submitting patch, we suggest to use '--base' as documented in >> https://git-scm.com/docs/git-format-patch] >> >> url: https://github.com/0day-ci/linux/commits/Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447 >> base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 6fbd6cf85a3be127454a1ad58525a3adcf8612ab >> config: arm-randconfig-r024-20210225 (attached as .config) >> compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project a921aaf789912d981cbb2036bdc91ad7289e1523) >> reproduce (this is a W=1 build): >> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross >> chmod +x ~/bin/make.cross >> # install arm cross compiling tool for clang build >> # apt-get install binutils-arm-linux-gnueabi >> # https://github.com/0day-ci/linux/commit/c37564326cdf11e0839eae06c1bfead47d3e5775 >> git remote add linux-review https://github.com/0day-ci/linux >> git fetch --no-tags linux-review Suzuki-K-Poulose/arm64-coresight-Add-support-for-ETE-and-TRBE/20210226-035447 >> git checkout c37564326cdf11e0839eae06c1bfead47d3e5775 >> # save the attached .config to linux build tree >> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm >> >> If you fix the issue, kindly add following tag as appropriate >> Reported-by: kernel test robot <lkp@intel.com> > > Thanks for the report. The following fixup should clear this : > > > ---8>--- > > > > diff --git a/include/linux/coresight.h b/include/linux/coresight.h > index 8a3a3c199087..85008a65e21f 100644 > --- a/include/linux/coresight.h > +++ b/include/linux/coresight.h > @@ -429,6 +429,33 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o > csa->write(val, offset, false, true); > } > > +#else /* !CONFIG_64BIT */ > + > +static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, > + u32 offset) > +{ > + WARN_ON(1); > + return 0; > +} > + > +static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset) > +{ > + WARN_ON(1); > + return 0; > +} > + > +static inline void csdev_access_relaxed_write64(struct csdev_access *csa, > + u64 val, u32 offset) > +{ > + WARN_ON(1); > +} > + > +static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset) > +{ > + WARN_ON(1); > +} > +#endif /* CONFIG_64BIT */ > + > static inline bool coresight_is_percpu_source(struct coresight_device *csdev) > { > return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && > @@ -440,32 +467,6 @@ static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) > return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && > (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM); > } > -#else /* !CONFIG_64BIT */ > - > -static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, > - u32 offset) > -{ > - WARN_ON(1); > - return 0; > -} > - > -static inline u64 csdev_access_read64(struct csdev_access *csa, u32 offset) > -{ > - WARN_ON(1); > - return 0; > -} > - > -static inline void csdev_access_relaxed_write64(struct csdev_access *csa, > - u64 val, u32 offset) > -{ > - WARN_ON(1); > -} > - > -static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset) > -{ > - WARN_ON(1); > -} > -#endif /* CONFIG_64BIT */ > > extern struct coresight_device * > coresight_register(struct coresight_desc *desc); Agreed, these new helpers should be available in general and not restricted for 64BIT.
Hi, On Thu, 25 Feb 2021 at 19:36, Suzuki K Poulose <suzuki.poulose@arm.com> wrote: > > From: Anshuman Khandual <anshuman.khandual@arm.com> > > Add support for dedicated sinks that are bound to individual CPUs. (e.g, > TRBE). To allow quicker access to the sink for a given CPU bound source, > keep a percpu array of the sink devices. Also, add support for building > a path to the CPU local sink from the ETM. > > This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM. > This new sink type is exclusively available and can only work with percpu > source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PROC. > Minor nit: FEAT_TRBE architecturally guarantees a compatible architectural FEAT_ETE source. However _all_ CPU sources have CORESIGHT_DEV_SUBTYPE_SOURCE_PROC set, ETMv3.x, PTM, ETM4.x and ETE alike. In the code that follows - coresight_is_percpu_source() checks it is any type of CPU source, not the FEAT_ETE type, which is fine as we then check the cpu and if it has TRBE. So the simplifications to the code from the first couple of patch sets make this explanation slightly misleading. Could do to adjust if re-spinning set. Reviewed-by: Mike Leach <mike.leach@linaro.org> > This defines a percpu structure that accommodates a single coresight_device > which can be used to store an initialized instance from a sink driver. As > these sinks are exclusively linked and dependent on corresponding percpu > sources devices, they should also be the default sink device during a perf > session. > > Outwards device connections are scanned while establishing paths between a > source and a sink device. But such connections are not present for certain > percpu source and sink devices which are exclusively linked and dependent. > Build the path directly and skip connection scanning for such devices. > > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Cc: Mike Leach <mike.leach@linaro.org> > Cc: Suzuki K Poulose <suzuki.poulose@arm.com> > Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> > [Moved the set/get percpu sink APIs from TRBE patch to here] > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > Changes: > - Export methods to set/get percpu sinks for fixing module > build for TRBE > - Addressed coding style comments (Suzuki) > - Check status of _coresight_build_path() (Mathieu) > --- > drivers/hwtracing/coresight/coresight-core.c | 29 ++++++++++++++++++-- > drivers/hwtracing/coresight/coresight-priv.h | 3 ++ > include/linux/coresight.h | 12 ++++++++ > 3 files changed, 42 insertions(+), 2 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 0062c8935653..55c645616bf6 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -23,6 +23,7 @@ > #include "coresight-priv.h" > > static DEFINE_MUTEX(coresight_mutex); > +DEFINE_PER_CPU(struct coresight_device *, csdev_sink); > > /** > * struct coresight_node - elements of a path, from source to sink > @@ -70,6 +71,18 @@ void coresight_remove_cti_ops(void) > } > EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); > > +void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev) > +{ > + per_cpu(csdev_sink, cpu) = csdev; > +} > +EXPORT_SYMBOL_GPL(coresight_set_percpu_sink); > + > +struct coresight_device *coresight_get_percpu_sink(int cpu) > +{ > + return per_cpu(csdev_sink, cpu); > +} > +EXPORT_SYMBOL_GPL(coresight_get_percpu_sink); > + > static int coresight_id_match(struct device *dev, void *data) > { > int trace_id, i_trace_id; > @@ -784,6 +797,14 @@ static int _coresight_build_path(struct coresight_device *csdev, > if (csdev == sink) > goto out; > > + if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && > + sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { > + if (_coresight_build_path(sink, sink, path) == 0) { > + found = true; > + goto out; > + } > + } > + > /* Not a sink - recursively explore each port found on this element */ > for (i = 0; i < csdev->pdata->nr_outport; i++) { > struct coresight_device *child_dev; > @@ -999,8 +1020,12 @@ coresight_find_default_sink(struct coresight_device *csdev) > int depth = 0; > > /* look for a default sink if we have not found for this device */ > - if (!csdev->def_sink) > - csdev->def_sink = coresight_find_sink(csdev, &depth); > + if (!csdev->def_sink) { > + if (coresight_is_percpu_source(csdev)) > + csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); > + if (!csdev->def_sink) > + csdev->def_sink = coresight_find_sink(csdev, &depth); > + } > return csdev->def_sink; > } > > diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h > index f5f654ea2994..ff1dd2092ac5 100644 > --- a/drivers/hwtracing/coresight/coresight-priv.h > +++ b/drivers/hwtracing/coresight/coresight-priv.h > @@ -232,4 +232,7 @@ coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode); > void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, > struct coresight_device *ect_csdev); > > +void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev); > +struct coresight_device *coresight_get_percpu_sink(int cpu); > + > #endif > diff --git a/include/linux/coresight.h b/include/linux/coresight.h > index 976ec2697610..8a3a3c199087 100644 > --- a/include/linux/coresight.h > +++ b/include/linux/coresight.h > @@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink { > CORESIGHT_DEV_SUBTYPE_SINK_PORT, > CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, > CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM, > + CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM, > }; > > enum coresight_dev_subtype_link { > @@ -428,6 +429,17 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o > csa->write(val, offset, false, true); > } > > +static inline bool coresight_is_percpu_source(struct coresight_device *csdev) > +{ > + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && > + (csdev->subtype.source_subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_PROC); > +} > + > +static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) > +{ > + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && > + (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM); > +} > #else /* !CONFIG_64BIT */ > > static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, > -- > 2.24.1 > -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK
On Thu, Feb 25, 2021 at 07:35:41PM +0000, Suzuki K Poulose wrote: > From: Anshuman Khandual <anshuman.khandual@arm.com> > > Add support for dedicated sinks that are bound to individual CPUs. (e.g, > TRBE). To allow quicker access to the sink for a given CPU bound source, > keep a percpu array of the sink devices. Also, add support for building > a path to the CPU local sink from the ETM. > > This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM. > This new sink type is exclusively available and can only work with percpu > source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PROC. > > This defines a percpu structure that accommodates a single coresight_device > which can be used to store an initialized instance from a sink driver. As > these sinks are exclusively linked and dependent on corresponding percpu > sources devices, they should also be the default sink device during a perf > session. > > Outwards device connections are scanned while establishing paths between a > source and a sink device. But such connections are not present for certain > percpu source and sink devices which are exclusively linked and dependent. > Build the path directly and skip connection scanning for such devices. > > Cc: Mathieu Poirier <mathieu.poirier@linaro.org> > Cc: Mike Leach <mike.leach@linaro.org> > Cc: Suzuki K Poulose <suzuki.poulose@arm.com> > Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> > [Moved the set/get percpu sink APIs from TRBE patch to here] > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > Changes: > - Export methods to set/get percpu sinks for fixing module > build for TRBE > - Addressed coding style comments (Suzuki) > - Check status of _coresight_build_path() (Mathieu) > --- > drivers/hwtracing/coresight/coresight-core.c | 29 ++++++++++++++++++-- > drivers/hwtracing/coresight/coresight-priv.h | 3 ++ > include/linux/coresight.h | 12 ++++++++ > 3 files changed, 42 insertions(+), 2 deletions(-) Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 0062c8935653..55c645616bf6 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -23,6 +23,7 @@ > #include "coresight-priv.h" > > static DEFINE_MUTEX(coresight_mutex); > +DEFINE_PER_CPU(struct coresight_device *, csdev_sink); > > /** > * struct coresight_node - elements of a path, from source to sink > @@ -70,6 +71,18 @@ void coresight_remove_cti_ops(void) > } > EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); > > +void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev) > +{ > + per_cpu(csdev_sink, cpu) = csdev; > +} > +EXPORT_SYMBOL_GPL(coresight_set_percpu_sink); > + > +struct coresight_device *coresight_get_percpu_sink(int cpu) > +{ > + return per_cpu(csdev_sink, cpu); > +} > +EXPORT_SYMBOL_GPL(coresight_get_percpu_sink); > + > static int coresight_id_match(struct device *dev, void *data) > { > int trace_id, i_trace_id; > @@ -784,6 +797,14 @@ static int _coresight_build_path(struct coresight_device *csdev, > if (csdev == sink) > goto out; > > + if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && > + sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { > + if (_coresight_build_path(sink, sink, path) == 0) { > + found = true; > + goto out; > + } > + } > + > /* Not a sink - recursively explore each port found on this element */ > for (i = 0; i < csdev->pdata->nr_outport; i++) { > struct coresight_device *child_dev; > @@ -999,8 +1020,12 @@ coresight_find_default_sink(struct coresight_device *csdev) > int depth = 0; > > /* look for a default sink if we have not found for this device */ > - if (!csdev->def_sink) > - csdev->def_sink = coresight_find_sink(csdev, &depth); > + if (!csdev->def_sink) { > + if (coresight_is_percpu_source(csdev)) > + csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); > + if (!csdev->def_sink) > + csdev->def_sink = coresight_find_sink(csdev, &depth); > + } > return csdev->def_sink; > } > > diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h > index f5f654ea2994..ff1dd2092ac5 100644 > --- a/drivers/hwtracing/coresight/coresight-priv.h > +++ b/drivers/hwtracing/coresight/coresight-priv.h > @@ -232,4 +232,7 @@ coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode); > void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, > struct coresight_device *ect_csdev); > > +void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev); > +struct coresight_device *coresight_get_percpu_sink(int cpu); > + > #endif > diff --git a/include/linux/coresight.h b/include/linux/coresight.h > index 976ec2697610..8a3a3c199087 100644 > --- a/include/linux/coresight.h > +++ b/include/linux/coresight.h > @@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink { > CORESIGHT_DEV_SUBTYPE_SINK_PORT, > CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, > CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM, > + CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM, > }; > > enum coresight_dev_subtype_link { > @@ -428,6 +429,17 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o > csa->write(val, offset, false, true); > } > > +static inline bool coresight_is_percpu_source(struct coresight_device *csdev) > +{ > + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && > + (csdev->subtype.source_subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_PROC); > +} > + > +static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) > +{ > + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && > + (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM); > +} > #else /* !CONFIG_64BIT */ > > static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa, > -- > 2.24.1 >
Hi Mike On 08/03/2021 17:26, Mike Leach wrote: > Hi, > > On Thu, 25 Feb 2021 at 19:36, Suzuki K Poulose <suzuki.poulose@arm.com> wrote: >> >> From: Anshuman Khandual <anshuman.khandual@arm.com> >> >> Add support for dedicated sinks that are bound to individual CPUs. (e.g, >> TRBE). To allow quicker access to the sink for a given CPU bound source, >> keep a percpu array of the sink devices. Also, add support for building >> a path to the CPU local sink from the ETM. >> >> This adds a new percpu sink type CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM. >> This new sink type is exclusively available and can only work with percpu >> source type device CORESIGHT_DEV_SUBTYPE_SOURCE_PROC. >> > > Minor nit: FEAT_TRBE architecturally guarantees a compatible > architectural FEAT_ETE source. > However _all_ CPU sources have CORESIGHT_DEV_SUBTYPE_SOURCE_PROC set, > ETMv3.x, PTM, ETM4.x and ETE alike. > In the code that follows - coresight_is_percpu_source() checks it is > any type of CPU source, not the FEAT_ETE type, which is fine as we > then check the cpu and if it has TRBE. Agreed. But we would like to keep this CoreSight generic code away from the specifics of underlying "source", which is why we used the generic notion of a per-CPU source. > So the simplifications to the code from the first couple of patch sets > make this explanation slightly misleading. Could do to adjust if > re-spinning set. > > Reviewed-by: Mike Leach <mike.leach@linaro.org> Thanks Suzuki
diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 0062c8935653..55c645616bf6 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -23,6 +23,7 @@ #include "coresight-priv.h" static DEFINE_MUTEX(coresight_mutex); +DEFINE_PER_CPU(struct coresight_device *, csdev_sink); /** * struct coresight_node - elements of a path, from source to sink @@ -70,6 +71,18 @@ void coresight_remove_cti_ops(void) } EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); +void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev) +{ + per_cpu(csdev_sink, cpu) = csdev; +} +EXPORT_SYMBOL_GPL(coresight_set_percpu_sink); + +struct coresight_device *coresight_get_percpu_sink(int cpu) +{ + return per_cpu(csdev_sink, cpu); +} +EXPORT_SYMBOL_GPL(coresight_get_percpu_sink); + static int coresight_id_match(struct device *dev, void *data) { int trace_id, i_trace_id; @@ -784,6 +797,14 @@ static int _coresight_build_path(struct coresight_device *csdev, if (csdev == sink) goto out; + if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && + sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { + if (_coresight_build_path(sink, sink, path) == 0) { + found = true; + goto out; + } + } + /* Not a sink - recursively explore each port found on this element */ for (i = 0; i < csdev->pdata->nr_outport; i++) { struct coresight_device *child_dev; @@ -999,8 +1020,12 @@ coresight_find_default_sink(struct coresight_device *csdev) int depth = 0; /* look for a default sink if we have not found for this device */ - if (!csdev->def_sink) - csdev->def_sink = coresight_find_sink(csdev, &depth); + if (!csdev->def_sink) { + if (coresight_is_percpu_source(csdev)) + csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); + if (!csdev->def_sink) + csdev->def_sink = coresight_find_sink(csdev, &depth); + } return csdev->def_sink; } diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index f5f654ea2994..ff1dd2092ac5 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -232,4 +232,7 @@ coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode); void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, struct coresight_device *ect_csdev); +void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev); +struct coresight_device *coresight_get_percpu_sink(int cpu); + #endif diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 976ec2697610..8a3a3c199087 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -50,6 +50,7 @@ enum coresight_dev_subtype_sink { CORESIGHT_DEV_SUBTYPE_SINK_PORT, CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM, + CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM, }; enum coresight_dev_subtype_link { @@ -428,6 +429,17 @@ static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 o csa->write(val, offset, false, true); } +static inline bool coresight_is_percpu_source(struct coresight_device *csdev) +{ + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SOURCE) && + (csdev->subtype.source_subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_PROC); +} + +static inline bool coresight_is_percpu_sink(struct coresight_device *csdev) +{ + return csdev && (csdev->type == CORESIGHT_DEV_TYPE_SINK) && + (csdev->subtype.sink_subtype == CORESIGHT_DEV_SUBTYPE_SINK_PERCPU_SYSMEM); +} #else /* !CONFIG_64BIT */ static inline u64 csdev_access_relaxed_read64(struct csdev_access *csa,