diff mbox series

clk: qcom: gcc-sc7180: Use floor ops for the correct sdcc1 clk

Message ID 20210224095013.1.I2e2ba4978cfca06520dfb5d757768f9c42140f7c@changeid (mailing list archive)
State Accepted, archived
Headers show
Series clk: qcom: gcc-sc7180: Use floor ops for the correct sdcc1 clk | expand

Commit Message

Doug Anderson Feb. 24, 2021, 5:50 p.m. UTC
While picking commit a8cd989e1a57 ("mmc: sdhci-msm: Warn about
overclocking SD/MMC") back to my tree I was surprised that it was
reporting warnings.  I thought I fixed those!  Looking closer at the
fix, I see that I totally bungled it (or at least I halfway bungled
it).  The SD card clock got fixed (and that was the one I was really
focused on fixing), but I totally adjusted the wrong clock for eMMC.
Sigh.  Let's fix my dumb mistake.

Now both SD and eMMC have floor for the "apps" clock.

This doesn't matter a lot for the final clock rate for HS400 eMMC but
could matter if someone happens to put some slower eMMC on a sc7180.
We also transition through some of these lower rates sometimes and
having them wrong could cause problems during these transitions.
These were the messages I was seeing at boot:
  mmc1: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
  mmc1: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
  mmc1: Card appears overclocked; req 104000000 Hz, actual 192000000 Hz

Fixes: 6d37a8d19283 ("clk: qcom: gcc-sc7180: Use floor ops for sdcc clks")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 drivers/clk/qcom/gcc-sc7180.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Taniya Das March 1, 2021, 5 p.m. UTC | #1
Reviewed-by: Taniya Das <tdas@codeaurora.org>

On 2/24/2021 11:20 PM, Douglas Anderson wrote:
> While picking commit a8cd989e1a57 ("mmc: sdhci-msm: Warn about
> overclocking SD/MMC") back to my tree I was surprised that it was
> reporting warnings.  I thought I fixed those!  Looking closer at the
> fix, I see that I totally bungled it (or at least I halfway bungled
> it).  The SD card clock got fixed (and that was the one I was really
> focused on fixing), but I totally adjusted the wrong clock for eMMC.
> Sigh.  Let's fix my dumb mistake.
> 
> Now both SD and eMMC have floor for the "apps" clock.
> 
> This doesn't matter a lot for the final clock rate for HS400 eMMC but
> could matter if someone happens to put some slower eMMC on a sc7180.
> We also transition through some of these lower rates sometimes and
> having them wrong could cause problems during these transitions.
> These were the messages I was seeing at boot:
>    mmc1: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
>    mmc1: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
>    mmc1: Card appears overclocked; req 104000000 Hz, actual 192000000 Hz
> 
> Fixes: 6d37a8d19283 ("clk: qcom: gcc-sc7180: Use floor ops for sdcc clks")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---
> 
>   drivers/clk/qcom/gcc-sc7180.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c
> index c5c2e93bda8e..5cacd20a31b3 100644
> --- a/drivers/clk/qcom/gcc-sc7180.c
> +++ b/drivers/clk/qcom/gcc-sc7180.c
> @@ -620,7 +620,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
>   		.name = "gcc_sdcc1_apps_clk_src",
>   		.parent_data = gcc_parent_data_1,
>   		.num_parents = 5,
> -		.ops = &clk_rcg2_ops,
> +		.ops = &clk_rcg2_floor_ops,
>   	},
>   };
>   
> @@ -642,7 +642,7 @@ static struct clk_rcg2 gcc_sdcc1_ice_core_clk_src = {
>   		.name = "gcc_sdcc1_ice_core_clk_src",
>   		.parent_data = gcc_parent_data_0,
>   		.num_parents = 4,
> -		.ops = &clk_rcg2_floor_ops,
> +		.ops = &clk_rcg2_ops,
>   	},
>   };
>   
>
Stephen Boyd March 13, 2021, 9 p.m. UTC | #2
Quoting Douglas Anderson (2021-02-24 09:50:25)
> While picking commit a8cd989e1a57 ("mmc: sdhci-msm: Warn about
> overclocking SD/MMC") back to my tree I was surprised that it was
> reporting warnings.  I thought I fixed those!  Looking closer at the
> fix, I see that I totally bungled it (or at least I halfway bungled
> it).  The SD card clock got fixed (and that was the one I was really
> focused on fixing), but I totally adjusted the wrong clock for eMMC.
> Sigh.  Let's fix my dumb mistake.
> 
> Now both SD and eMMC have floor for the "apps" clock.
> 
> This doesn't matter a lot for the final clock rate for HS400 eMMC but
> could matter if someone happens to put some slower eMMC on a sc7180.
> We also transition through some of these lower rates sometimes and
> having them wrong could cause problems during these transitions.
> These were the messages I was seeing at boot:
>   mmc1: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
>   mmc1: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
>   mmc1: Card appears overclocked; req 104000000 Hz, actual 192000000 Hz
> 
> Fixes: 6d37a8d19283 ("clk: qcom: gcc-sc7180: Use floor ops for sdcc clks")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---

Applied to clk-fixes
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c
index c5c2e93bda8e..5cacd20a31b3 100644
--- a/drivers/clk/qcom/gcc-sc7180.c
+++ b/drivers/clk/qcom/gcc-sc7180.c
@@ -620,7 +620,7 @@  static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
 		.name = "gcc_sdcc1_apps_clk_src",
 		.parent_data = gcc_parent_data_1,
 		.num_parents = 5,
-		.ops = &clk_rcg2_ops,
+		.ops = &clk_rcg2_floor_ops,
 	},
 };
 
@@ -642,7 +642,7 @@  static struct clk_rcg2 gcc_sdcc1_ice_core_clk_src = {
 		.name = "gcc_sdcc1_ice_core_clk_src",
 		.parent_data = gcc_parent_data_0,
 		.num_parents = 4,
-		.ops = &clk_rcg2_floor_ops,
+		.ops = &clk_rcg2_ops,
 	},
 };