[v2,07/13] arm64: dts: qcom: sc7180-trogdor: Remove fp control pins in prep for coachz

Commit Message

Doug Anderson March 1, 2021, 9:34 p.m. UTC

From: Alexandru M Stan <[e-mail]>

Removed the pinctrl and pin{mux,conf} for the control pins because:
1. The only need for them is for userspace control via flash_fp_mcu
2. cros-ec doesn't know what to do with them, and even if it did,
   it would interfere with flash_fp_mcu at the most inopportune times

Since we're not using hogs, we rely on AP firmware to set all the
control pins correctly.

Cc: Stephen Boyd <[e-mail]>
Cc: Craig Hesling <[e-mail]>
Signed-off-by: Alexandru M Stan <[e-mail]>
[dianders: adjusted since coachz isn't upstream yet]
Reviewed-by; Matthias Kaehlcke <[e-mail]>
Signed-off-by: Douglas Anderson <[e-mail]>
---

(no changes since v1)

 arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 45 +-------------------
 1 file changed, 1 insertion(+), 44 deletions(-)

Comments

Stephen Boyd March 3, 2021, 8:15 a.m. UTC | #1

Quoting Douglas Anderson (2021-03-01 13:34:31)
> From: Alexandru M Stan <[e-mail]>
> 
> Removed the pinctrl and pin{mux,conf} for the control pins because:
> 1. The only need for them is for userspace control via flash_fp_mcu
> 2. cros-ec doesn't know what to do with them, and even if it did,
>    it would interfere with flash_fp_mcu at the most inopportune times
> 
> Since we're not using hogs, we rely on AP firmware to set all the
> control pins correctly.
> 
> Cc: Stephen Boyd <[e-mail]>
> Cc: Craig Hesling <[e-mail]>
> Signed-off-by: Alexandru M Stan <[e-mail]>
> [dianders: adjusted since coachz isn't upstream yet]
> Reviewed-by; Matthias Kaehlcke <[e-mail]>
> Signed-off-by: Douglas Anderson <[e-mail]>
> ---

Reviewed-by: Stephen Boyd <[e-mail]>

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
index 8ae9606351a6..c44be536b288 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
@@ -810,7 +810,7 @@  cros_ec_fp: ec@0 {
 		interrupt-parent = <&tlmm>;
 		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>, <&fpmcu_sel>;
+		pinctrl-0 = <&fp_to_ap_irq_l>;
 		spi-max-frequency = <3000000>;
 	};
 };
@@ -1235,48 +1235,6 @@  pinconf {
 		};
 	};
 
-	fpmcu_boot0: fpmcu-boot0 {
-		pinmux {
-			pins = "gpio10";
-			function = "gpio";
-		};
-
-		pinconf {
-			pins = "gpio10";
-			bias-disable;
-			drive-strength = <2>;
-			output-low;
-		};
-	};
-
-	fpmcu_sel: fpmcu-sel {
-		pinmux {
-			pins = "gpio22";
-			function = "gpio";
-		};
-
-		pinconf {
-			pins = "gpio22";
-			bias-disable;
-			drive-strength = <2>;
-			output-high;
-		};
-	};
-
-	fp_rst_l: fp-rst-l {
-		pinmux {
-			pins = "gpio5";
-			function = "gpio";
-		};
-
-		pinconf {
-			pins = "gpio5";
-			bias-disable;
-			drive-strength = <2>;
-			output-high;
-		};
-	};
-
 	fp_to_ap_irq_l: fp-to-ap-irq-l {
 		pinmux {
 			pins = "gpio4";
@@ -1292,7 +1250,6 @@  pinconf {
 		};
 	};
 
-
 	h1_ap_int_odl: h1-ap-int-odl {
 		pinmux {
 			pins = "gpio42";