| Message ID | a92afef3-2ae8-e8c7-855d-f0e86a1beede@omprussia.ru (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Fix TRSCER masks in the Ether driver | expand |
On Sun, Feb 28, 2021 at 9:54 PM Sergey Shtylyov <s.shtylyov@omprussia.ru> wrote: > According to the SH7710, SH7712, SH7713 Group User's Manual: Hardware, > Rev. 3.00, the TRSCER register actually has only bit 7 valid (and named > differently), with all the other bits reserved. Apparently, this was not > the case with some early revisions of the manual as we have the other > bits declared (and set) in the original driver. Follow the suit and add > the explicit sh_eth_cpu_data::trscer_err_mask initializer for SH771x... > > Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet") > Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
Index: net/drivers/net/ethernet/renesas/sh_eth.c =================================================================== --- net.orig/drivers/net/ethernet/renesas/sh_eth.c +++ net/drivers/net/ethernet/renesas/sh_eth.c @@ -1089,6 +1089,9 @@ static struct sh_eth_cpu_data sh771x_dat EESIPR_CEEFIP | EESIPR_CELFIP | EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP | EESIPR_PREIP | EESIPR_CERFIP, + + .trscer_err_mask = DESC_I_RINT8, + .tsu = 1, .dual_port = 1, };
According to the SH7710, SH7712, SH7713 Group User's Manual: Hardware, Rev. 3.00, the TRSCER register actually has only bit 7 valid (and named differently), with all the other bits reserved. Apparently, this was not the case with some early revisions of the manual as we have the other bits declared (and set) in the original driver. Follow the suit and add the explicit sh_eth_cpu_data::trscer_err_mask initializer for SH771x... Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet") Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> --- drivers/net/ethernet/renesas/sh_eth.c | 3 +++ 1 file changed, 3 insertions(+)