Message ID | 20210316082104.4027260-6-mkl@pengutronix.de (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Netdev Maintainers |
Headers | show |
Series | pull-request: can 2021-03-16 | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Series ignored based on subject |
Hi all, On 16/03/21 9:20 AM, Marc Kleine-Budde wrote: > From: Angelo Dureghello <angelo@kernel-space.org> > > For cases when flexcan is built-in, bitrate is still not set at > registering. So flexcan_chip_freeze() generates: > > [ 1.860000] *** ZERO DIVIDE *** FORMAT=4 > [ 1.860000] Current process id is 1 > [ 1.860000] BAD KERNEL TRAP: 00000000 > [ 1.860000] PC: [<402e70c8>] flexcan_chip_freeze+0x1a/0xa8 > > To allow chip freeze, using an hardcoded timeout when bitrate is still > not set. > > Fixes: ec15e27cc890 ("can: flexcan: enable RX FIFO after FRZ/HALT valid") > Link: https://lore.kernel.org/r/20210315231510.650593-1-angelo@kernel-space.org > Signed-off-by: Angelo Dureghello <angelo@kernel-space.org> > [mkl: use if instead of ? operator] > Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> > --- > drivers/net/can/flexcan.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c > index 134c05757a3b..57f3635ad8d7 100644 > --- a/drivers/net/can/flexcan.c > +++ b/drivers/net/can/flexcan.c > @@ -697,9 +697,15 @@ static int flexcan_chip_disable(struct flexcan_priv *priv) > static int flexcan_chip_freeze(struct flexcan_priv *priv) > { > struct flexcan_regs __iomem *regs = priv->regs; > - unsigned int timeout = 1000 * 1000 * 10 / priv->can.bittiming.bitrate; > + unsigned int timeout; > + u32 bitrate = priv->can.bittiming.bitrate; > u32 reg; > > + if (bitrate) > + timeout = 1000 * 1000 * 10 / bitrate; > + else > + timeout = FLEXCAN_TIMEOUT_US / 10; > + > reg = priv->read(®s->mcr); > reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT; > priv->write(reg, ®s->mcr); ? Just curious, what's the issue with my "?" ? Regards, -- Angelo Dureghello
On 3/16/21 10:02 AM, Angelo Dureghello wrote: > Hi all, > > On 16/03/21 9:20 AM, Marc Kleine-Budde wrote: >> From: Angelo Dureghello <angelo@kernel-space.org> >> >> For cases when flexcan is built-in, bitrate is still not set at >> registering. So flexcan_chip_freeze() generates: >> >> [ 1.860000] *** ZERO DIVIDE *** FORMAT=4 >> [ 1.860000] Current process id is 1 >> [ 1.860000] BAD KERNEL TRAP: 00000000 >> [ 1.860000] PC: [<402e70c8>] flexcan_chip_freeze+0x1a/0xa8 >> >> To allow chip freeze, using an hardcoded timeout when bitrate is still >> not set. >> >> Fixes: ec15e27cc890 ("can: flexcan: enable RX FIFO after FRZ/HALT valid") >> Link: https://lore.kernel.org/r/20210315231510.650593-1-angelo@kernel-space.org >> Signed-off-by: Angelo Dureghello <angelo@kernel-space.org> >> [mkl: use if instead of ? operator] >> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> >> --- >> drivers/net/can/flexcan.c | 8 +++++++- >> 1 file changed, 7 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c >> index 134c05757a3b..57f3635ad8d7 100644 >> --- a/drivers/net/can/flexcan.c >> +++ b/drivers/net/can/flexcan.c >> @@ -697,9 +697,15 @@ static int flexcan_chip_disable(struct flexcan_priv *priv) >> static int flexcan_chip_freeze(struct flexcan_priv *priv) >> { >> struct flexcan_regs __iomem *regs = priv->regs; >> - unsigned int timeout = 1000 * 1000 * 10 / priv->can.bittiming.bitrate; >> + unsigned int timeout; >> + u32 bitrate = priv->can.bittiming.bitrate; >> u32 reg; >> >> + if (bitrate) >> + timeout = 1000 * 1000 * 10 / bitrate; >> + else >> + timeout = FLEXCAN_TIMEOUT_US / 10; >> + >> reg = priv->read(®s->mcr); >> reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT; >> priv->write(reg, ®s->mcr); > > ? > > Just curious, what's the issue with my "?" ? Personal preference and readability. Marc
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index 134c05757a3b..57f3635ad8d7 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -697,9 +697,15 @@ static int flexcan_chip_disable(struct flexcan_priv *priv) static int flexcan_chip_freeze(struct flexcan_priv *priv) { struct flexcan_regs __iomem *regs = priv->regs; - unsigned int timeout = 1000 * 1000 * 10 / priv->can.bittiming.bitrate; + unsigned int timeout; + u32 bitrate = priv->can.bittiming.bitrate; u32 reg; + if (bitrate) + timeout = 1000 * 1000 * 10 / bitrate; + else + timeout = FLEXCAN_TIMEOUT_US / 10; + reg = priv->read(®s->mcr); reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT; priv->write(reg, ®s->mcr);