Message ID | 1615952569-4711-1-git-send-email-victor.liu@nxp.com (mailing list archive) |
---|---|
Headers | show |
Series | Add some DRM bridge drivers support for i.MX8qm/qxp SoCs | expand |
Hi Liu I gave this a try however I believe I am still missing some piece as it throws the following during compilation of the device tree: arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_irqsteer" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_dpu_lpcg" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_dpu_lpcg" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_disp_lpcg" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_disp_lpcg" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_dpr1_channel1" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_dpr1_channel2" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_dpr1_channel3" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_dpr2_channel1" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_dpr2_channel2" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR (phandle_references): /dpu@56180000: Reference to non-existent node or label "dc0_dpr2_channel3" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:501.38-591.3: ERROR (phandle_references): /syscon@56221000: Reference to non-existent node or label "mipi_lvds_0_di_mipi_lvds_regs_lpcg" arch/arm64/boot/dts/freescale/imx8qxp.dtsi:603.29-656.7: ERROR (phandle_references): /pixel-combiner@56020000: Reference to non-existent node or label "dc0_pixel_combiner_lpcg" For now I just put all the examples from the various Documentation/devicetree/bindings/*/imx8qxp-*.yaml files directly into arch/arm64/boot/dts/freescale/imx8qxp.dtsi. Maybe you do have the various device tree parts available somewhere as well? Any suggestions? Do you by any chance have a git tree available anywhere which includes all dependencies and everything which one could try? Thanks! Cheers Marcel On Wed, 2021-03-17 at 11:42 +0800, Liu Ying wrote: > Hi, > > This is the v6 series to add some DRM bridge drivers support > for i.MX8qm/qxp SoCs. > > The bridges may chain one by one to form display pipes to support > LVDS displays. The relevant display controller is DPU embedded in > i.MX8qm/qxp SoCs. > > The DPU KMS driver can be found at: > https://www.spinics.net/lists/arm-kernel/msg878542.html > > This series supports the following display pipes: > 1) i.MX8qxp: > prefetch eng -> DPU -> pixel combiner -> pixel link -> > pixel link to DPI(PXL2DPI) -> LVDS display bridge(LDB) > > 2) i.MX8qm: > prefetch eng -> DPU -> pixel combiner -> pixel link -> LVDS display bridge(LDB) > > > This series dropped the patch 'phy: Add LVDS configuration options', as > suggested by Robert Foss, because it has already been sent with the following > series to add Mixel combo PHY found in i.MX8qxp: > https://www.spinics.net/lists/arm-kernel/msg879957.html > > So, this version depends on that series. > > > Patch 1/14 and 2/14 add bus formats used by pixel combiner. > > Patch 7/14 adds dt-binding for Control and Status Registers module(a syscon > used by PXL2DPI and LDB), which references the PXL2DPI and LDB schemas. > > Patch 10/14 adds a helper for LDB bridge drivers. > > Patch 3/14 ~ 6/14, 8/14, 9/14 and 11/14 ~ 13/14 add drm bridge drivers and > dt-bindings support for the bridges. > > Patch 14/14 updates MAINTAINERS. > > > I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and > a LVDS to HDMI bridge(with a downstream drm bridge driver). > > > Welcome comments, thanks. > > v5->v6: > * Fix data organizations in documentation(patch 2/14) for > MEDIA_BUS_FMT_RGB{666,888}_1X30-CPADLO. (Laurent) > * Add Laurent's R-b tags on patch 1/14 and 2/14. > * Drop 'select' schema from the CSR dt-binding documentation(patch 7/14). (Rob) > * Add Rob's R-b tag on patch 8/14. > > v4->v5: > * Drop the patch 'phy: Add LVDS configuration options'. (Robert) > * Add Robert's R-b tags on patch 1/14, 2/14, 4/14 and 6/14. > * Drop the 'PC_BUF_PARA_REG' register definition from the pixel combiner bridge > driver(patch 4/14). (Robert) > * Make a comment occupy a line in the pixel link bridge driver(patch 6/14). > (Robert) > * Introduce a new patch(patch 7/14) to add dt-binding for Control and Status > Registers module. (Rob) > * Make imx-ldb-helper be a pure object to be linked with i.MX8qxp LDB bridge > driver and i.MX8qm LDB bridge driver, instead of a module. Correspondingly, > rename 'imx8{qm, qxp}-ldb.c' to 'imx8{qm, qxp}-ldb-drv.c'. (Robert) > * Move 'imx_ldb_helper.h' to 'drivers/gpu/drm/bridge/imx/imx-ldb-helper.h'. > (Robert) > * s/__FSL_IMX_LDB__/__IMX_LDB_HELPER__/ for 'imx-ldb-helper.h'. > > v3->v4: > * Use 'fsl,sc-resource' DT property to get the SCU resource ID associated with > the PXL2DPI instance instead of using alias ID. (Rob) > * Add Rob's R-b tag on patch 11/14. > > v2->v3: > * Drop 'fsl,syscon' DT properties from fsl,imx8qxp-ldb.yaml and > fsl,imx8qxp-pxl2dpi.yaml. (Rob) > * Mention the CSR module controls LDB and PXL2DPI in fsl,imx8qxp-ldb.yaml and > fsl,imx8qxp-pxl2dpi.yaml. > * Call syscon_node_to_regmap() to get regmaps from LDB bridge helper driver > and PXL2DPI bridger driver instead of syscon_regmap_lookup_by_phandle(). > * Drop two macros from pixel link bridge driver which help define functions > and define them directly. > * Properly disable all pixel link controls to POR value by calling > imx8qxp_pixel_link_disable_all_controls() from > imx8qxp_pixel_link_bridge_probe(). > * Add Rob's R-b tags on patch 4/14 and 6/14. > > v1->v2: > * Rebase the series upon the latest drm-misc-next branch(5.11-rc2 based). > * Use graph schema in the dt-bindings of the bridges. (Laurent) > * Require all four pixel link output ports in fsl,imx8qxp-pixel-link.yaml. > (Laurent) > * Side note i.MX8qm/qxp LDB official name 'pixel mapper' in fsl,imx8qxp-ldb.yaml. > (Laurent) > * Mention pixel link is accessed via SCU firmware in fsl,imx8qxp-pixel-link.yaml. > (Rob) > * Use enum instead of oneOf + const for the reg property of pixel combiner > channels in fsl,imx8qxp-pixel-combiner.yaml. (Rob) > * Rewrite the function to find the next bridge in pixel link bridge driver > by properly using OF APIs and dropping unnecessary DT validation. (Rob) > * Drop unnecessary port availability check in i.MX8qxp pixel link to DPI > bridge driver. > * Drop unnecessary DT validation from i.MX8qxp LDB bridge driver. > * Use of_graph_get_endpoint_by_regs() and of_graph_get_remote_endpoint() to > get the input remote endpoint in imx8qxp_ldb_set_di_id() of i.MX8qxp LDB > bridge driver. > * Avoid using companion_port OF node after putting it in > imx8qxp_ldb_parse_dt_companion() of i.MX8qxp LDB bridge driver. > * Drop unnecessary check for maximum available LDB channels from > i.MX8qm LDB bridge driver. > * Mention i.MX8qm/qxp LDB official name 'pixel mapper' in i.MX8qm/qxp LDB > bridge drivers and Kconfig help messages. > > Liu Ying (14): > media: uapi: Add some RGB bus formats for i.MX8qm/qxp pixel combiner > media: docs: Add some RGB bus formats for i.MX8qm/qxp pixel combiner > dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding > drm/bridge: imx: Add i.MX8qm/qxp pixel combiner support > dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link > binding > drm/bridge: imx: Add i.MX8qm/qxp display pixel link support > dt-bindings: mfd: Add i.MX8qm/qxp Control and Status Registers module > binding > dt-bindings: display: bridge: Add i.MX8qxp pixel link to DPI binding > drm/bridge: imx: Add i.MX8qxp pixel link to DPI support > drm/bridge: imx: Add LDB driver helper support > dt-bindings: display: bridge: Add i.MX8qm/qxp LVDS display bridge > binding > drm/bridge: imx: Add LDB support for i.MX8qxp > drm/bridge: imx: Add LDB support for i.MX8qm > MAINTAINERS: add maintainer for DRM bridge drivers for i.MX SoCs > > .../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 173 +++++ > .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 144 +++++ > .../display/bridge/fsl,imx8qxp-pixel-link.yaml | 106 +++ > .../display/bridge/fsl,imx8qxp-pxl2dpi.yaml | 108 ++++ > .../devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml | 192 ++++++ > .../userspace-api/media/v4l/subdev-formats.rst | 156 +++++ > MAINTAINERS | 10 + > drivers/gpu/drm/bridge/Kconfig | 2 + > drivers/gpu/drm/bridge/Makefile | 1 + > drivers/gpu/drm/bridge/imx/Kconfig | 42 ++ > drivers/gpu/drm/bridge/imx/Makefile | 9 + > drivers/gpu/drm/bridge/imx/imx-ldb-helper.c | 232 +++++++ > drivers/gpu/drm/bridge/imx/imx-ldb-helper.h | 98 +++ > drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c | 586 +++++++++++++++++ > drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c | 720 +++++++++++++++++++++ > .../gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c | 448 +++++++++++++ > drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 427 ++++++++++++ > drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 485 ++++++++++++++ > include/uapi/linux/media-bus-format.h | 6 +- > 19 files changed, 3944 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml > create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml > create mode 100644 drivers/gpu/drm/bridge/imx/Kconfig > create mode 100644 drivers/gpu/drm/bridge/imx/Makefile > create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.h > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c
Hi Liu Some further discrepancy with them binding examples: arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format): /dpu@56180000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning (reg_format): /syscon@56221000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) arch/arm64/boot/dts/freescale/imx8qxp.dtsi:601.9-34: Warning (reg_format): /phy@56228300:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) arch/arm64/boot/dts/freescale/imx8qxp.dtsi:613.9-36: Warning (reg_format): /pixel-combiner@56020000:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) And with that I am unable to bring it up: [ 1.714498] imx8qxp-ldb 5622100000001000.syscon:ldb: [drm:ldb_init_helper] *ERROR* failed to get regmap: -12 [ 1.724441] imx8qxp-ldb: probe of 5622100000001000.syscon:ldb failed with error -12 [ 1.734983] imx8qxp-pixel-combiner 5602000000010000.pixel-combiner: invalid resource [ 1.742830] imx8qxp-pixel-combiner: probe of 5602000000010000.pixel-combiner failed with error -22 [ 1.754040] imx8qxp-display-pixel-link dc0-pixel-link0: [drm:imx8qxp_pixel_link_bridge_probe] *ERROR* failed to get pixel link node alias id: -19 [ 1.769626] imx8qxp-pxl2dpi 5622100000001000.syscon:pxl2dpi: [drm:imx8qxp_pxl2dpi_bridge_probe] *ERROR* failed to get regmap: -12 [ 1.781397] imx8qxp-pxl2dpi: probe of 5622100000001000.syscon:pxl2dpi failed with error -12 [ 1.840547] imx8qxp-lpcg-clk 59580000.clock-controller: deferred probe timeout, ignoring dependency [ 1.840571] imx8qxp-lpcg-clk: probe of 59580000.clock-controller failed with error -110 Any suggestions welcome. Thanks! Cheers Marcel On Wed, 2021-03-17 at 11:42 +0800, Liu Ying wrote: > Hi, > > This is the v6 series to add some DRM bridge drivers support > for i.MX8qm/qxp SoCs. > > The bridges may chain one by one to form display pipes to support > LVDS displays. The relevant display controller is DPU embedded in > i.MX8qm/qxp SoCs. > > The DPU KMS driver can be found at: > https://www.spinics.net/lists/arm-kernel/msg878542.html > > This series supports the following display pipes: > 1) i.MX8qxp: > prefetch eng -> DPU -> pixel combiner -> pixel link -> > pixel link to DPI(PXL2DPI) -> LVDS display bridge(LDB) > > 2) i.MX8qm: > prefetch eng -> DPU -> pixel combiner -> pixel link -> LVDS display bridge(LDB) > > > This series dropped the patch 'phy: Add LVDS configuration options', as > suggested by Robert Foss, because it has already been sent with the following > series to add Mixel combo PHY found in i.MX8qxp: > https://www.spinics.net/lists/arm-kernel/msg879957.html > > So, this version depends on that series. > > > Patch 1/14 and 2/14 add bus formats used by pixel combiner. > > Patch 7/14 adds dt-binding for Control and Status Registers module(a syscon > used by PXL2DPI and LDB), which references the PXL2DPI and LDB schemas. > > Patch 10/14 adds a helper for LDB bridge drivers. > > Patch 3/14 ~ 6/14, 8/14, 9/14 and 11/14 ~ 13/14 add drm bridge drivers and > dt-bindings support for the bridges. > > Patch 14/14 updates MAINTAINERS. > > > I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and > a LVDS to HDMI bridge(with a downstream drm bridge driver). > > > Welcome comments, thanks. > > v5->v6: > * Fix data organizations in documentation(patch 2/14) for > MEDIA_BUS_FMT_RGB{666,888}_1X30-CPADLO. (Laurent) > * Add Laurent's R-b tags on patch 1/14 and 2/14. > * Drop 'select' schema from the CSR dt-binding documentation(patch 7/14). (Rob) > * Add Rob's R-b tag on patch 8/14. > > v4->v5: > * Drop the patch 'phy: Add LVDS configuration options'. (Robert) > * Add Robert's R-b tags on patch 1/14, 2/14, 4/14 and 6/14. > * Drop the 'PC_BUF_PARA_REG' register definition from the pixel combiner bridge > driver(patch 4/14). (Robert) > * Make a comment occupy a line in the pixel link bridge driver(patch 6/14). > (Robert) > * Introduce a new patch(patch 7/14) to add dt-binding for Control and Status > Registers module. (Rob) > * Make imx-ldb-helper be a pure object to be linked with i.MX8qxp LDB bridge > driver and i.MX8qm LDB bridge driver, instead of a module. Correspondingly, > rename 'imx8{qm, qxp}-ldb.c' to 'imx8{qm, qxp}-ldb-drv.c'. (Robert) > * Move 'imx_ldb_helper.h' to 'drivers/gpu/drm/bridge/imx/imx-ldb-helper.h'. > (Robert) > * s/__FSL_IMX_LDB__/__IMX_LDB_HELPER__/ for 'imx-ldb-helper.h'. > > v3->v4: > * Use 'fsl,sc-resource' DT property to get the SCU resource ID associated with > the PXL2DPI instance instead of using alias ID. (Rob) > * Add Rob's R-b tag on patch 11/14. > > v2->v3: > * Drop 'fsl,syscon' DT properties from fsl,imx8qxp-ldb.yaml and > fsl,imx8qxp-pxl2dpi.yaml. (Rob) > * Mention the CSR module controls LDB and PXL2DPI in fsl,imx8qxp-ldb.yaml and > fsl,imx8qxp-pxl2dpi.yaml. > * Call syscon_node_to_regmap() to get regmaps from LDB bridge helper driver > and PXL2DPI bridger driver instead of syscon_regmap_lookup_by_phandle(). > * Drop two macros from pixel link bridge driver which help define functions > and define them directly. > * Properly disable all pixel link controls to POR value by calling > imx8qxp_pixel_link_disable_all_controls() from > imx8qxp_pixel_link_bridge_probe(). > * Add Rob's R-b tags on patch 4/14 and 6/14. > > v1->v2: > * Rebase the series upon the latest drm-misc-next branch(5.11-rc2 based). > * Use graph schema in the dt-bindings of the bridges. (Laurent) > * Require all four pixel link output ports in fsl,imx8qxp-pixel-link.yaml. > (Laurent) > * Side note i.MX8qm/qxp LDB official name 'pixel mapper' in fsl,imx8qxp-ldb.yaml. > (Laurent) > * Mention pixel link is accessed via SCU firmware in fsl,imx8qxp-pixel-link.yaml. > (Rob) > * Use enum instead of oneOf + const for the reg property of pixel combiner > channels in fsl,imx8qxp-pixel-combiner.yaml. (Rob) > * Rewrite the function to find the next bridge in pixel link bridge driver > by properly using OF APIs and dropping unnecessary DT validation. (Rob) > * Drop unnecessary port availability check in i.MX8qxp pixel link to DPI > bridge driver. > * Drop unnecessary DT validation from i.MX8qxp LDB bridge driver. > * Use of_graph_get_endpoint_by_regs() and of_graph_get_remote_endpoint() to > get the input remote endpoint in imx8qxp_ldb_set_di_id() of i.MX8qxp LDB > bridge driver. > * Avoid using companion_port OF node after putting it in > imx8qxp_ldb_parse_dt_companion() of i.MX8qxp LDB bridge driver. > * Drop unnecessary check for maximum available LDB channels from > i.MX8qm LDB bridge driver. > * Mention i.MX8qm/qxp LDB official name 'pixel mapper' in i.MX8qm/qxp LDB > bridge drivers and Kconfig help messages. > > Liu Ying (14): > media: uapi: Add some RGB bus formats for i.MX8qm/qxp pixel combiner > media: docs: Add some RGB bus formats for i.MX8qm/qxp pixel combiner > dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding > drm/bridge: imx: Add i.MX8qm/qxp pixel combiner support > dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link > binding > drm/bridge: imx: Add i.MX8qm/qxp display pixel link support > dt-bindings: mfd: Add i.MX8qm/qxp Control and Status Registers module > binding > dt-bindings: display: bridge: Add i.MX8qxp pixel link to DPI binding > drm/bridge: imx: Add i.MX8qxp pixel link to DPI support > drm/bridge: imx: Add LDB driver helper support > dt-bindings: display: bridge: Add i.MX8qm/qxp LVDS display bridge > binding > drm/bridge: imx: Add LDB support for i.MX8qxp > drm/bridge: imx: Add LDB support for i.MX8qm > MAINTAINERS: add maintainer for DRM bridge drivers for i.MX SoCs > > .../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 173 +++++ > .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 144 +++++ > .../display/bridge/fsl,imx8qxp-pixel-link.yaml | 106 +++ > .../display/bridge/fsl,imx8qxp-pxl2dpi.yaml | 108 ++++ > .../devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml | 192 ++++++ > .../userspace-api/media/v4l/subdev-formats.rst | 156 +++++ > MAINTAINERS | 10 + > drivers/gpu/drm/bridge/Kconfig | 2 + > drivers/gpu/drm/bridge/Makefile | 1 + > drivers/gpu/drm/bridge/imx/Kconfig | 42 ++ > drivers/gpu/drm/bridge/imx/Makefile | 9 + > drivers/gpu/drm/bridge/imx/imx-ldb-helper.c | 232 +++++++ > drivers/gpu/drm/bridge/imx/imx-ldb-helper.h | 98 +++ > drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c | 586 +++++++++++++++++ > drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c | 720 +++++++++++++++++++++ > .../gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c | 448 +++++++++++++ > drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 427 ++++++++++++ > drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 485 ++++++++++++++ > include/uapi/linux/media-bus-format.h | 6 +- > 19 files changed, 3944 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml > create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml > create mode 100644 drivers/gpu/drm/bridge/imx/Kconfig > create mode 100644 drivers/gpu/drm/bridge/imx/Makefile > create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.h > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c
On Tue, 2021-03-23 at 01:03 +0000, Marcel Ziswiler wrote: > Hi Liu > > Some further discrepancy with them binding examples: > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format): /dpu@56180000:reg: property has > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning (reg_format): /syscon@56221000:reg: property has > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:601.9-34: Warning (reg_format): /phy@56228300:reg: property has > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:613.9-36: Warning (reg_format): /pixel-combiner@56020000:reg: > property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > And with that I am unable to bring it up: > > [ 1.714498] imx8qxp-ldb 5622100000001000.syscon:ldb: [drm:ldb_init_helper] *ERROR* failed to get regmap: -12 > [ 1.724441] imx8qxp-ldb: probe of 5622100000001000.syscon:ldb failed with error -12 > [ 1.734983] imx8qxp-pixel-combiner 5602000000010000.pixel-combiner: invalid resource > [ 1.742830] imx8qxp-pixel-combiner: probe of 5602000000010000.pixel-combiner failed with error -22 > [ 1.754040] imx8qxp-display-pixel-link dc0-pixel-link0: [drm:imx8qxp_pixel_link_bridge_probe] *ERROR* failed > to get pixel link node alias id: -19 > [ 1.769626] imx8qxp-pxl2dpi 5622100000001000.syscon:pxl2dpi: [drm:imx8qxp_pxl2dpi_bridge_probe] *ERROR* > failed to get regmap: -12 > [ 1.781397] imx8qxp-pxl2dpi: probe of 5622100000001000.syscon:pxl2dpi failed with error -12 > [ 1.840547] imx8qxp-lpcg-clk 59580000.clock-controller: deferred probe timeout, ignoring dependency > [ 1.840571] imx8qxp-lpcg-clk: probe of 59580000.clock-controller failed with error -110 > > Any suggestions welcome. Thanks! Please reference the patch set I shared in my last reply and see how it goes. Thanks. Liu Ying > > Cheers > > Marcel > > On Wed, 2021-03-17 at 11:42 +0800, Liu Ying wrote: > > Hi, > > > > This is the v6 series to add some DRM bridge drivers support > > for i.MX8qm/qxp SoCs. > > > > The bridges may chain one by one to form display pipes to support > > LVDS displays. The relevant display controller is DPU embedded in > > i.MX8qm/qxp SoCs. > > > > The DPU KMS driver can be found at: > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.spinics.net%2Flists%2Farm-kernel%2Fmsg878542.html&data=04%7C01%7Cvictor.liu%40nxp.com%7C23e9e19a27ae45007db608d8ed977152%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637520581990271723%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=LziYbGruJmOb70UWGvx%2BX0Fx3gsoEtubdiNBpuKcjXw%3D&reserved=0 > > > > This series supports the following display pipes: > > 1) i.MX8qxp: > > prefetch eng -> DPU -> pixel combiner -> pixel link -> > > pixel link to DPI(PXL2DPI) -> LVDS display bridge(LDB) > > > > 2) i.MX8qm: > > prefetch eng -> DPU -> pixel combiner -> pixel link -> LVDS display bridge(LDB) > > > > > > This series dropped the patch 'phy: Add LVDS configuration options', as > > suggested by Robert Foss, because it has already been sent with the following > > series to add Mixel combo PHY found in i.MX8qxp: > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.spinics.net%2Flists%2Farm-kernel%2Fmsg879957.html&data=04%7C01%7Cvictor.liu%40nxp.com%7C23e9e19a27ae45007db608d8ed977152%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637520581990271723%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=lPUkWoIHjpBM5dZjFiaNjmQaQgcfIAHx%2FyRtQjZ%2B3po%3D&reserved=0 > > > > So, this version depends on that series. > > > > > > Patch 1/14 and 2/14 add bus formats used by pixel combiner. > > > > Patch 7/14 adds dt-binding for Control and Status Registers module(a syscon > > used by PXL2DPI and LDB), which references the PXL2DPI and LDB schemas. > > > > Patch 10/14 adds a helper for LDB bridge drivers. > > > > Patch 3/14 ~ 6/14, 8/14, 9/14 and 11/14 ~ 13/14 add drm bridge drivers and > > dt-bindings support for the bridges. > > > > Patch 14/14 updates MAINTAINERS. > > > > > > I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and > > a LVDS to HDMI bridge(with a downstream drm bridge driver). > > > > > > Welcome comments, thanks. > > > > v5->v6: > > * Fix data organizations in documentation(patch 2/14) for > > MEDIA_BUS_FMT_RGB{666,888}_1X30-CPADLO. (Laurent) > > * Add Laurent's R-b tags on patch 1/14 and 2/14. > > * Drop 'select' schema from the CSR dt-binding documentation(patch 7/14). (Rob) > > * Add Rob's R-b tag on patch 8/14. > > > > v4->v5: > > * Drop the patch 'phy: Add LVDS configuration options'. (Robert) > > * Add Robert's R-b tags on patch 1/14, 2/14, 4/14 and 6/14. > > * Drop the 'PC_BUF_PARA_REG' register definition from the pixel combiner bridge > > driver(patch 4/14). (Robert) > > * Make a comment occupy a line in the pixel link bridge driver(patch 6/14). > > (Robert) > > * Introduce a new patch(patch 7/14) to add dt-binding for Control and Status > > Registers module. (Rob) > > * Make imx-ldb-helper be a pure object to be linked with i.MX8qxp LDB bridge > > driver and i.MX8qm LDB bridge driver, instead of a module. Correspondingly, > > rename 'imx8{qm, qxp}-ldb.c' to 'imx8{qm, qxp}-ldb-drv.c'. (Robert) > > * Move 'imx_ldb_helper.h' to 'drivers/gpu/drm/bridge/imx/imx-ldb-helper.h'. > > (Robert) > > * s/__FSL_IMX_LDB__/__IMX_LDB_HELPER__/ for 'imx-ldb-helper.h'. > > > > v3->v4: > > * Use 'fsl,sc-resource' DT property to get the SCU resource ID associated with > > the PXL2DPI instance instead of using alias ID. (Rob) > > * Add Rob's R-b tag on patch 11/14. > > > > v2->v3: > > * Drop 'fsl,syscon' DT properties from fsl,imx8qxp-ldb.yaml and > > fsl,imx8qxp-pxl2dpi.yaml. (Rob) > > * Mention the CSR module controls LDB and PXL2DPI in fsl,imx8qxp-ldb.yaml and > > fsl,imx8qxp-pxl2dpi.yaml. > > * Call syscon_node_to_regmap() to get regmaps from LDB bridge helper driver > > and PXL2DPI bridger driver instead of syscon_regmap_lookup_by_phandle(). > > * Drop two macros from pixel link bridge driver which help define functions > > and define them directly. > > * Properly disable all pixel link controls to POR value by calling > > imx8qxp_pixel_link_disable_all_controls() from > > imx8qxp_pixel_link_bridge_probe(). > > * Add Rob's R-b tags on patch 4/14 and 6/14. > > > > v1->v2: > > * Rebase the series upon the latest drm-misc-next branch(5.11-rc2 based). > > * Use graph schema in the dt-bindings of the bridges. (Laurent) > > * Require all four pixel link output ports in fsl,imx8qxp-pixel-link.yaml. > > (Laurent) > > * Side note i.MX8qm/qxp LDB official name 'pixel mapper' in fsl,imx8qxp-ldb.yaml. > > (Laurent) > > * Mention pixel link is accessed via SCU firmware in fsl,imx8qxp-pixel-link.yaml. > > (Rob) > > * Use enum instead of oneOf + const for the reg property of pixel combiner > > channels in fsl,imx8qxp-pixel-combiner.yaml. (Rob) > > * Rewrite the function to find the next bridge in pixel link bridge driver > > by properly using OF APIs and dropping unnecessary DT validation. (Rob) > > * Drop unnecessary port availability check in i.MX8qxp pixel link to DPI > > bridge driver. > > * Drop unnecessary DT validation from i.MX8qxp LDB bridge driver. > > * Use of_graph_get_endpoint_by_regs() and of_graph_get_remote_endpoint() to > > get the input remote endpoint in imx8qxp_ldb_set_di_id() of i.MX8qxp LDB > > bridge driver. > > * Avoid using companion_port OF node after putting it in > > imx8qxp_ldb_parse_dt_companion() of i.MX8qxp LDB bridge driver. > > * Drop unnecessary check for maximum available LDB channels from > > i.MX8qm LDB bridge driver. > > * Mention i.MX8qm/qxp LDB official name 'pixel mapper' in i.MX8qm/qxp LDB > > bridge drivers and Kconfig help messages. > > > > Liu Ying (14): > > media: uapi: Add some RGB bus formats for i.MX8qm/qxp pixel combiner > > media: docs: Add some RGB bus formats for i.MX8qm/qxp pixel combiner > > dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding > > drm/bridge: imx: Add i.MX8qm/qxp pixel combiner support > > dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link > > binding > > drm/bridge: imx: Add i.MX8qm/qxp display pixel link support > > dt-bindings: mfd: Add i.MX8qm/qxp Control and Status Registers module > > binding > > dt-bindings: display: bridge: Add i.MX8qxp pixel link to DPI binding > > drm/bridge: imx: Add i.MX8qxp pixel link to DPI support > > drm/bridge: imx: Add LDB driver helper support > > dt-bindings: display: bridge: Add i.MX8qm/qxp LVDS display bridge > > binding > > drm/bridge: imx: Add LDB support for i.MX8qxp > > drm/bridge: imx: Add LDB support for i.MX8qm > > MAINTAINERS: add maintainer for DRM bridge drivers for i.MX SoCs > > > > .../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 173 +++++ > > .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 144 +++++ > > .../display/bridge/fsl,imx8qxp-pixel-link.yaml | 106 +++ > > .../display/bridge/fsl,imx8qxp-pxl2dpi.yaml | 108 ++++ > > .../devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml | 192 ++++++ > > .../userspace-api/media/v4l/subdev-formats.rst | 156 +++++ > > MAINTAINERS | 10 + > > drivers/gpu/drm/bridge/Kconfig | 2 + > > drivers/gpu/drm/bridge/Makefile | 1 + > > drivers/gpu/drm/bridge/imx/Kconfig | 42 ++ > > drivers/gpu/drm/bridge/imx/Makefile | 9 + > > drivers/gpu/drm/bridge/imx/imx-ldb-helper.c | 232 +++++++ > > drivers/gpu/drm/bridge/imx/imx-ldb-helper.h | 98 +++ > > drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c | 586 +++++++++++++++++ > > drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c | 720 +++++++++++++++++++++ > > .../gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c | 448 +++++++++++++ > > drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 427 ++++++++++++ > > drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 485 ++++++++++++++ > > include/uapi/linux/media-bus-format.h | 6 +- > > 19 files changed, 3944 insertions(+), 1 deletion(-) > > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml > > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml > > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml > > create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml > > create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml > > create mode 100644 drivers/gpu/drm/bridge/imx/Kconfig > > create mode 100644 drivers/gpu/drm/bridge/imx/Makefile > > create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.c > > create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.h > > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c > > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c > > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c > > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c > > create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c
Hi Liu On Tue, 2021-03-23 at 17:09 +0800, Liu Ying wrote: > On Tue, 2021-03-23 at 01:03 +0000, Marcel Ziswiler wrote: > > Hi Liu > > > > Some further discrepancy with them binding examples: > > > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format): /dpu@56180000:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning (reg_format): /syscon@56221000:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:601.9-34: Warning (reg_format): /phy@56228300:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:613.9-36: Warning (reg_format): /pixel-combiner@56020000:reg: > > property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > > > And with that I am unable to bring it up: > > > > [ 1.714498] imx8qxp-ldb 5622100000001000.syscon:ldb: [drm:ldb_init_helper] *ERROR* failed to get regmap: - > > 12 > > [ 1.724441] imx8qxp-ldb: probe of 5622100000001000.syscon:ldb failed with error -12 > > [ 1.734983] imx8qxp-pixel-combiner 5602000000010000.pixel-combiner: invalid resource > > [ 1.742830] imx8qxp-pixel-combiner: probe of 5602000000010000.pixel-combiner failed with error -22 > > [ 1.754040] imx8qxp-display-pixel-link dc0-pixel-link0: [drm:imx8qxp_pixel_link_bridge_probe] *ERROR* > > failed > > to get pixel link node alias id: -19 > > [ 1.769626] imx8qxp-pxl2dpi 5622100000001000.syscon:pxl2dpi: [drm:imx8qxp_pxl2dpi_bridge_probe] *ERROR* > > failed to get regmap: -12 > > [ 1.781397] imx8qxp-pxl2dpi: probe of 5622100000001000.syscon:pxl2dpi failed with error -12 > > [ 1.840547] imx8qxp-lpcg-clk 59580000.clock-controller: deferred probe timeout, ignoring dependency > > [ 1.840571] imx8qxp-lpcg-clk: probe of 59580000.clock-controller failed with error -110 > > > > Any suggestions welcome. Thanks! > > Please reference the patch set I shared in my last reply and see how it > goes. Thanks. Thank you very much. After a little bit of fiddling I can confirm that this also works fine on a Toradex Colibri iMX8X [1] with either a Capacitive Touch Display 10.1" LVDS which has a Logic Technologies LT170410- 2WHC [2] single-channel panel inside or a dual-channel LG LP156WF1 full HD panel. During boot I noticed quite some clocking/power domain related messages: [ 0.537965] gpt0_clk: failed to attached the power domain -2 [ 0.562372] dc1_disp0_clk: failed to attached the power domain -2 [ 0.562800] dc1_disp0_clk: failed to get clock parent -22 [ 0.562858] dc1_disp0_clk: failed to get clock rate -22 [ 0.563059] dc1_disp1_clk: failed to attached the power domain -2 [ 0.563463] dc1_disp1_clk: failed to get clock parent -22 [ 0.563514] dc1_disp1_clk: failed to get clock rate -22 [ 0.563773] dc1_pll0_clk: failed to attached the power domain -2 [ 0.564174] dc1_pll0_clk: failed to get clock rate -22 [ 0.564413] dc1_pll1_clk: failed to attached the power domain -2 [ 0.564838] dc1_pll1_clk: failed to get clock rate -22 [ 0.565099] dc1_bypass0_clk: failed to attached the power domain -2 [ 0.565516] dc1_bypass0_clk: failed to get clock rate -22 [ 0.565755] dc1_bypass1_clk: failed to attached the power domain -2 [ 0.566159] dc1_bypass1_clk: failed to get clock rate -22 [ 0.574493] lvds0_i2c0_clk: failed to attached the power domain -2 [ 0.574894] lvds0_i2c0_clk: failed to get clock rate -22 [ 0.575134] lvds0_i2c1_clk: failed to attached the power domain -2 [ 0.575526] lvds0_i2c1_clk: failed to get clock rate -22 [ 0.575785] lvds0_pwm0_clk: failed to attached the power domain -2 [ 0.576189] lvds0_pwm0_clk: failed to get clock rate -22 [ 0.576417] lvds1_i2c0_clk: failed to attached the power domain -2 [ 0.576854] lvds1_i2c0_clk: failed to get clock rate -22 [ 0.577129] lvds1_i2c1_clk: failed to attached the power domain -2 [ 0.577554] lvds1_i2c1_clk: failed to get clock rate -22 [ 0.577787] lvds1_pwm0_clk: failed to attached the power domain -2 [ 0.578198] lvds1_pwm0_clk: failed to get clock rate -22 [ 0.578464] mipi_csi0_core_clk: failed to attached the power domain -2 [ 0.579104] mipi_csi0_esc_clk: failed to attached the power domain -2 [ 0.579738] mipi_csi0_i2c0_clk: failed to attached the power domain -2 [ 0.580368] mipi_csi0_pwm0_clk: failed to attached the power domain -2 And the following repeats a couple dozens of times: [ 4.391495] dc1_disp0_clk: failed to get clock parent -22 [ 4.398532] dc1_disp1_clk: failed to get clock parent -22 And finally it spits the following: [ 4.670303] imx8qxp-lpcg-clk 59580000.clock-controller: deferred probe timeout, ignoring dependency [ 4.679629] imx8qxp-lpcg-clk: probe of 59580000.clock-controller failed with error -110 Despite those messages the displays do work fine once booted. I am currently running this with SCFW, SECO, TF-A and U-Boot based off NXP's latest downstream BSP 5.4.70- 2.3.0. Not sure whether or not especially the used SCFW version could cause some issues. What SCFW are you using? Full boot logs may be found here [3]. You may add the following to the whole series. Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # Colibri iMX8X, LT170410-2WHC, LP156WF1 Thanks again and just let us know if we may test anything else for you. [1] commit ba5a5615d54f ("arm64: dts: freescale: add initial support for colibri imx8x") [2] commit 5728fe7fa539 ("drm/panel: simple: add display timings for logic technologies displays") [3] https://share.toradex.com/s30wwspcr9iwyrg > Liu Ying Cheers Marcel
Hi Marcel, On Mon, 2021-03-29 at 00:49 +0000, Marcel Ziswiler wrote: > Hi Liu > > On Tue, 2021-03-23 at 17:09 +0800, Liu Ying wrote: > > On Tue, 2021-03-23 at 01:03 +0000, Marcel Ziswiler wrote: > > > Hi Liu > > > > > > Some further discrepancy with them binding examples: > > > > > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format): /dpu@56180000:reg: property has > > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning (reg_format): /syscon@56221000:reg: property has > > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:601.9-34: Warning (reg_format): /phy@56228300:reg: property has > > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:613.9-36: Warning (reg_format): /pixel-combiner@56020000:reg: > > > property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > > > > > And with that I am unable to bring it up: > > > > > > [ 1.714498] imx8qxp-ldb 5622100000001000.syscon:ldb: [drm:ldb_init_helper] *ERROR* failed to get regmap: - > > > 12 > > > [ 1.724441] imx8qxp-ldb: probe of 5622100000001000.syscon:ldb failed with error -12 > > > [ 1.734983] imx8qxp-pixel-combiner 5602000000010000.pixel-combiner: invalid resource > > > [ 1.742830] imx8qxp-pixel-combiner: probe of 5602000000010000.pixel-combiner failed with error -22 > > > [ 1.754040] imx8qxp-display-pixel-link dc0-pixel-link0: [drm:imx8qxp_pixel_link_bridge_probe] *ERROR* > > > failed > > > to get pixel link node alias id: -19 > > > [ 1.769626] imx8qxp-pxl2dpi 5622100000001000.syscon:pxl2dpi: [drm:imx8qxp_pxl2dpi_bridge_probe] *ERROR* > > > failed to get regmap: -12 > > > [ 1.781397] imx8qxp-pxl2dpi: probe of 5622100000001000.syscon:pxl2dpi failed with error -12 > > > [ 1.840547] imx8qxp-lpcg-clk 59580000.clock-controller: deferred probe timeout, ignoring dependency > > > [ 1.840571] imx8qxp-lpcg-clk: probe of 59580000.clock-controller failed with error -110 > > > > > > Any suggestions welcome. Thanks! > > > > Please reference the patch set I shared in my last reply and see how it > > goes. Thanks. > > Thank you very much. After a little bit of fiddling I can confirm that this also works fine on a Toradex > Colibri iMX8X [1] with either a Capacitive Touch Display 10.1" LVDS which has a Logic Technologies LT170410- > 2WHC [2] single-channel panel inside or a dual-channel LG LP156WF1 full HD panel. Thanks a lot for your testing! Glad to know that the two LVDS panels work on Toradex Colibri iMX8X. > > During boot I noticed quite some clocking/power domain related messages: > > [ 0.537965] gpt0_clk: failed to attached the power domain -2 > > [ 0.562372] dc1_disp0_clk: failed to attached the power domain -2 > [ 0.562800] dc1_disp0_clk: failed to get clock parent -22 > [ 0.562858] dc1_disp0_clk: failed to get clock rate -22 > > [ 0.563059] dc1_disp1_clk: failed to attached the power domain -2 > [ 0.563463] dc1_disp1_clk: failed to get clock parent -22 > [ 0.563514] dc1_disp1_clk: failed to get clock rate -22 > > [ 0.563773] dc1_pll0_clk: failed to attached the power domain -2 > [ 0.564174] dc1_pll0_clk: failed to get clock rate -22 > > [ 0.564413] dc1_pll1_clk: failed to attached the power domain -2 > [ 0.564838] dc1_pll1_clk: failed to get clock rate -22 > > [ 0.565099] dc1_bypass0_clk: failed to attached the power domain -2 > [ 0.565516] dc1_bypass0_clk: failed to get clock rate -22 > > [ 0.565755] dc1_bypass1_clk: failed to attached the power domain -2 > [ 0.566159] dc1_bypass1_clk: failed to get clock rate -22 > > [ 0.574493] lvds0_i2c0_clk: failed to attached the power domain -2 > [ 0.574894] lvds0_i2c0_clk: failed to get clock rate -22 > > [ 0.575134] lvds0_i2c1_clk: failed to attached the power domain -2 > [ 0.575526] lvds0_i2c1_clk: failed to get clock rate -22 > > [ 0.575785] lvds0_pwm0_clk: failed to attached the power domain -2 > [ 0.576189] lvds0_pwm0_clk: failed to get clock rate -22 > > [ 0.576417] lvds1_i2c0_clk: failed to attached the power domain -2 > [ 0.576854] lvds1_i2c0_clk: failed to get clock rate -22 > > [ 0.577129] lvds1_i2c1_clk: failed to attached the power domain -2 > [ 0.577554] lvds1_i2c1_clk: failed to get clock rate -22 > > [ 0.577787] lvds1_pwm0_clk: failed to attached the power domain -2 > [ 0.578198] lvds1_pwm0_clk: failed to get clock rate -22 > > [ 0.578464] mipi_csi0_core_clk: failed to attached the power domain -2 > > [ 0.579104] mipi_csi0_esc_clk: failed to attached the power domain -2 > > [ 0.579738] mipi_csi0_i2c0_clk: failed to attached the power domain -2 > > [ 0.580368] mipi_csi0_pwm0_clk: failed to attached the power domain -2 > > And the following repeats a couple dozens of times: > > [ 4.391495] dc1_disp0_clk: failed to get clock parent -22 > [ 4.398532] dc1_disp1_clk: failed to get clock parent -22 As I mentioned before, there will be logs like 'dc1_disp0_clk: failed to get clock parent -22' on i.MX8qxp and i.MX8qm/qxp specific clocks are not split yet. DC1 and LVDS0/1 are i.MX8qm specific. So, once they are split up, I assume there won't be those logs any more. If you don't apply the below two patches for i.MX8qm, then dc1 and lvds0/1 relevant logs won't come. That doesn't impact the i.MX8qxp displays. clk: imx: clk-imx8qxp: Add I2C and PWM SCU clocks in LVDS0/1 subsystems clk: imx: clk-imx8qxp: Add some clocks for i.MX8qm DC1 subsystem The latest Shawn's for-next branch also generates the gpt and mipi_csi relevant logs on my i.MX8qxp MEK board like below. So, they are not related to my patch set. dmesg | grep clk [ 1.091534] gpt0_clk: failed to attached the power domain -2 [ 1.133131] mipi_csi0_core_clk: failed to attached the power domain -2 [ 1.139849] mipi_csi0_esc_clk: failed to attached the power domain -2 [ 1.146441] mipi_csi0_i2c0_clk: failed to attached the power domain -2 [ 1.153312] mipi_csi0_pwm0_clk: failed to attached the power domain -2 On my i.MX8qm MEK board, the latest Shawn's for-next branch behaves like this: dmesg | grep clk [ 0.222517] a35_clk: failed to get clock rate -22 [ 0.225331] gpt0_clk: failed to attached the power domain -2 [ 0.232859] pwm_clk: failed to attached the power domain -2 [ 0.233085] pwm_clk: failed to get clock rate -22 [ 0.233158] lcd_clk: failed to attached the power domain -2 [ 0.233382] lcd_clk: failed to get clock rate -22 [ 0.246576] mipi_csi0_core_clk: failed to attached the power domain -2 [ 0.246899] mipi_csi0_esc_clk: failed to attached the power domain -2 [ 0.247218] mipi_csi0_i2c0_clk: failed to attached the power domain -2 [ 0.247515] mipi_csi0_pwm0_clk: failed to attached the power domain -2 [ 1.510195] imx8qxp-lpcg-clk 5a4a0000.clock-controller: deferred probe timeout, ignoring dependency [ 1.521361] imx8qxp-lpcg-clk: probe of 5a4a0000.clock-controller failed with error -110 @Aisheng, it looks like we'd better to suppress those warning logs soon by splitting i.MX8qm/qxp specific clocks up? > And finally it spits the following: > > [ 4.670303] imx8qxp-lpcg-clk 59580000.clock-controller: deferred probe timeout, ignoring dependency > [ 4.679629] imx8qxp-lpcg-clk: probe of 59580000.clock-controller failed with error -110 I don't see this on my i.MX8qxp MEK board. It looks like it's related to the 'dsp_lpcg: clock-controller@59580000' node in imx8-ss-audio.dtsi. Does this reproduce with Shawn's for-next branch(without my patch set) for you? > > Despite those messages the displays do work fine once booted. > > I am currently running this with SCFW, SECO, TF-A and U-Boot based off NXP's latest downstream BSP 5.4.70- > 2.3.0. Not sure whether or not especially the used SCFW version could cause some issues. What SCFW are you > using? > > Full boot logs may be found here [3]. > > You may add the following to the whole series. > > Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # Colibri iMX8X, LT170410-2WHC, LP156WF1 Thanks for your tag. > > Thanks again and just let us know if we may test anything else for you. Maybe, any Toradex i.MX8qm board with LVDS display, please? Regards, Liu Ying > > [1] commit ba5a5615d54f ("arm64: dts: freescale: add initial support for colibri imx8x") > [2] commit 5728fe7fa539 ("drm/panel: simple: add display timings for logic technologies displays") > [3] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fshare.toradex.com%2Fs30wwspcr9iwyrg&data=04%7C01%7Cvictor.liu%40nxp.com%7Ca51f827482704468d27208d8f24c75dd%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637525757505899800%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=VziEUvn3pnk7QvgIl58CuM8VHMqm6Y5xOuod4ali1Zk%3D&reserved=0 > > > Liu Ying > > Cheers > > Marcel