Message ID | 1615186237-22263-1-git-send-email-zhangshaokun@hisilicon.com (mailing list archive) |
---|---|
Headers | show |
Series | Add support for HiSilicon Hip09 uncore PMU driver | expand |
Hi all, A gentle ping? Apologies for the noise. Thanks, Shaokun On 2021/3/8 14:50, Shaokun Zhang wrote: > This patchset adds support for HiSilicon Hip09 SoC uncore PMUs driver > which is PMU v2 and it includes: > (a) Cleanup the unnecessary sanity check in patch1; > (b) Refactor interrupt registration and handler function for later > new uncore PMU driver in patch2; > (c) Update the PMU version suffiex for existing driver in patch3 > (d) Some new functions are added on L3C/HHA PMU in patch4/5; > (e) New DDRC PMU model is supported using programmable counter and > supports more events in patch6; > (f) Add new modules SLLC and PA PMU drivers in patch7/8; > (g) Update the perf document for the new functions and modules in > patch9; > > ChangeLog > v3-->v4: > 1. Rebase to Linux 5.12-rc2 > 2. Fix some typos > > v2-->v3: > 1. Address Mark's comments adding detailed description in > git commit log to introduce new filters > 2. Fix some typos > 3. Add one cleanup patch to remove redundant check > > v1-->v2: > 1. Address John's comments and fix some typos > 2. Add John's Reviewed-by tags > > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Will Deacon <will@kernel.org> > Cc: John Garry <john.garry@huawei.com> > Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Cc: Qi Liu <liuqi115@huawei.com> > > Shaokun Zhang (9): > drivers/perf: hisi: Remove unnecessary check of counter index > drivers/perf: hisi: Refactor code for more uncore PMUs > drivers/perf: hisi: Add PMU version for uncore PMU drivers. > drivers/perf: hisi: Add new functions for L3C PMU > drivers/perf: hisi: Add new functions for HHA PMU > drivers/perf: hisi: Update DDRC PMU for programmable counter > drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver > drivers/perf: hisi: Add support for HiSilicon PA PMU driver > docs: perf: Add new description on HiSilicon uncore PMU v2 > > Documentation/admin-guide/perf/hisi-pmu.rst | 49 +++ > drivers/perf/hisilicon/Makefile | 3 +- > drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 348 +++++++++++------ > drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 301 ++++++++++----- > drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 355 ++++++++++++----- > drivers/perf/hisilicon/hisi_uncore_pa_pmu.c | 500 ++++++++++++++++++++++++ > drivers/perf/hisilicon/hisi_uncore_pmu.c | 71 +++- > drivers/perf/hisilicon/hisi_uncore_pmu.h | 20 +- > drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c | 530 ++++++++++++++++++++++++++ > include/linux/cpuhotplug.h | 2 + > 10 files changed, 1864 insertions(+), 315 deletions(-) > create mode 100644 drivers/perf/hisilicon/hisi_uncore_pa_pmu.c > create mode 100644 drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c >
On Mon, 8 Mar 2021 14:50:28 +0800, Shaokun Zhang wrote: > This patchset adds support for HiSilicon Hip09 SoC uncore PMUs driver > which is PMU v2 and it includes: > (a) Cleanup the unnecessary sanity check in patch1; > (b) Refactor interrupt registration and handler function for later > new uncore PMU driver in patch2; > (c) Update the PMU version suffiex for existing driver in patch3 > (d) Some new functions are added on L3C/HHA PMU in patch4/5; > (e) New DDRC PMU model is supported using programmable counter and > supports more events in patch6; > (f) Add new modules SLLC and PA PMU drivers in patch7/8; > (g) Update the perf document for the new functions and modules in > patch9; > > [...] Applied to will (for-next/perf), thanks! [1/9] drivers/perf: hisi: Remove unnecessary check of counter index https://git.kernel.org/will/c/4e4cb8ca48bd [2/9] drivers/perf: hisi: Refactor code for more uncore PMUs https://git.kernel.org/will/c/baff06c315a1 [3/9] drivers/perf: hisi: Add PMU version for uncore PMU drivers. https://git.kernel.org/will/c/3da582df575c [4/9] drivers/perf: hisi: Add new functions for L3C PMU https://git.kernel.org/will/c/486a7f46b966 [5/9] drivers/perf: hisi: Add new functions for HHA PMU https://git.kernel.org/will/c/932f6a99f9b0 [6/9] drivers/perf: hisi: Update DDRC PMU for programmable counter https://git.kernel.org/will/c/cce03e702c9f [7/9] drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver https://git.kernel.org/will/c/3bf30882c3c7 [8/9] drivers/perf: hisi: Add support for HiSilicon PA PMU driver https://git.kernel.org/will/c/a0ab25cd82ee [9/9] docs: perf: Add new description on HiSilicon uncore PMU v2 https://git.kernel.org/will/c/9b86b1b41e0f Cheers,