diff mbox series

[21/24] hw/block: m25p80: Add support for mt25qu02g

Message ID 20210407171637.777743-22-clg@kaod.org (mailing list archive)
State New, archived
Headers show
Series aspeed: fixes and extensions | expand

Commit Message

Cédric Le Goater April 7, 2021, 5:16 p.m. UTC
The Micron mt25qu02g is a 3V 2Gb serial NOR flash memory supporting
dual I/O and quad I/O, 4KB, 32KB, 64KB sector erase. It also supports
4B opcodes.

Cc: Alistair Francis <alistair.francis@wdc.com>
Cc: Francisco Iglesias <francisco.iglesias@xilinx.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/block/m25p80.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Alistair Francis April 7, 2021, 5:36 p.m. UTC | #1
On Wed, Apr 7, 2021 at 1:35 PM Cédric Le Goater <clg@kaod.org> wrote:
>
> The Micron mt25qu02g is a 3V 2Gb serial NOR flash memory supporting
> dual I/O and quad I/O, 4KB, 32KB, 64KB sector erase. It also supports
> 4B opcodes.
>
> Cc: Alistair Francis <alistair.francis@wdc.com>
> Cc: Francisco Iglesias <francisco.iglesias@xilinx.com>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/block/m25p80.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
> index 183d3f44c259..2afb939ae28e 100644
> --- a/hw/block/m25p80.c
> +++ b/hw/block/m25p80.c
> @@ -259,6 +259,7 @@ static const FlashPartInfo known_devices[] = {
>      { INFO_STACKED("n25q00a",   0x20bb21, 0x1000, 64 << 10, 2048, ER_4K, 4) },
>      { INFO_STACKED("mt25ql01g", 0x20ba21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
>      { INFO_STACKED("mt25qu01g", 0x20bb21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
> +    { INFO_STACKED("mt25qu02g", 0x20ba22, 0x1040, 64 << 10, 4096, ER_4K, 2) },
>
>      /* Spansion -- single (large) sector size only, at least
>       * for the chips listed here (without boot sectors).
> --
> 2.26.3
>
>
Francisco Iglesias April 8, 2021, 8 a.m. UTC | #2
Hello Cedric!

On Wed, Apr 07, 2021 at 07:16:34PM +0200, Cédric Le Goater wrote:
> The Micron mt25qu02g is a 3V 2Gb serial NOR flash memory supporting
> dual I/O and quad I/O, 4KB, 32KB, 64KB sector erase. It also supports
> 4B opcodes.
> 
> Cc: Alistair Francis <alistair.francis@wdc.com>
> Cc: Francisco Iglesias <francisco.iglesias@xilinx.com>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  hw/block/m25p80.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
> index 183d3f44c259..2afb939ae28e 100644
> --- a/hw/block/m25p80.c
> +++ b/hw/block/m25p80.c
> @@ -259,6 +259,7 @@ static const FlashPartInfo known_devices[] = {
>      { INFO_STACKED("n25q00a",   0x20bb21, 0x1000, 64 << 10, 2048, ER_4K, 4) },
>      { INFO_STACKED("mt25ql01g", 0x20ba21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
>      { INFO_STACKED("mt25qu01g", 0x20bb21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
> +    { INFO_STACKED("mt25qu02g", 0x20ba22, 0x1040, 64 << 10, 4096, ER_4K, 2) },

Is it possible it should be as below instead?

{ INFO_STACKED("mt25qu02g", 0x20bb22, 0x1040, 64 << 10, 4096, ER_4K | ER_32K, 2) },

's/0x20ba22/0x20bb22/' (or 's/mt25qu02g/mt25ql02g/') since 'u' looks to stand
for 1.7-2.0 V and 'bb' for 1.8 V (see page 2 and 32 in [1]).

s/ER_4K/ER_4K | ER_32K/ since ERASE_32K is supported (see page 36). 

If you find above changes ok and go with them please add:

Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>

Best regards,
Francisco Iglesias

[1] Micron Serial NOR Flash Memory 1.8V, Multiple I/O, 64KB Sector Erase MT25QU02GCBB
    https://4donline.ihs.com/images/VipMasterIC/IC/MICT/MICT-S-A0008500026/MICT-S-A0008511423-1.pdf?hkey=52A5661711E402568146F3353EA87419

>  
>      /* Spansion -- single (large) sector size only, at least
>       * for the chips listed here (without boot sectors).
> -- 
> 2.26.3
>
Cédric Le Goater April 8, 2021, 8:40 a.m. UTC | #3
On 4/8/21 10:00 AM, Francisco Iglesias wrote:
> Hello Cedric!
> 
> On Wed, Apr 07, 2021 at 07:16:34PM +0200, Cédric Le Goater wrote:
>> The Micron mt25qu02g is a 3V 2Gb serial NOR flash memory supporting
>> dual I/O and quad I/O, 4KB, 32KB, 64KB sector erase. It also supports
>> 4B opcodes.
>>
>> Cc: Alistair Francis <alistair.francis@wdc.com>
>> Cc: Francisco Iglesias <francisco.iglesias@xilinx.com>
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>>  hw/block/m25p80.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
>> index 183d3f44c259..2afb939ae28e 100644
>> --- a/hw/block/m25p80.c
>> +++ b/hw/block/m25p80.c
>> @@ -259,6 +259,7 @@ static const FlashPartInfo known_devices[] = {
>>      { INFO_STACKED("n25q00a",   0x20bb21, 0x1000, 64 << 10, 2048, ER_4K, 4) },
>>      { INFO_STACKED("mt25ql01g", 0x20ba21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
>>      { INFO_STACKED("mt25qu01g", 0x20bb21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
>> +    { INFO_STACKED("mt25qu02g", 0x20ba22, 0x1040, 64 << 10, 4096, ER_4K, 2) },
> 
> Is it possible it should be as below instead?
> 
> { INFO_STACKED("mt25qu02g", 0x20bb22, 0x1040, 64 << 10, 4096, ER_4K | ER_32K, 2) },
> 
> 's/0x20ba22/0x20bb22/' (or 's/mt25qu02g/mt25ql02g/') since 'u' looks to stand
> for 1.7-2.0 V and 'bb' for 1.8 V (see page 2 and 32 in [1]).

Here is what I am seeing : 

 mt25ql02g 0x20ba22 3V
 mt25qu02g 0x20bb22 1.8V

Do we agree ? 

> s/ER_4K/ER_4K | ER_32K/ since ERASE_32K is supported (see page 36). 

yes. I should have added that ! 
 
> If you find above changes ok and go with them please add:
> 
> Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>

Sure,

Thanks,

C.


> Best regards,
> Francisco Iglesias
> 
> [1] Micron Serial NOR Flash Memory 1.8V, Multiple I/O, 64KB Sector Erase MT25QU02GCBB
>     https://4donline.ihs.com/images/VipMasterIC/IC/MICT/MICT-S-A0008500026/MICT-S-A0008511423-1.pdf?hkey=52A5661711E402568146F3353EA87419
> 
>>  
>>      /* Spansion -- single (large) sector size only, at least
>>       * for the chips listed here (without boot sectors).
>> -- 
>> 2.26.3
>>
Francisco Iglesias April 8, 2021, 9:21 a.m. UTC | #4
Hi Cedric,

On [2021 Apr 08] Thu 10:40:18, Cédric Le Goater wrote:
> On 4/8/21 10:00 AM, Francisco Iglesias wrote:
> > Hello Cedric!
> > 
> > On Wed, Apr 07, 2021 at 07:16:34PM +0200, Cédric Le Goater wrote:
> >> The Micron mt25qu02g is a 3V 2Gb serial NOR flash memory supporting
> >> dual I/O and quad I/O, 4KB, 32KB, 64KB sector erase. It also supports
> >> 4B opcodes.
> >>
> >> Cc: Alistair Francis <alistair.francis@wdc.com>
> >> Cc: Francisco Iglesias <francisco.iglesias@xilinx.com>
> >> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> >> ---
> >>  hw/block/m25p80.c | 1 +
> >>  1 file changed, 1 insertion(+)
> >>
> >> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
> >> index 183d3f44c259..2afb939ae28e 100644
> >> --- a/hw/block/m25p80.c
> >> +++ b/hw/block/m25p80.c
> >> @@ -259,6 +259,7 @@ static const FlashPartInfo known_devices[] = {
> >>      { INFO_STACKED("n25q00a",   0x20bb21, 0x1000, 64 << 10, 2048, ER_4K, 4) },
> >>      { INFO_STACKED("mt25ql01g", 0x20ba21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
> >>      { INFO_STACKED("mt25qu01g", 0x20bb21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
> >> +    { INFO_STACKED("mt25qu02g", 0x20ba22, 0x1040, 64 << 10, 4096, ER_4K, 2) },
> > 
> > Is it possible it should be as below instead?
> > 
> > { INFO_STACKED("mt25qu02g", 0x20bb22, 0x1040, 64 << 10, 4096, ER_4K | ER_32K, 2) },
> > 
> > 's/0x20ba22/0x20bb22/' (or 's/mt25qu02g/mt25ql02g/') since 'u' looks to stand
> > for 1.7-2.0 V and 'bb' for 1.8 V (see page 2 and 32 in [1]).
> 
> Here is what I am seeing : 
> 
>  mt25ql02g 0x20ba22 3V
>  mt25qu02g 0x20bb22 1.8V
> 
> Do we agree ? 

Yes :)

Best regards,
Francisco

> 
> > s/ER_4K/ER_4K | ER_32K/ since ERASE_32K is supported (see page 36). 
> 
> yes. I should have added that ! 
>  
> > If you find above changes ok and go with them please add:
> > 
> > Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
> 
> Sure,
> 
> Thanks,
> 
> C.
> 
> 
> > Best regards,
> > Francisco Iglesias
> > 
> > [1] Micron Serial NOR Flash Memory 1.8V, Multiple I/O, 64KB Sector Erase MT25QU02GCBB
> >     https://4donline.ihs.com/images/VipMasterIC/IC/MICT/MICT-S-A0008500026/MICT-S-A0008511423-1.pdf?hkey=52A5661711E402568146F3353EA87419
> > 
> >>  
> >>      /* Spansion -- single (large) sector size only, at least
> >>       * for the chips listed here (without boot sectors).
> >> -- 
> >> 2.26.3
> >>
> 
>
diff mbox series

Patch

diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 183d3f44c259..2afb939ae28e 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -259,6 +259,7 @@  static const FlashPartInfo known_devices[] = {
     { INFO_STACKED("n25q00a",   0x20bb21, 0x1000, 64 << 10, 2048, ER_4K, 4) },
     { INFO_STACKED("mt25ql01g", 0x20ba21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
     { INFO_STACKED("mt25qu01g", 0x20bb21, 0x1040, 64 << 10, 2048, ER_4K, 2) },
+    { INFO_STACKED("mt25qu02g", 0x20ba22, 0x1040, 64 << 10, 4096, ER_4K, 2) },
 
     /* Spansion -- single (large) sector size only, at least
      * for the chips listed here (without boot sectors).