mbox series

[v2,0/7] gpio-rockchip driver

Message ID 20210411133030.1663936-1-pgwipeout@gmail.com (mailing list archive)
Headers show
Series gpio-rockchip driver | expand

Message

Peter Geis April 11, 2021, 1:30 p.m. UTC
Separate gpio driver from pinctrl driver, and support v2 controller.

Tested on rk3566-quartz64 prototype board.

Patch History:
V2 - Rebase to latest linux-next.

Tested-by: Peter Geis <pgwipeout@gmail.com>

Jianqun Xu (7):
  pinctrl/rockchip: separate struct rockchip_pin_bank to a head file
  pinctrl/pinctrl-rockchip.h: add pinctrl device to gpio bank struct
  gpio: separate gpio driver from pinctrl-rockchip driver
  gpio/rockchip: use struct rockchip_gpio_regs for gpio controller
  gpio/rockchip: support next version gpio controller
  gpio/rockchip: always enable clock for gpio controller
  gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type

 drivers/gpio/Kconfig               |   8 +
 drivers/gpio/Makefile              |   1 +
 drivers/gpio/gpio-rockchip.c       | 758 ++++++++++++++++++++++++
 drivers/pinctrl/pinctrl-rockchip.c | 911 +----------------------------
 drivers/pinctrl/pinctrl-rockchip.h | 287 +++++++++
 5 files changed, 1073 insertions(+), 892 deletions(-)
 create mode 100644 drivers/gpio/gpio-rockchip.c
 create mode 100644 drivers/pinctrl/pinctrl-rockchip.h

Comments

Andy Shevchenko April 12, 2021, 12:13 p.m. UTC | #1
On Sun, Apr 11, 2021 at 4:35 PM Peter Geis <pgwipeout@gmail.com> wrote:
>
> Separate gpio driver from pinctrl driver, and support v2 controller.
>
> Tested on rk3566-quartz64 prototype board.

Can you give a bit more context?
Usually separation means that hardware is represented by two different
IP blocks that are (almost) independent to each other. Was it the case
on the original platforms? Do you have different pin controller (or
it's absent completely) on some new / old platform?

>
> Patch History:
> V2 - Rebase to latest linux-next.
>
> Tested-by: Peter Geis <pgwipeout@gmail.com>
>
> Jianqun Xu (7):
>   pinctrl/rockchip: separate struct rockchip_pin_bank to a head file
>   pinctrl/pinctrl-rockchip.h: add pinctrl device to gpio bank struct
>   gpio: separate gpio driver from pinctrl-rockchip driver
>   gpio/rockchip: use struct rockchip_gpio_regs for gpio controller
>   gpio/rockchip: support next version gpio controller
>   gpio/rockchip: always enable clock for gpio controller
>   gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type
>
>  drivers/gpio/Kconfig               |   8 +
>  drivers/gpio/Makefile              |   1 +
>  drivers/gpio/gpio-rockchip.c       | 758 ++++++++++++++++++++++++
>  drivers/pinctrl/pinctrl-rockchip.c | 911 +----------------------------
>  drivers/pinctrl/pinctrl-rockchip.h | 287 +++++++++
>  5 files changed, 1073 insertions(+), 892 deletions(-)
>  create mode 100644 drivers/gpio/gpio-rockchip.c
>  create mode 100644 drivers/pinctrl/pinctrl-rockchip.h
>
> --
> 2.25.1
>
Heiko Stuebner April 12, 2021, 1:30 p.m. UTC | #2
Am Montag, 12. April 2021, 14:13:37 CEST schrieb Andy Shevchenko:
> On Sun, Apr 11, 2021 at 4:35 PM Peter Geis <pgwipeout@gmail.com> wrote:
> >
> > Separate gpio driver from pinctrl driver, and support v2 controller.
> >
> > Tested on rk3566-quartz64 prototype board.
> 
> Can you give a bit more context?
> Usually separation means that hardware is represented by two different
> IP blocks that are (almost) independent to each other. Was it the case
> on the original platforms? Do you have different pin controller (or
> it's absent completely) on some new / old platform?

They are separate on all Rockchip SoCs.

I.e. the pinconfig (muxing, pulls, etc) is done via some registers inside
the "General Register Files" [area for misc registers]
and control for the gpio functionality is done in separate blocks
for each bank.

Lumping that stuff together into one driver, was a design-mistake
from younger-me back in 2013 ;-)


Heiko

> >
> > Patch History:
> > V2 - Rebase to latest linux-next.
> >
> > Tested-by: Peter Geis <pgwipeout@gmail.com>
> >
> > Jianqun Xu (7):
> >   pinctrl/rockchip: separate struct rockchip_pin_bank to a head file
> >   pinctrl/pinctrl-rockchip.h: add pinctrl device to gpio bank struct
> >   gpio: separate gpio driver from pinctrl-rockchip driver
> >   gpio/rockchip: use struct rockchip_gpio_regs for gpio controller
> >   gpio/rockchip: support next version gpio controller
> >   gpio/rockchip: always enable clock for gpio controller
> >   gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type
> >
> >  drivers/gpio/Kconfig               |   8 +
> >  drivers/gpio/Makefile              |   1 +
> >  drivers/gpio/gpio-rockchip.c       | 758 ++++++++++++++++++++++++
> >  drivers/pinctrl/pinctrl-rockchip.c | 911 +----------------------------
> >  drivers/pinctrl/pinctrl-rockchip.h | 287 +++++++++
> >  5 files changed, 1073 insertions(+), 892 deletions(-)
> >  create mode 100644 drivers/gpio/gpio-rockchip.c
> >  create mode 100644 drivers/pinctrl/pinctrl-rockchip.h
> >
> > --
> > 2.25.1
> >
> 
> 
>
Andy Shevchenko April 12, 2021, 1:33 p.m. UTC | #3
On Mon, Apr 12, 2021 at 4:30 PM Heiko Stübner <heiko@sntech.de> wrote:
> Am Montag, 12. April 2021, 14:13:37 CEST schrieb Andy Shevchenko:
> > On Sun, Apr 11, 2021 at 4:35 PM Peter Geis <pgwipeout@gmail.com> wrote:
> > >
> > > Separate gpio driver from pinctrl driver, and support v2 controller.
> > >
> > > Tested on rk3566-quartz64 prototype board.
> >
> > Can you give a bit more context?
> > Usually separation means that hardware is represented by two different
> > IP blocks that are (almost) independent to each other. Was it the case
> > on the original platforms? Do you have different pin controller (or
> > it's absent completely) on some new / old platform?
>
> They are separate on all Rockchip SoCs.
>
> I.e. the pinconfig (muxing, pulls, etc) is done via some registers inside
> the "General Register Files" [area for misc registers]
> and control for the gpio functionality is done in separate blocks
> for each bank.
>
> Lumping that stuff together into one driver, was a design-mistake
> from younger-me back in 2013 ;-)

Thanks!

To the submitter: Just for the future, please elaborate such things in
the cover letter.
Peter Geis April 12, 2021, 3 p.m. UTC | #4
On Mon, Apr 12, 2021 at 9:34 AM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>
> On Mon, Apr 12, 2021 at 4:30 PM Heiko Stübner <heiko@sntech.de> wrote:
> > Am Montag, 12. April 2021, 14:13:37 CEST schrieb Andy Shevchenko:
> > > On Sun, Apr 11, 2021 at 4:35 PM Peter Geis <pgwipeout@gmail.com> wrote:
> > > >
> > > > Separate gpio driver from pinctrl driver, and support v2 controller.
> > > >
> > > > Tested on rk3566-quartz64 prototype board.
> > >
> > > Can you give a bit more context?
> > > Usually separation means that hardware is represented by two different
> > > IP blocks that are (almost) independent to each other. Was it the case
> > > on the original platforms? Do you have different pin controller (or
> > > it's absent completely) on some new / old platform?
> >
> > They are separate on all Rockchip SoCs.
> >
> > I.e. the pinconfig (muxing, pulls, etc) is done via some registers inside
> > the "General Register Files" [area for misc registers]
> > and control for the gpio functionality is done in separate blocks
> > for each bank.
> >
> > Lumping that stuff together into one driver, was a design-mistake
> > from younger-me back in 2013 ;-)
>
> Thanks!
>
> To the submitter: Just for the future, please elaborate such things in
> the cover letter.

Apologies, I only rebased the work and reused the original cover letter.
I'll keep that in mind if this sort of situation arises again.

>
> --
> With Best Regards,
> Andy Shevchenko
Linus Walleij April 14, 2021, 7:29 a.m. UTC | #5
On Sun, Apr 11, 2021 at 3:30 PM Peter Geis <pgwipeout@gmail.com> wrote:

> Separate gpio driver from pinctrl driver, and support v2 controller.
>
> Tested on rk3566-quartz64 prototype board.
>
> Patch History:
> V2 - Rebase to latest linux-next.
>
> Tested-by: Peter Geis <pgwipeout@gmail.com>

This does not apply to the pin control tree, the problem with basing stuff
on -next is that it sometimes does not apply to any development tree
and now that happened (because of conflicts in the GPIO tree).

You can either resend this based on the pinctrl "devel" branch:
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel
... or you can wait until kernel v5.13-rc1 is out and then we can merge
it, but it might even require rebasing after that.

Yours,
Linus Walleij