| Message ID | 9ea85ae8973f6d9b3d10f02f0d9b4ab6a086ec63.1619785375.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | pinctrl: renesas: Add more bias pinconf support | expand |
Hi Geert, Thanks for your work. On 2021-04-30 14:31:02 +0200, Geert Uytterhoeven wrote: > The "PUEN_" prefixes are part of the bit names of the PUEN registers, > while the comments should refer to the actual pin names. > > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> > --- > drivers/pinctrl/renesas/pfc-r8a77990.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c > index eeebbab4dd811f9c..f44c7da3ec167de7 100644 > --- a/drivers/pinctrl/renesas/pfc-r8a77990.c > +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c > @@ -5197,8 +5197,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { > [27] = RCAR_GP_PIN(1, 0), /* A0 */ > [28] = SH_PFC_PIN_NONE, > [29] = SH_PFC_PIN_NONE, > - [30] = RCAR_GP_PIN(2, 25), /* PUEN_EX_WAIT0 */ > - [31] = RCAR_GP_PIN(2, 24), /* PUEN_RD/WR# */ > + [30] = RCAR_GP_PIN(2, 25), /* EX_WAIT0 */ > + [31] = RCAR_GP_PIN(2, 24), /* RD/WR# */ > } }, > { PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) { > [0] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ > @@ -5333,8 +5333,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { > [27] = SH_PFC_PIN_NONE, > [28] = SH_PFC_PIN_NONE, > [29] = SH_PFC_PIN_NONE, > - [30] = RCAR_GP_PIN(6, 9), /* PUEN_USB30_OVC */ > - [31] = RCAR_GP_PIN(6, 17), /* PUEN_USB30_PWEN */ > + [30] = RCAR_GP_PIN(6, 9), /* USB30_OVC */ > + [31] = RCAR_GP_PIN(6, 17), /* USB30_PWEN */ > } }, > { /* sentinel */ }, > }; > -- > 2.25.1 >
diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c index eeebbab4dd811f9c..f44c7da3ec167de7 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77990.c +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c @@ -5197,8 +5197,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [27] = RCAR_GP_PIN(1, 0), /* A0 */ [28] = SH_PFC_PIN_NONE, [29] = SH_PFC_PIN_NONE, - [30] = RCAR_GP_PIN(2, 25), /* PUEN_EX_WAIT0 */ - [31] = RCAR_GP_PIN(2, 24), /* PUEN_RD/WR# */ + [30] = RCAR_GP_PIN(2, 25), /* EX_WAIT0 */ + [31] = RCAR_GP_PIN(2, 24), /* RD/WR# */ } }, { PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) { [0] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ @@ -5333,8 +5333,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [27] = SH_PFC_PIN_NONE, [28] = SH_PFC_PIN_NONE, [29] = SH_PFC_PIN_NONE, - [30] = RCAR_GP_PIN(6, 9), /* PUEN_USB30_OVC */ - [31] = RCAR_GP_PIN(6, 17), /* PUEN_USB30_PWEN */ + [30] = RCAR_GP_PIN(6, 9), /* USB30_OVC */ + [31] = RCAR_GP_PIN(6, 17), /* USB30_PWEN */ } }, { /* sentinel */ }, };
The "PUEN_" prefixes are part of the bit names of the PUEN registers, while the comments should refer to the actual pin names. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/pinctrl/renesas/pfc-r8a77990.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)