| Message ID | 20210505155310.62710-5-bruno.larsen@eldorado.org.br (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/ppc: Untangle CPU init from translation | expand |
On Wed, May 05, 2021 at 12:53:10PM -0300, Bruno Larsen (billionai) wrote: > finished isolation of CPU initialization logic from > translation logic. CPU initialization now only has common code > and may or may not call accelerator-specific code, as the > build options require. > > Signed-off-by: Bruno Larsen (billionai) > <bruno.larsen@eldorado.org.br> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> > --- > target/ppc/{translate_init.c.inc => cpu_init.c} | 6 ++++++ > target/ppc/meson.build | 1 + > target/ppc/spr_tcg.h | 2 ++ > target/ppc/translate.c | 4 ++-- > 4 files changed, 11 insertions(+), 2 deletions(-) > rename target/ppc/{translate_init.c.inc => cpu_init.c} (99%) > > diff --git a/target/ppc/translate_init.c.inc b/target/ppc/cpu_init.c > similarity index 99% > rename from target/ppc/translate_init.c.inc > rename to target/ppc/cpu_init.c > index 2f4e463bb6..faece1dca2 100644 > --- a/target/ppc/translate_init.c.inc > +++ b/target/ppc/cpu_init.c > @@ -18,6 +18,7 @@ > * License along with this library; if not, see <http://www.gnu.org/licenses/>. > */ > > +#include "qemu/osdep.h" > #include "disas/dis-asm.h" > #include "exec/gdbstub.h" > #include "kvm_ppc.h" > @@ -42,6 +43,11 @@ > #include "fpu/softfloat.h" > #include "qapi/qapi-commands-machine-target.h" > > +#include "exec/helper-proto.h" > +#include "helper_regs.h" > +#include "internal.h" > +#include "spr_tcg.h" > + > /* #define PPC_DEBUG_SPR */ > /* #define USE_APPLE_GDB */ > > diff --git a/target/ppc/meson.build b/target/ppc/meson.build > index 4079d01ee3..d1aa7d5d39 100644 > --- a/target/ppc/meson.build > +++ b/target/ppc/meson.build > @@ -2,6 +2,7 @@ ppc_ss = ss.source_set() > ppc_ss.add(files( > 'cpu-models.c', > 'cpu.c', > + 'cpu_init.c', > 'dfp_helper.c', > 'excp_helper.c', > 'fpu_helper.c', > diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h > index 1d2890dea0..0be5f347d5 100644 > --- a/target/ppc/spr_tcg.h > +++ b/target/ppc/spr_tcg.h > @@ -19,6 +19,8 @@ > #ifndef SPR_TCG_H > #define SPR_TCG_H > > +#define SPR_NOACCESS (&spr_noaccess) > + > /* prototypes for readers and writers for SPRs */ > void spr_noaccess(DisasContext *ctx, int gprn, int sprn); > void spr_read_generic(DisasContext *ctx, int gprn, int sprn); > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 8feececba0..cc209e5999 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -38,6 +38,8 @@ > #include "qemu/atomic128.h" > #include "spr_tcg.h" > > +#include "qemu/qemu-print.h" > +#include "qapi/error.h" > > #define CPU_SINGLE_STEP 0x1 > #define CPU_BRANCH_STEP 0x2 > @@ -380,7 +382,6 @@ void spr_noaccess(DisasContext *ctx, int gprn, int sprn) > printf("ERROR: try to access SPR %d !\n", sprn); > #endif > } > -#define SPR_NOACCESS (&spr_noaccess) > > /* #define PPC_DUMP_SPR_ACCESSES */ > > @@ -8617,7 +8618,6 @@ GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F, 0x03FFF800, \ > }; > > #include "helper_regs.h" > -#include "translate_init.c.inc" > > /*****************************************************************************/ > /* Misc PowerPC helpers */
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/cpu_init.c similarity index 99% rename from target/ppc/translate_init.c.inc rename to target/ppc/cpu_init.c index 2f4e463bb6..faece1dca2 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/cpu_init.c @@ -18,6 +18,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ +#include "qemu/osdep.h" #include "disas/dis-asm.h" #include "exec/gdbstub.h" #include "kvm_ppc.h" @@ -42,6 +43,11 @@ #include "fpu/softfloat.h" #include "qapi/qapi-commands-machine-target.h" +#include "exec/helper-proto.h" +#include "helper_regs.h" +#include "internal.h" +#include "spr_tcg.h" + /* #define PPC_DEBUG_SPR */ /* #define USE_APPLE_GDB */ diff --git a/target/ppc/meson.build b/target/ppc/meson.build index 4079d01ee3..d1aa7d5d39 100644 --- a/target/ppc/meson.build +++ b/target/ppc/meson.build @@ -2,6 +2,7 @@ ppc_ss = ss.source_set() ppc_ss.add(files( 'cpu-models.c', 'cpu.c', + 'cpu_init.c', 'dfp_helper.c', 'excp_helper.c', 'fpu_helper.c', diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h index 1d2890dea0..0be5f347d5 100644 --- a/target/ppc/spr_tcg.h +++ b/target/ppc/spr_tcg.h @@ -19,6 +19,8 @@ #ifndef SPR_TCG_H #define SPR_TCG_H +#define SPR_NOACCESS (&spr_noaccess) + /* prototypes for readers and writers for SPRs */ void spr_noaccess(DisasContext *ctx, int gprn, int sprn); void spr_read_generic(DisasContext *ctx, int gprn, int sprn); diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 8feececba0..cc209e5999 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -38,6 +38,8 @@ #include "qemu/atomic128.h" #include "spr_tcg.h" +#include "qemu/qemu-print.h" +#include "qapi/error.h" #define CPU_SINGLE_STEP 0x1 #define CPU_BRANCH_STEP 0x2 @@ -380,7 +382,6 @@ void spr_noaccess(DisasContext *ctx, int gprn, int sprn) printf("ERROR: try to access SPR %d !\n", sprn); #endif } -#define SPR_NOACCESS (&spr_noaccess) /* #define PPC_DUMP_SPR_ACCESSES */ @@ -8617,7 +8618,6 @@ GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F, 0x03FFF800, \ }; #include "helper_regs.h" -#include "translate_init.c.inc" /*****************************************************************************/ /* Misc PowerPC helpers */
finished isolation of CPU initialization logic from translation logic. CPU initialization now only has common code and may or may not call accelerator-specific code, as the build options require. Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> --- target/ppc/{translate_init.c.inc => cpu_init.c} | 6 ++++++ target/ppc/meson.build | 1 + target/ppc/spr_tcg.h | 2 ++ target/ppc/translate.c | 4 ++-- 4 files changed, 11 insertions(+), 2 deletions(-) rename target/ppc/{translate_init.c.inc => cpu_init.c} (99%)