mbox series

[v2,0/3] arm64/sve: Trivial optimisation for 128 bit SVE vectors

Message ID 20210511160446.42871-1-broonie@kernel.org (mailing list archive)
Headers show
Series arm64/sve: Trivial optimisation for 128 bit SVE vectors | expand

Message

Mark Brown May 11, 2021, 4:04 p.m. UTC
This series is a combination of factoring out some duplicated code and a
very minor optimisation to the performance of handling converting FPSIMD
state to SVE in the live registers for 128 bit SVE vectors.

v2:
 - Combine P and FFR flushing into a single macro.

Mark Brown (3):
  arm64/sve: Split _sve_flush macro into separate Z and predicate
    flushes
  arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state()
  arm64/sve: Skip flushing Z registers with 128 bit vectors

 arch/arm64/include/asm/fpsimd.h       |  2 +-
 arch/arm64/include/asm/fpsimdmacros.h |  4 +++-
 arch/arm64/kernel/entry-fpsimd.S      | 19 ++++++++++++-------
 arch/arm64/kernel/fpsimd.c            |  6 ++++--
 4 files changed, 20 insertions(+), 11 deletions(-)


base-commit: 6efb943b8616ec53a5e444193dccf1af9ad627b5

Comments

Catalin Marinas May 12, 2021, 4:16 p.m. UTC | #1
On Tue, May 11, 2021 at 05:04:43PM +0100, Mark Brown wrote:
> This series is a combination of factoring out some duplicated code and a
> very minor optimisation to the performance of handling converting FPSIMD
> state to SVE in the live registers for 128 bit SVE vectors.
> 
> v2:
>  - Combine P and FFR flushing into a single macro.
> 
> Mark Brown (3):
>   arm64/sve: Split _sve_flush macro into separate Z and predicate
>     flushes
>   arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state()
>   arm64/sve: Skip flushing Z registers with 128 bit vectors

The series makes sense to me:

Acked-by: Catalin Marinas <catalin.marinas@arm.com>