| Message ID | 20210511132928.814697-4-linus.walleij@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | [1/5] hw_random: ixp4xx: enable compile-testing | expand |
On Tue, 11 May 2021 15:29:27 +0200, Linus Walleij wrote: > This adds device tree bindings for the simple random number > generator found in the IXP46x SoCs. > > Cc: Deepak Saxena <dsaxena@plexity.net> > Cc: devicetree@vger.kernel.org > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > The idea is to apply this through the ARM SoC tree along > with other IXP4xx refactorings. > Please tell me if you prefer another solution. > --- > .../bindings/rng/intel,ixp46x-rng.yaml | 36 +++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml b/Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml new file mode 100644 index 000000000000..61963fa9347e --- /dev/null +++ b/Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/intel,ixp46x-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel IXP46x RNG bindings + +description: | + The Intel IXP46x has a random number generator at a fixed physical + location in memory. Each read is guaranteed to provide a unique + 32 bit random number. + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +properties: + compatible: + const: intel,ixp46x-rng + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + rng@70002100 { + compatible = "intel,ixp46x-rng"; + reg = <0x70002100 4>; + }; + diff --git a/MAINTAINERS b/MAINTAINERS index bd7aff0c120f..cc4bb4e75f04 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9248,6 +9248,7 @@ F: include/linux/soc/ixp4xx/qmgr.h INTEL IXP4XX RANDOM NUMBER GENERATOR SUPPORT M: Deepak Saxena <dsaxena@plexity.net> S: Maintained +F: Documentation/devicetree/bindings/display/intel,ixp46x-rng.yaml F: drivers/char/hw_random/ixp4xx-rng.c INTEL KEEM BAY DRM DRIVER
This adds device tree bindings for the simple random number generator found in the IXP46x SoCs. Cc: Deepak Saxena <dsaxena@plexity.net> Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- The idea is to apply this through the ARM SoC tree along with other IXP4xx refactorings. Please tell me if you prefer another solution. --- .../bindings/rng/intel,ixp46x-rng.yaml | 36 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml