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ARM: dts: sun8i: r40: Add timer node

Message ID 20210510163647.2731675-1-jernej.skrabec@gmail.com (mailing list archive)
State New, archived
Headers show
Series ARM: dts: sun8i: r40: Add timer node | expand

Commit Message

Jernej Škrabec May 10, 2021, 4:36 p.m. UTC
Allwinner R40 has a timer.

Add a node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
 arch/arm/boot/dts/sun8i-r40.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Maxime Ripard May 18, 2021, 3:20 p.m. UTC | #1
On Mon, May 10, 2021 at 06:36:47PM +0200, Jernej Skrabec wrote:
> Allwinner R40 has a timer.
> 
> Add a node for it.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Applied, thanks
Maxime
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Patch

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 03e054c0bac4..291f4784e86c 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -691,6 +691,18 @@  uart7_pi_pins: uart7-pi-pins {
 			};
 		};
 
+		timer@1c20c00 {
+			compatible = "allwinner,sun4i-a10-timer";
+			reg = <0x01c20c00 0x90>;
+			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&osc24M>;
+		};
+
 		wdt: watchdog@1c20c90 {
 			compatible = "allwinner,sun4i-a10-wdt";
 			reg = <0x01c20c90 0x10>;