| Message ID | 20210424004645.3950558-5-seanjc@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: x86: vCPU RESET/INIT fixes and consolidation | expand |
On Fri, Apr 23, 2021 at 5:47 PM Sean Christopherson <seanjc@google.com> wrote: > > At vCPU RESET/INIT (mostly RESET), stuff EDX with KVM's hardcoded, > default Family-Model-Stepping ID of 0x600 if CPUID.0x1 isn't defined. > At RESET, the CPUID lookup is guaranteed to "miss" because KVM emulates > RESET before exposing the vCPU to userspace, i.e. userspace can't > possibly have done set the vCPU's CPUID model, and thus KVM will always > write '0'. At INIT, using 0x600 is less bad than using '0'. > > While initializing EDX to '0' is _extremely_ unlikely to be noticed by > the guest, let alone break the guest, and can be overridden by > userspace for the RESET case, using 0x600 is preferable as it will allow > consolidating the relevant VMX and SVM RESET/INIT logic in the future. > And, digging through old specs suggests that neither Intel nor AMD have > ever shipped a CPU that initialized EDX to '0' at RESET. > > Regarding 0x600 as KVM's default Family, it is a sane default and in > many ways the most appropriate. Prior to the 386 implementations, DX > was undefined at RESET. With the 386, 486, 586/P5, and 686/P6/Athlon, > both Intel and AMD set EDX to 3, 4, 5, and 6 respectively. AMD switched > to using '15' as its primary Family with the introduction of AMD64, but > Intel has continued using '6' for the last few decades. > > So, '6' is a valid Family for both Intel and AMD CPUs, is compatible > with both 32-bit and 64-bit CPUs (albeit not a perfect fit for 64-bit > AMD), and of the common Families (3 - 6), is the best fit with respect to > KVM's virtual CPU model. E.g. prior to the P6, Intel CPUs did not have a > STI window. Modern operating systems, Linux included, rely on the STI > window, e.g. for "safe halt", and KVM unconditionally assumes the virtual > CPU has an STI window. Thus enumerating a Family ID of 3, 4, or 5 would > be provably wrong. > > Opportunistically remove a stale comment. > > Fixes: 66f7b72e1171 ("KVM: x86: Make register state after reset conform to specification") > Signed-off-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Reiji Watanabe <reijiw@google.com>
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index b9e3229ddc27..d4d7720ce42f 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1219,7 +1219,6 @@ static void init_vmcb(struct kvm_vcpu *vcpu) kvm_mmu_reset_context(vcpu); save->cr4 = X86_CR4_PAE; - /* rdx = ?? */ if (npt_enabled) { /* Setup VMCB for Nested Paging */ @@ -1299,7 +1298,15 @@ static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) } init_vmcb(vcpu); - kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true); + /* + * Fall back to KVM's default Family/Model/Stepping if no CPUID match + * is found. Note, it's impossible to get a match at RESET since KVM + * emulates RESET before exposing the vCPU to userspace, i.e. it's + * impossible for kvm_cpuid() to find a valid entry on RESET. But, go + * through the motions in case that's ever remedied, and to be pedantic. + */ + if (!kvm_cpuid(vcpu, &eax, &dummy, &dummy, &dummy, true)) + eax = get_rdx_init_val(); kvm_rdx_write(vcpu, eax); if (kvm_vcpu_apicv_active(vcpu) && !init_event)
At vCPU RESET/INIT (mostly RESET), stuff EDX with KVM's hardcoded, default Family-Model-Stepping ID of 0x600 if CPUID.0x1 isn't defined. At RESET, the CPUID lookup is guaranteed to "miss" because KVM emulates RESET before exposing the vCPU to userspace, i.e. userspace can't possibly have done set the vCPU's CPUID model, and thus KVM will always write '0'. At INIT, using 0x600 is less bad than using '0'. While initializing EDX to '0' is _extremely_ unlikely to be noticed by the guest, let alone break the guest, and can be overridden by userspace for the RESET case, using 0x600 is preferable as it will allow consolidating the relevant VMX and SVM RESET/INIT logic in the future. And, digging through old specs suggests that neither Intel nor AMD have ever shipped a CPU that initialized EDX to '0' at RESET. Regarding 0x600 as KVM's default Family, it is a sane default and in many ways the most appropriate. Prior to the 386 implementations, DX was undefined at RESET. With the 386, 486, 586/P5, and 686/P6/Athlon, both Intel and AMD set EDX to 3, 4, 5, and 6 respectively. AMD switched to using '15' as its primary Family with the introduction of AMD64, but Intel has continued using '6' for the last few decades. So, '6' is a valid Family for both Intel and AMD CPUs, is compatible with both 32-bit and 64-bit CPUs (albeit not a perfect fit for 64-bit AMD), and of the common Families (3 - 6), is the best fit with respect to KVM's virtual CPU model. E.g. prior to the P6, Intel CPUs did not have a STI window. Modern operating systems, Linux included, rely on the STI window, e.g. for "safe halt", and KVM unconditionally assumes the virtual CPU has an STI window. Thus enumerating a Family ID of 3, 4, or 5 would be provably wrong. Opportunistically remove a stale comment. Fixes: 66f7b72e1171 ("KVM: x86: Make register state after reset conform to specification") Signed-off-by: Sean Christopherson <seanjc@google.com> --- arch/x86/kvm/svm/svm.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)