| Message ID | 7d77772f49b978e3d52d3815b8743fe54c816994.1621343877.git.olivier.dautricourt@orolia.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v5,1/3] dt-bindings: dma: add schema for altera-msgdma | expand |
On Tue, 18 May 2021 15:23:34 +0200, Olivier Dautricourt wrote: > add yaml schema for Altera mSGDMA bindings in devicetree. > > Reviewed-by: Stefan Roese <sr@denx.de> > Signed-off-by: Olivier Dautricourt <olivier.dautricourt@orolia.com> > --- > > Notes: > Changes in v2: > - fix reg size in dt example > - fix dt_binding check warning > - add list in MAINTAINERS entry > > Changes from v2 to v3: > none > > Changes from v3 to v4: > none > > Changes from v4 to v5: > as per Rob's comments: > - change compatible field from 'altr,msgdma' to > 'altr,socfpga-msgdma' to indicate that it's compatible > with altera socfpga family. > - describe each region separately > - remove maxItems/minItems for reg section. > as per Vinod's comments: > - separate MAINTAINERS editing in another commit > - remove description for #dma-cells > > .../devicetree/bindings/dma/altr,msgdma.yaml | 59 +++++++++++++++++++ > 1 file changed, 59 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/altr,msgdma.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/dma/altr,msgdma.yaml b/Documentation/devicetree/bindings/dma/altr,msgdma.yaml new file mode 100644 index 000000000000..ce51531e8736 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/altr,msgdma.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/altr,msgdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera mSGDMA IP core + +maintainers: + - Olivier Dautricourt <olivier.dautricourt@orolia.com> + +description: | + Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA) + intellectual property (IP) + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + const: altr,socfpga-msgdma + + reg: + items: + - description: Control and Status Register Slave Port + - description: Descriptor Slave Port + - description: Response Slave Port + + reg-names: + items: + - const: csr + - const: desc + - const: resp + + interrupts: + maxItems: 1 + + "#dma-cells": + const: 1 + +required: + - compatible + - reg + - reg-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + + msgdma_controller: dma-controller@ff200b00 { + compatible = "altr,socfpga-msgdma"; + reg = <0xff200b00 0x100>, <0xff200c00 0x100>, <0xff200d00 0x100>; + reg-names = "csr", "desc", "resp"; + interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + };