Message ID | 20210510165920.1913477-2-maz@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: arm64: ARMv8.3/8.4 Nested Virtualization support | expand |
On 2021/5/11 0:58, Marc Zyngier wrote: > From: Jintack Lim <jintack.lim@linaro.org> > > Add a new ARM64_HAS_NESTED_VIRT feature to indicate that the > CPU has the ARMv8.3 nested virtualization capability. > > This will be used to support nested virtualization in KVM. > > Signed-off-by: Jintack Lim <jintack.lim@linaro.org> > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> > Signed-off-by: Marc Zyngier <maz@kernel.org> > --- > .../admin-guide/kernel-parameters.txt | 4 +++ > arch/arm64/include/asm/cpucaps.h | 1 + > arch/arm64/kernel/cpufeature.c | 25 +++++++++++++++++++ > 3 files changed, 30 insertions(+) [...] > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > index efed2830d141..056de86d7f6f 100644 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@ -1645,6 +1645,21 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused) > write_sysreg(read_sysreg(tpidr_el1), tpidr_el2); > } > > +static bool nested_param; > +static bool has_nested_virt_support(const struct arm64_cpu_capabilities *cap, > + int scope) > +{ > + return has_cpuid_feature(cap, scope) && > + nested_param; > +} Nitpick: How about putting them into a single line (they still perfectly fit within the 80-colume limit)? Zenghui
On Thu, 20 May 2021 14:32:17 +0100, Zenghui Yu <yuzenghui@huawei.com> wrote: > > On 2021/5/11 0:58, Marc Zyngier wrote: > > From: Jintack Lim <jintack.lim@linaro.org> > > > > Add a new ARM64_HAS_NESTED_VIRT feature to indicate that the > > CPU has the ARMv8.3 nested virtualization capability. > > > > This will be used to support nested virtualization in KVM. > > > > Signed-off-by: Jintack Lim <jintack.lim@linaro.org> > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> > > Signed-off-by: Marc Zyngier <maz@kernel.org> > > --- > > .../admin-guide/kernel-parameters.txt | 4 +++ > > arch/arm64/include/asm/cpucaps.h | 1 + > > arch/arm64/kernel/cpufeature.c | 25 +++++++++++++++++++ > > 3 files changed, 30 insertions(+) > > [...] > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index efed2830d141..056de86d7f6f 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -1645,6 +1645,21 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused) > > write_sysreg(read_sysreg(tpidr_el1), tpidr_el2); > > } > > +static bool nested_param; > > +static bool has_nested_virt_support(const struct arm64_cpu_capabilities *cap, > > + int scope) > > +{ > > + return has_cpuid_feature(cap, scope) && > > + nested_param; > > +} > > Nitpick: > > How about putting them into a single line (they still perfectly > fit within the 80-colume limit)? Fair enough. M.
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index cb89dbdedc46..78ca804a6754 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2320,6 +2320,10 @@ [KVM,ARM] Allow use of GICv4 for direct injection of LPIs. + kvm-arm.nested= + [KVM,ARM] Allow nested virtualization in KVM/ARM. + Default is 0 (disabled) + kvm_cma_resv_ratio=n [PPC] Reserves given percentage from system memory area for contiguous memory allocation for KVM hash pagetable diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index b0c5eda0498f..8d0cf022010f 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -16,6 +16,7 @@ #define ARM64_WORKAROUND_CAVIUM_23154 6 #define ARM64_WORKAROUND_834220 7 #define ARM64_HAS_NO_HW_PREFETCH 8 +#define ARM64_HAS_NESTED_VIRT 9 #define ARM64_HAS_VIRT_HOST_EXTN 11 #define ARM64_WORKAROUND_CAVIUM_27456 12 #define ARM64_HAS_32BIT_EL0 13 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index efed2830d141..056de86d7f6f 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1645,6 +1645,21 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused) write_sysreg(read_sysreg(tpidr_el1), tpidr_el2); } +static bool nested_param; +static bool has_nested_virt_support(const struct arm64_cpu_capabilities *cap, + int scope) +{ + return has_cpuid_feature(cap, scope) && + nested_param; +} + +static int __init kvmarm_nested_cfg(char *buf) +{ + return strtobool(buf, &nested_param); +} + +early_param("kvm-arm.nested", kvmarm_nested_cfg); + static void cpu_has_fwb(const struct arm64_cpu_capabilities *__unused) { u64 val = read_sysreg_s(SYS_CLIDR_EL1); @@ -1865,6 +1880,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = runs_at_el2, .cpu_enable = cpu_copy_el2regs, }, + { + .desc = "Nested Virtualization Support", + .capability = ARM64_HAS_NESTED_VIRT, + .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .matches = has_nested_virt_support, + .sys_reg = SYS_ID_AA64MMFR2_EL1, + .sign = FTR_UNSIGNED, + .field_pos = ID_AA64MMFR2_NV_SHIFT, + .min_field_value = 1, + }, { .desc = "32-bit EL0 Support", .capability = ARM64_HAS_32BIT_EL0,