| Message ID | b9e9db907514790574429b83d070c823b36085ef.1619699909.git.geert+renesas@glider.be (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 659b38203f04f5c3d1dc60f1a3e54b582ad3841c |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: r8a7796[01]: Fix OPP table entry voltages | expand |
Hi Geert, Thank you for the patch. > From: Geert Uytterhoeven <geert+renesas@glider.be> > Sent: 29 April 2021 13:39 > > Correct the voltages in the "Power Optimized" (<= 1.5 GHz) Cortex-A57 > operating point table entries for the R-Car M3-W and M3-W+ SoCs from > 0.82V to 0.83V, as per the R-Car Gen3 EC Manual Errata for Revision > 0.53. > > Based on a patch for R-Car M3-W in the BSP by Takeshi Kihara > <takeshi.kihara.df@renesas.com>. > > Fixes: da7e3113344fda50 ("arm64: dts: renesas: r8a7796: Add OPPs table for > cpu devices") > Fixes: f51746ad7d1ff6b4 ("arm64: dts: renesas: Add Renesas R8A77961 SoC > support") > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Kind regards, Chris > --- > To be queued in renesas-devel for v5.14. > > arch/arm64/boot/dts/renesas/r8a77960.dtsi | 6 +++--- > arch/arm64/boot/dts/renesas/r8a77961.dtsi | 6 +++--- > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi > b/arch/arm64/boot/dts/renesas/r8a77960.dtsi > index 63bb395a6a64499a..2bd8169735d351b2 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi > @@ -63,17 +63,17 @@ cluster0_opp: opp_table0 { > > opp-500000000 { > opp-hz = /bits/ 64 <500000000>; > - opp-microvolt = <820000>; > + opp-microvolt = <830000>; > clock-latency-ns = <300000>; > }; > opp-1000000000 { > opp-hz = /bits/ 64 <1000000000>; > - opp-microvolt = <820000>; > + opp-microvolt = <830000>; > clock-latency-ns = <300000>; > }; > opp-1500000000 { > opp-hz = /bits/ 64 <1500000000>; > - opp-microvolt = <820000>; > + opp-microvolt = <830000>; > clock-latency-ns = <300000>; > opp-suspend; > }; > diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi > b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > index c8b73108a4c8185d..3c73ee47791542a9 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi > @@ -52,17 +52,17 @@ cluster0_opp: opp_table0 { > > opp-500000000 { > opp-hz = /bits/ 64 <500000000>; > - opp-microvolt = <820000>; > + opp-microvolt = <830000>; > clock-latency-ns = <300000>; > }; > opp-1000000000 { > opp-hz = /bits/ 64 <1000000000>; > - opp-microvolt = <820000>; > + opp-microvolt = <830000>; > clock-latency-ns = <300000>; > }; > opp-1500000000 { > opp-hz = /bits/ 64 <1500000000>; > - opp-microvolt = <820000>; > + opp-microvolt = <830000>; > clock-latency-ns = <300000>; > opp-suspend; > }; > -- > 2.25.1
diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi index 63bb395a6a64499a..2bd8169735d351b2 100644 --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi @@ -63,17 +63,17 @@ cluster0_opp: opp_table0 { opp-500000000 { opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <820000>; + opp-microvolt = <830000>; clock-latency-ns = <300000>; }; opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; + opp-microvolt = <830000>; clock-latency-ns = <300000>; }; opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <820000>; + opp-microvolt = <830000>; clock-latency-ns = <300000>; opp-suspend; }; diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index c8b73108a4c8185d..3c73ee47791542a9 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -52,17 +52,17 @@ cluster0_opp: opp_table0 { opp-500000000 { opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <820000>; + opp-microvolt = <830000>; clock-latency-ns = <300000>; }; opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; + opp-microvolt = <830000>; clock-latency-ns = <300000>; }; opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <820000>; + opp-microvolt = <830000>; clock-latency-ns = <300000>; opp-suspend; };
Correct the voltages in the "Power Optimized" (<= 1.5 GHz) Cortex-A57 operating point table entries for the R-Car M3-W and M3-W+ SoCs from 0.82V to 0.83V, as per the R-Car Gen3 EC Manual Errata for Revision 0.53. Based on a patch for R-Car M3-W in the BSP by Takeshi Kihara <takeshi.kihara.df@renesas.com>. Fixes: da7e3113344fda50 ("arm64: dts: renesas: r8a7796: Add OPPs table for cpu devices") Fixes: f51746ad7d1ff6b4 ("arm64: dts: renesas: Add Renesas R8A77961 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- To be queued in renesas-devel for v5.14. arch/arm64/boot/dts/renesas/r8a77960.dtsi | 6 +++--- arch/arm64/boot/dts/renesas/r8a77961.dtsi | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-)