| Message ID | 20210609063436.284332-1-thomas.hellstrom@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Prereqs for TTM accelerated migration | expand |
On Wed, Jun 09, 2021 at 08:34:27AM +0200, Thomas Hellström wrote: > A couple of patches from Chris which implement pipelined migration and > clears by atomically writing the PTEs in place before performing the > actual blit. > > Some ww utilities mainly for the accompanying selftests added by Thomas, > as well as modified the above patches for ww locking- and lmem support. > > The actual hook up to the i915 ttm backend is being worked on and not > included yet, so this is considered to be an early review opportunity. > > v2: > - A couple of minor style fixes pointed out by Matthew Auld > - Export and use intel_engine_destroy_pinned_context() to address a >ls CI warning / failure. Just to check my understanding of the plan: These are the new windowed clear/blt functions which we plan to use everywhere, because less nasty locking implications? And the clear/blt we currently have in upstream will be replaced? If so would be nice if this patch set includes that replacement work (I think right now all we have is the clear for lmem), including updating of selftests and stuff like that. Just to avoid having two ways to do the same thing in the driver. -Daniel > > Chris Wilson (6): > drm/i915/gt: Add an insert_entry for gen8_ppgtt > drm/i915/gt: Add a routine to iterate over the pagetables of a GTT > drm/i915/gt: Export the pinned context constructor and destructor > drm/i915/gt: Pipelined page migration > drm/i915/gt: Pipelined clear > drm/i915/gt: Setup a default migration context on the GT > > Thomas Hellström (3): > drm/i915: Reference objects on the ww object list > drm/i915: Break out dma_resv ww locking utilities to separate files > drm/i915: Introduce a ww transaction helper > > drivers/gpu/drm/i915/Makefile | 2 + > drivers/gpu/drm/i915/gem/i915_gem_object.h | 9 +- > drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 68 ++ > drivers/gpu/drm/i915/gt/intel_engine.h | 12 + > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 27 +- > drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 + > drivers/gpu/drm/i915/gt/intel_gt.c | 4 + > drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + > drivers/gpu/drm/i915/gt/intel_gtt.h | 7 + > drivers/gpu/drm/i915/gt/intel_migrate.c | 685 ++++++++++++++++++ > drivers/gpu/drm/i915/gt/intel_migrate.h | 65 ++ > drivers/gpu/drm/i915/gt/intel_migrate_types.h | 15 + > drivers/gpu/drm/i915/gt/intel_renderstate.h | 1 + > drivers/gpu/drm/i915/gt/intel_ring.h | 1 + > drivers/gpu/drm/i915/gt/selftest_migrate.c | 671 +++++++++++++++++ > drivers/gpu/drm/i915/i915_gem.c | 52 -- > drivers/gpu/drm/i915/i915_gem.h | 12 - > drivers/gpu/drm/i915/i915_gem_ww.c | 63 ++ > drivers/gpu/drm/i915/i915_gem_ww.h | 50 ++ > .../drm/i915/selftests/i915_live_selftests.h | 1 + > .../drm/i915/selftests/i915_perf_selftests.h | 1 + > 21 files changed, 1675 insertions(+), 76 deletions(-) > create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate.c > create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate.h > create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate_types.h > create mode 100644 drivers/gpu/drm/i915/gt/selftest_migrate.c > create mode 100644 drivers/gpu/drm/i915/i915_gem_ww.c > create mode 100644 drivers/gpu/drm/i915/i915_gem_ww.h > > -- > 2.31.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On 6/9/21 1:48 PM, Daniel Vetter wrote: > On Wed, Jun 09, 2021 at 08:34:27AM +0200, Thomas Hellström wrote: >> A couple of patches from Chris which implement pipelined migration and >> clears by atomically writing the PTEs in place before performing the >> actual blit. >> >> Some ww utilities mainly for the accompanying selftests added by Thomas, >> as well as modified the above patches for ww locking- and lmem support. >> >> The actual hook up to the i915 ttm backend is being worked on and not >> included yet, so this is considered to be an early review opportunity. >> >> v2: >> - A couple of minor style fixes pointed out by Matthew Auld >> - Export and use intel_engine_destroy_pinned_context() to address a >> ls CI warning / failure. > Just to check my understanding of the plan: These are the new windowed > clear/blt functions which we plan to use everywhere, because less nasty > locking implications? And the clear/blt we currently have in upstream will > be replaced? Yes. These are for LMEM clearing and migration. It looks to me like the other ones we have in upstream are actually unused except for selftests. We're actually using CPU clearing for now. > > If so would be nice if this patch set includes that replacement work (I > think right now all we have is the clear for lmem), including updating of > selftests and stuff like that. Just to avoid having two ways to do the > same thing in the driver. OK, I'll have a look at stripping the existing code. If we need it moving forward, we can always re-add. /Thomas > -Daniel > >> Chris Wilson (6): >> drm/i915/gt: Add an insert_entry for gen8_ppgtt >> drm/i915/gt: Add a routine to iterate over the pagetables of a GTT >> drm/i915/gt: Export the pinned context constructor and destructor >> drm/i915/gt: Pipelined page migration >> drm/i915/gt: Pipelined clear >> drm/i915/gt: Setup a default migration context on the GT >> >> Thomas Hellström (3): >> drm/i915: Reference objects on the ww object list >> drm/i915: Break out dma_resv ww locking utilities to separate files >> drm/i915: Introduce a ww transaction helper >> >> drivers/gpu/drm/i915/Makefile | 2 + >> drivers/gpu/drm/i915/gem/i915_gem_object.h | 9 +- >> drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 68 ++ >> drivers/gpu/drm/i915/gt/intel_engine.h | 12 + >> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 27 +- >> drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 + >> drivers/gpu/drm/i915/gt/intel_gt.c | 4 + >> drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + >> drivers/gpu/drm/i915/gt/intel_gtt.h | 7 + >> drivers/gpu/drm/i915/gt/intel_migrate.c | 685 ++++++++++++++++++ >> drivers/gpu/drm/i915/gt/intel_migrate.h | 65 ++ >> drivers/gpu/drm/i915/gt/intel_migrate_types.h | 15 + >> drivers/gpu/drm/i915/gt/intel_renderstate.h | 1 + >> drivers/gpu/drm/i915/gt/intel_ring.h | 1 + >> drivers/gpu/drm/i915/gt/selftest_migrate.c | 671 +++++++++++++++++ >> drivers/gpu/drm/i915/i915_gem.c | 52 -- >> drivers/gpu/drm/i915/i915_gem.h | 12 - >> drivers/gpu/drm/i915/i915_gem_ww.c | 63 ++ >> drivers/gpu/drm/i915/i915_gem_ww.h | 50 ++ >> .../drm/i915/selftests/i915_live_selftests.h | 1 + >> .../drm/i915/selftests/i915_perf_selftests.h | 1 + >> 21 files changed, 1675 insertions(+), 76 deletions(-) >> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate.c >> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate.h >> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate_types.h >> create mode 100644 drivers/gpu/drm/i915/gt/selftest_migrate.c >> create mode 100644 drivers/gpu/drm/i915/i915_gem_ww.c >> create mode 100644 drivers/gpu/drm/i915/i915_gem_ww.h >> >> -- >> 2.31.1 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On 09/06/2021 13:16, Thomas Hellström wrote: > > On 6/9/21 1:48 PM, Daniel Vetter wrote: >> On Wed, Jun 09, 2021 at 08:34:27AM +0200, Thomas Hellström wrote: >>> A couple of patches from Chris which implement pipelined migration and >>> clears by atomically writing the PTEs in place before performing the >>> actual blit. >>> >>> Some ww utilities mainly for the accompanying selftests added by Thomas, >>> as well as modified the above patches for ww locking- and lmem support. >>> >>> The actual hook up to the i915 ttm backend is being worked on and not >>> included yet, so this is considered to be an early review opportunity. >>> >>> v2: >>> - A couple of minor style fixes pointed out by Matthew Auld >>> - Export and use intel_engine_destroy_pinned_context() to address a >>> ls CI warning / failure. >> Just to check my understanding of the plan: These are the new windowed >> clear/blt functions which we plan to use everywhere, because less nasty >> locking implications? And the clear/blt we currently have in upstream >> will >> be replaced? > > Yes. These are for LMEM clearing and migration. It looks to me like the > other ones we have in upstream are actually unused except for selftests. > We're actually using CPU clearing for now. > >> >> If so would be nice if this patch set includes that replacement work (I >> think right now all we have is the clear for lmem), including updating of >> selftests and stuff like that. Just to avoid having two ways to do the >> same thing in the driver. > > OK, I'll have a look at stripping the existing code. If we need it > moving forward, we can always re-add. Some low hanging fruit would be all the client_blt stuff which can for sure be deleted now. > > /Thomas > > >> -Daniel >> >>> Chris Wilson (6): >>> drm/i915/gt: Add an insert_entry for gen8_ppgtt >>> drm/i915/gt: Add a routine to iterate over the pagetables of a GTT >>> drm/i915/gt: Export the pinned context constructor and destructor >>> drm/i915/gt: Pipelined page migration >>> drm/i915/gt: Pipelined clear >>> drm/i915/gt: Setup a default migration context on the GT >>> >>> Thomas Hellström (3): >>> drm/i915: Reference objects on the ww object list >>> drm/i915: Break out dma_resv ww locking utilities to separate files >>> drm/i915: Introduce a ww transaction helper >>> >>> drivers/gpu/drm/i915/Makefile | 2 + >>> drivers/gpu/drm/i915/gem/i915_gem_object.h | 9 +- >>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 68 ++ >>> drivers/gpu/drm/i915/gt/intel_engine.h | 12 + >>> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 27 +- >>> drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 + >>> drivers/gpu/drm/i915/gt/intel_gt.c | 4 + >>> drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 + >>> drivers/gpu/drm/i915/gt/intel_gtt.h | 7 + >>> drivers/gpu/drm/i915/gt/intel_migrate.c | 685 ++++++++++++++++++ >>> drivers/gpu/drm/i915/gt/intel_migrate.h | 65 ++ >>> drivers/gpu/drm/i915/gt/intel_migrate_types.h | 15 + >>> drivers/gpu/drm/i915/gt/intel_renderstate.h | 1 + >>> drivers/gpu/drm/i915/gt/intel_ring.h | 1 + >>> drivers/gpu/drm/i915/gt/selftest_migrate.c | 671 +++++++++++++++++ >>> drivers/gpu/drm/i915/i915_gem.c | 52 -- >>> drivers/gpu/drm/i915/i915_gem.h | 12 - >>> drivers/gpu/drm/i915/i915_gem_ww.c | 63 ++ >>> drivers/gpu/drm/i915/i915_gem_ww.h | 50 ++ >>> .../drm/i915/selftests/i915_live_selftests.h | 1 + >>> .../drm/i915/selftests/i915_perf_selftests.h | 1 + >>> 21 files changed, 1675 insertions(+), 76 deletions(-) >>> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate.c >>> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate.h >>> create mode 100644 drivers/gpu/drm/i915/gt/intel_migrate_types.h >>> create mode 100644 drivers/gpu/drm/i915/gt/selftest_migrate.c >>> create mode 100644 drivers/gpu/drm/i915/i915_gem_ww.c >>> create mode 100644 drivers/gpu/drm/i915/i915_gem_ww.h >>> >>> -- >>> 2.31.1 >>> >>> _______________________________________________ >>> Intel-gfx mailing list >>> Intel-gfx@lists.freedesktop.org >>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On 6/9/21 2:20 PM, Matthew Auld wrote: > On 09/06/2021 13:16, Thomas Hellström wrote: >> >> On 6/9/21 1:48 PM, Daniel Vetter wrote: >>> On Wed, Jun 09, 2021 at 08:34:27AM +0200, Thomas Hellström wrote: >>>> A couple of patches from Chris which implement pipelined migration and >>>> clears by atomically writing the PTEs in place before performing the >>>> actual blit. >>>> >>>> Some ww utilities mainly for the accompanying selftests added by >>>> Thomas, >>>> as well as modified the above patches for ww locking- and lmem >>>> support. >>>> >>>> The actual hook up to the i915 ttm backend is being worked on and not >>>> included yet, so this is considered to be an early review opportunity. >>>> >>>> v2: >>>> - A couple of minor style fixes pointed out by Matthew Auld >>>> - Export and use intel_engine_destroy_pinned_context() to address a >>>> ls CI warning / failure. >>> Just to check my understanding of the plan: These are the new windowed >>> clear/blt functions which we plan to use everywhere, because less nasty >>> locking implications? And the clear/blt we currently have in >>> upstream will >>> be replaced? >> >> Yes. These are for LMEM clearing and migration. It looks to me like >> the other ones we have in upstream are actually unused except for >> selftests. We're actually using CPU clearing for now. >> >>> >>> If so would be nice if this patch set includes that replacement work (I >>> think right now all we have is the clear for lmem), including >>> updating of >>> selftests and stuff like that. Just to avoid having two ways to do the >>> same thing in the driver. >> >> OK, I'll have a look at stripping the existing code. If we need it >> moving forward, we can always re-add. > > Some low hanging fruit would be all the client_blt stuff which can for > sure be deleted now. What has the client_blt stuff been used for? In any case, I need 25 commits for commit access to be granted. /Thomas
On 6/9/21 3:08 PM, Thomas Hellström wrote: > > On 6/9/21 2:20 PM, Matthew Auld wrote: >> On 09/06/2021 13:16, Thomas Hellström wrote: >>> >>> On 6/9/21 1:48 PM, Daniel Vetter wrote: >>>> On Wed, Jun 09, 2021 at 08:34:27AM +0200, Thomas Hellström wrote: >>>>> A couple of patches from Chris which implement pipelined migration >>>>> and >>>>> clears by atomically writing the PTEs in place before performing the >>>>> actual blit. >>>>> >>>>> Some ww utilities mainly for the accompanying selftests added by >>>>> Thomas, >>>>> as well as modified the above patches for ww locking- and lmem >>>>> support. >>>>> >>>>> The actual hook up to the i915 ttm backend is being worked on and not >>>>> included yet, so this is considered to be an early review >>>>> opportunity. >>>>> >>>>> v2: >>>>> - A couple of minor style fixes pointed out by Matthew Auld >>>>> - Export and use intel_engine_destroy_pinned_context() to address a >>>>> ls CI warning / failure. >>>> Just to check my understanding of the plan: These are the new windowed >>>> clear/blt functions which we plan to use everywhere, because less >>>> nasty >>>> locking implications? And the clear/blt we currently have in >>>> upstream will >>>> be replaced? >>> >>> Yes. These are for LMEM clearing and migration. It looks to me like >>> the other ones we have in upstream are actually unused except for >>> selftests. We're actually using CPU clearing for now. >>> >>>> >>>> If so would be nice if this patch set includes that replacement >>>> work (I >>>> think right now all we have is the clear for lmem), including >>>> updating of >>>> selftests and stuff like that. Just to avoid having two ways to do the >>>> same thing in the driver. >>> >>> OK, I'll have a look at stripping the existing code. If we need it >>> moving forward, we can always re-add. >> >> Some low hanging fruit would be all the client_blt stuff which can >> for sure be deleted now. > > What has the client_blt stuff been used for? > > In any case, I need 25 commits for commit access to be granted. > > /Thomas > > Series on trybot now. It's the dg1 live memory_region selftest that changes sligthly to use the new migration fill blt. /Thomas
On Wed, Jun 09, 2021 at 04:35:57PM +0200, Thomas Hellström wrote: > > On 6/9/21 3:08 PM, Thomas Hellström wrote: > > > > On 6/9/21 2:20 PM, Matthew Auld wrote: > > > On 09/06/2021 13:16, Thomas Hellström wrote: > > > > > > > > On 6/9/21 1:48 PM, Daniel Vetter wrote: > > > > > On Wed, Jun 09, 2021 at 08:34:27AM +0200, Thomas Hellström wrote: > > > > > > A couple of patches from Chris which implement pipelined > > > > > > migration and > > > > > > clears by atomically writing the PTEs in place before performing the > > > > > > actual blit. > > > > > > > > > > > > Some ww utilities mainly for the accompanying selftests > > > > > > added by Thomas, > > > > > > as well as modified the above patches for ww locking- > > > > > > and lmem support. > > > > > > > > > > > > The actual hook up to the i915 ttm backend is being worked on and not > > > > > > included yet, so this is considered to be an early > > > > > > review opportunity. > > > > > > > > > > > > v2: > > > > > > - A couple of minor style fixes pointed out by Matthew Auld > > > > > > - Export and use intel_engine_destroy_pinned_context() to address a > > > > > > ls CI warning / failure. > > > > > Just to check my understanding of the plan: These are the new windowed > > > > > clear/blt functions which we plan to use everywhere, because > > > > > less nasty > > > > > locking implications? And the clear/blt we currently have in > > > > > upstream will > > > > > be replaced? > > > > > > > > Yes. These are for LMEM clearing and migration. It looks to me > > > > like the other ones we have in upstream are actually unused > > > > except for selftests. We're actually using CPU clearing for now. > > > > > > > > > > > > > > If so would be nice if this patch set includes that > > > > > replacement work (I > > > > > think right now all we have is the clear for lmem), > > > > > including updating of > > > > > selftests and stuff like that. Just to avoid having two ways to do the > > > > > same thing in the driver. > > > > > > > > OK, I'll have a look at stripping the existing code. If we need > > > > it moving forward, we can always re-add. > > > > > > Some low hanging fruit would be all the client_blt stuff which can > > > for sure be deleted now. > > > > What has the client_blt stuff been used for? > > > > In any case, I need 25 commits for commit access to be granted. > > > > /Thomas > > > > > Series on trybot now. It's the dg1 live memory_region selftest that changes > sligthly to use the new migration fill blt. Thanks a lot for taking care of this! -Daniel