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[v2,0/4] fpga: reorganize to subdirs

Message ID 20210609142208.3085451-1-trix@redhat.com (mailing list archive)
Headers show
Series fpga: reorganize to subdirs | expand

Message

Tom Rix June 9, 2021, 2:22 p.m. UTC
From: Tom Rix <trix@redhat.com>

The incoming xrt patchset has a toplevel subdir xrt/
The current fpga/ uses a single dir with filename prefixes to subdivide owners
For consistency, there should be only one way to organize the fpga/ dir.
Because the subdir model scales better, refactor to use it.
The discussion wrt xrt is here:
https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/

Follow drivers/net/ethernet/ which has control configs
NET_VENDOR_BLA that map to drivers/net/ethernet/bla
Since fpgas do not have many vendors, drop the 'VENDOR' and use
FPGA_BLA.

There are several new subdirs
altera/
dfl/
lattice/
xilinx/

Each subdir has a Kconfig that has a new/reused

if FPGA_BLA
  ... existing configs ...
endif FPGA_BLA

Which is sourced into the main fpga/Kconfig

Each subdir has a Makefile whose transversal is controlled in the
fpga/Makefile by

obj-$(CONFIG_FPGA_BLA) += bla/

Some cleanup to arrange thing alphabetically and make fpga/Makefile's
whitespace look more like net/'s

Changes from
v1
  Drop renaming files
  Cleanup makefiles

Tom Rix (4):
  fpga: dfl: reorganize to subdir layout
  fpga: xilinx: reorganize to subdir layout
  fpga: altera: reorganize to subdir layout
  fpga: lattice: reorganize to subdir layout

 MAINTAINERS                                   |   2 +-
 drivers/fpga/Kconfig                          | 204 +-----------------
 drivers/fpga/Makefile                         |  47 +---
 drivers/fpga/altera/Kconfig                   |  78 +++++++
 drivers/fpga/altera/Makefile                  |  12 ++
 drivers/fpga/{ => altera}/altera-cvp.c        |   0
 drivers/fpga/{ => altera}/altera-fpga2sdram.c |   0
 .../fpga/{ => altera}/altera-freeze-bridge.c  |   0
 drivers/fpga/{ => altera}/altera-hps2fpga.c   |   0
 .../{ => altera}/altera-pr-ip-core-plat.c     |   0
 drivers/fpga/{ => altera}/altera-pr-ip-core.c |   0
 drivers/fpga/{ => altera}/altera-ps-spi.c     |   0
 drivers/fpga/{ => altera}/socfpga-a10.c       |   0
 drivers/fpga/{ => altera}/socfpga.c           |   0
 drivers/fpga/{ => altera}/stratix10-soc.c     |   0
 drivers/fpga/{ => altera}/ts73xx-fpga.c       |   0
 drivers/fpga/dfl/Kconfig                      |  81 +++++++
 drivers/fpga/dfl/Makefile                     |  16 ++
 drivers/fpga/{ => dfl}/dfl-afu-dma-region.c   |   0
 drivers/fpga/{ => dfl}/dfl-afu-error.c        |   0
 drivers/fpga/{ => dfl}/dfl-afu-main.c         |   0
 drivers/fpga/{ => dfl}/dfl-afu-region.c       |   0
 drivers/fpga/{ => dfl}/dfl-afu.h              |   0
 drivers/fpga/{ => dfl}/dfl-fme-br.c           |   0
 drivers/fpga/{ => dfl}/dfl-fme-error.c        |   0
 drivers/fpga/{ => dfl}/dfl-fme-main.c         |   0
 drivers/fpga/{ => dfl}/dfl-fme-mgr.c          |   0
 drivers/fpga/{ => dfl}/dfl-fme-perf.c         |   0
 drivers/fpga/{ => dfl}/dfl-fme-pr.c           |   0
 drivers/fpga/{ => dfl}/dfl-fme-pr.h           |   0
 drivers/fpga/{ => dfl}/dfl-fme-region.c       |   0
 drivers/fpga/{ => dfl}/dfl-fme.h              |   0
 drivers/fpga/{ => dfl}/dfl-n3000-nios.c       |   0
 drivers/fpga/{ => dfl}/dfl-pci.c              |   0
 drivers/fpga/{ => dfl}/dfl.c                  |   0
 drivers/fpga/{ => dfl}/dfl.h                  |   0
 drivers/fpga/lattice/Kconfig                  |  22 ++
 drivers/fpga/lattice/Makefile                 |   4 +
 drivers/fpga/{ => lattice}/ice40-spi.c        |   0
 drivers/fpga/{ => lattice}/machxo2-spi.c      |   0
 drivers/fpga/xilinx/Kconfig                   |  48 +++++
 drivers/fpga/xilinx/Makefile                  |   6 +
 .../fpga/{ => xilinx}/xilinx-pr-decoupler.c   |   0
 drivers/fpga/{ => xilinx}/xilinx-spi.c        |   0
 drivers/fpga/{ => xilinx}/zynq-fpga.c         |   0
 drivers/fpga/{ => xilinx}/zynqmp-fpga.c       |   0
 46 files changed, 280 insertions(+), 240 deletions(-)
 create mode 100644 drivers/fpga/altera/Kconfig
 create mode 100644 drivers/fpga/altera/Makefile
 rename drivers/fpga/{ => altera}/altera-cvp.c (100%)
 rename drivers/fpga/{ => altera}/altera-fpga2sdram.c (100%)
 rename drivers/fpga/{ => altera}/altera-freeze-bridge.c (100%)
 rename drivers/fpga/{ => altera}/altera-hps2fpga.c (100%)
 rename drivers/fpga/{ => altera}/altera-pr-ip-core-plat.c (100%)
 rename drivers/fpga/{ => altera}/altera-pr-ip-core.c (100%)
 rename drivers/fpga/{ => altera}/altera-ps-spi.c (100%)
 rename drivers/fpga/{ => altera}/socfpga-a10.c (100%)
 rename drivers/fpga/{ => altera}/socfpga.c (100%)
 rename drivers/fpga/{ => altera}/stratix10-soc.c (100%)
 rename drivers/fpga/{ => altera}/ts73xx-fpga.c (100%)
 create mode 100644 drivers/fpga/dfl/Kconfig
 create mode 100644 drivers/fpga/dfl/Makefile
 rename drivers/fpga/{ => dfl}/dfl-afu-dma-region.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-afu-error.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-afu-main.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-afu-region.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-afu.h (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-br.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-error.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-main.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-mgr.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-perf.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-pr.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-pr.h (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-region.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme.h (100%)
 rename drivers/fpga/{ => dfl}/dfl-n3000-nios.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-pci.c (100%)
 rename drivers/fpga/{ => dfl}/dfl.c (100%)
 rename drivers/fpga/{ => dfl}/dfl.h (100%)
 create mode 100644 drivers/fpga/lattice/Kconfig
 create mode 100644 drivers/fpga/lattice/Makefile
 rename drivers/fpga/{ => lattice}/ice40-spi.c (100%)
 rename drivers/fpga/{ => lattice}/machxo2-spi.c (100%)
 create mode 100644 drivers/fpga/xilinx/Kconfig
 create mode 100644 drivers/fpga/xilinx/Makefile
 rename drivers/fpga/{ => xilinx}/xilinx-pr-decoupler.c (100%)
 rename drivers/fpga/{ => xilinx}/xilinx-spi.c (100%)
 rename drivers/fpga/{ => xilinx}/zynq-fpga.c (100%)
 rename drivers/fpga/{ => xilinx}/zynqmp-fpga.c (100%)

Comments

Tom Rix June 9, 2021, 2:22 p.m. UTC | #1
From: Tom Rix <trix@redhat.com>

The incoming xrt patchset has a toplevel subdir xrt/
The current fpga/ uses a single dir with filename prefixes to subdivide owners
For consistency, there should be only one way to organize the fpga/ dir.
Because the subdir model scales better, refactor to use it.
The discussion wrt xrt is here:
https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/

Follow drivers/net/ethernet/ which has control configs
NET_VENDOR_BLA that map to drivers/net/ethernet/bla
Since fpgas do not have many vendors, drop the 'VENDOR' and use
FPGA_BLA.

There are several new subdirs
altera/
dfl/
lattice/
xilinx/

Each subdir has a Kconfig that has a new/reused

if FPGA_BLA
  ... existing configs ...
endif FPGA_BLA

Which is sourced into the main fpga/Kconfig

Each subdir has a Makefile whose transversal is controlled in the
fpga/Makefile by

obj-$(CONFIG_FPGA_BLA) += bla/

Some cleanup to arrange thing alphabetically and make fpga/Makefile's
whitespace look more like net/'s

Changes from
v1
  Drop renaming files
  Cleanup makefiles

Tom Rix (4):
  fpga: dfl: reorganize to subdir layout
  fpga: xilinx: reorganize to subdir layout
  fpga: altera: reorganize to subdir layout
  fpga: lattice: reorganize to subdir layout

 MAINTAINERS                                   |   2 +-
 drivers/fpga/Kconfig                          | 204 +-----------------
 drivers/fpga/Makefile                         |  47 +---
 drivers/fpga/altera/Kconfig                   |  78 +++++++
 drivers/fpga/altera/Makefile                  |  12 ++
 drivers/fpga/{ => altera}/altera-cvp.c        |   0
 drivers/fpga/{ => altera}/altera-fpga2sdram.c |   0
 .../fpga/{ => altera}/altera-freeze-bridge.c  |   0
 drivers/fpga/{ => altera}/altera-hps2fpga.c   |   0
 .../{ => altera}/altera-pr-ip-core-plat.c     |   0
 drivers/fpga/{ => altera}/altera-pr-ip-core.c |   0
 drivers/fpga/{ => altera}/altera-ps-spi.c     |   0
 drivers/fpga/{ => altera}/socfpga-a10.c       |   0
 drivers/fpga/{ => altera}/socfpga.c           |   0
 drivers/fpga/{ => altera}/stratix10-soc.c     |   0
 drivers/fpga/{ => altera}/ts73xx-fpga.c       |   0
 drivers/fpga/dfl/Kconfig                      |  81 +++++++
 drivers/fpga/dfl/Makefile                     |  16 ++
 drivers/fpga/{ => dfl}/dfl-afu-dma-region.c   |   0
 drivers/fpga/{ => dfl}/dfl-afu-error.c        |   0
 drivers/fpga/{ => dfl}/dfl-afu-main.c         |   0
 drivers/fpga/{ => dfl}/dfl-afu-region.c       |   0
 drivers/fpga/{ => dfl}/dfl-afu.h              |   0
 drivers/fpga/{ => dfl}/dfl-fme-br.c           |   0
 drivers/fpga/{ => dfl}/dfl-fme-error.c        |   0
 drivers/fpga/{ => dfl}/dfl-fme-main.c         |   0
 drivers/fpga/{ => dfl}/dfl-fme-mgr.c          |   0
 drivers/fpga/{ => dfl}/dfl-fme-perf.c         |   0
 drivers/fpga/{ => dfl}/dfl-fme-pr.c           |   0
 drivers/fpga/{ => dfl}/dfl-fme-pr.h           |   0
 drivers/fpga/{ => dfl}/dfl-fme-region.c       |   0
 drivers/fpga/{ => dfl}/dfl-fme.h              |   0
 drivers/fpga/{ => dfl}/dfl-n3000-nios.c       |   0
 drivers/fpga/{ => dfl}/dfl-pci.c              |   0
 drivers/fpga/{ => dfl}/dfl.c                  |   0
 drivers/fpga/{ => dfl}/dfl.h                  |   0
 drivers/fpga/lattice/Kconfig                  |  22 ++
 drivers/fpga/lattice/Makefile                 |   4 +
 drivers/fpga/{ => lattice}/ice40-spi.c        |   0
 drivers/fpga/{ => lattice}/machxo2-spi.c      |   0
 drivers/fpga/xilinx/Kconfig                   |  48 +++++
 drivers/fpga/xilinx/Makefile                  |   6 +
 .../fpga/{ => xilinx}/xilinx-pr-decoupler.c   |   0
 drivers/fpga/{ => xilinx}/xilinx-spi.c        |   0
 drivers/fpga/{ => xilinx}/zynq-fpga.c         |   0
 drivers/fpga/{ => xilinx}/zynqmp-fpga.c       |   0
 46 files changed, 280 insertions(+), 240 deletions(-)
 create mode 100644 drivers/fpga/altera/Kconfig
 create mode 100644 drivers/fpga/altera/Makefile
 rename drivers/fpga/{ => altera}/altera-cvp.c (100%)
 rename drivers/fpga/{ => altera}/altera-fpga2sdram.c (100%)
 rename drivers/fpga/{ => altera}/altera-freeze-bridge.c (100%)
 rename drivers/fpga/{ => altera}/altera-hps2fpga.c (100%)
 rename drivers/fpga/{ => altera}/altera-pr-ip-core-plat.c (100%)
 rename drivers/fpga/{ => altera}/altera-pr-ip-core.c (100%)
 rename drivers/fpga/{ => altera}/altera-ps-spi.c (100%)
 rename drivers/fpga/{ => altera}/socfpga-a10.c (100%)
 rename drivers/fpga/{ => altera}/socfpga.c (100%)
 rename drivers/fpga/{ => altera}/stratix10-soc.c (100%)
 rename drivers/fpga/{ => altera}/ts73xx-fpga.c (100%)
 create mode 100644 drivers/fpga/dfl/Kconfig
 create mode 100644 drivers/fpga/dfl/Makefile
 rename drivers/fpga/{ => dfl}/dfl-afu-dma-region.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-afu-error.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-afu-main.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-afu-region.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-afu.h (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-br.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-error.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-main.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-mgr.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-perf.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-pr.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-pr.h (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme-region.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-fme.h (100%)
 rename drivers/fpga/{ => dfl}/dfl-n3000-nios.c (100%)
 rename drivers/fpga/{ => dfl}/dfl-pci.c (100%)
 rename drivers/fpga/{ => dfl}/dfl.c (100%)
 rename drivers/fpga/{ => dfl}/dfl.h (100%)
 create mode 100644 drivers/fpga/lattice/Kconfig
 create mode 100644 drivers/fpga/lattice/Makefile
 rename drivers/fpga/{ => lattice}/ice40-spi.c (100%)
 rename drivers/fpga/{ => lattice}/machxo2-spi.c (100%)
 create mode 100644 drivers/fpga/xilinx/Kconfig
 create mode 100644 drivers/fpga/xilinx/Makefile
 rename drivers/fpga/{ => xilinx}/xilinx-pr-decoupler.c (100%)
 rename drivers/fpga/{ => xilinx}/xilinx-spi.c (100%)
 rename drivers/fpga/{ => xilinx}/zynq-fpga.c (100%)
 rename drivers/fpga/{ => xilinx}/zynqmp-fpga.c (100%)
Greg Kroah-Hartman June 9, 2021, 2:51 p.m. UTC | #2
On Wed, Jun 09, 2021 at 07:22:03AM -0700, trix@redhat.com wrote:
> From: Tom Rix <trix@redhat.com>
> 
> The incoming xrt patchset has a toplevel subdir xrt/
> The current fpga/ uses a single dir with filename prefixes to subdivide owners
> For consistency, there should be only one way to organize the fpga/ dir.
> Because the subdir model scales better, refactor to use it.
> The discussion wrt xrt is here:
> https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/

Why am I getting 2 copies of 0/4?

Please fix your email client...
Greg Kroah-Hartman June 9, 2021, 2:53 p.m. UTC | #3
On Wed, Jun 09, 2021 at 07:22:03AM -0700, trix@redhat.com wrote:
> From: Tom Rix <trix@redhat.com>
> 
> The incoming xrt patchset has a toplevel subdir xrt/
> The current fpga/ uses a single dir with filename prefixes to subdivide owners
> For consistency, there should be only one way to organize the fpga/ dir.
> Because the subdir model scales better, refactor to use it.
> The discussion wrt xrt is here:
> https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/
> 
> Follow drivers/net/ethernet/ which has control configs
> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
> Since fpgas do not have many vendors, drop the 'VENDOR' and use
> FPGA_BLA.
> 
> There are several new subdirs
> altera/
> dfl/
> lattice/
> xilinx/
> 
> Each subdir has a Kconfig that has a new/reused
> 
> if FPGA_BLA
>   ... existing configs ...
> endif FPGA_BLA
> 
> Which is sourced into the main fpga/Kconfig
> 
> Each subdir has a Makefile whose transversal is controlled in the
> fpga/Makefile by
> 
> obj-$(CONFIG_FPGA_BLA) += bla/
> 
> Some cleanup to arrange thing alphabetically and make fpga/Makefile's
> whitespace look more like net/'s
> 
> Changes from
> v1
>   Drop renaming files
>   Cleanup makefiles

You can rename the files, you just can not rename the .ko objects
without everyone knowing what you are doing and you trying to bury it in
the middle of a differently described patch.

If you want to do that, do you?  I don't really understand why you want
to move things around right now other than "we have 40 files in one
directory, ick!".

greg k-h
Tom Rix June 9, 2021, 3:08 p.m. UTC | #4
On 6/9/21 7:53 AM, Greg KH wrote:
> On Wed, Jun 09, 2021 at 07:22:03AM -0700, trix@redhat.com wrote:
>> From: Tom Rix <trix@redhat.com>
>>
>> The incoming xrt patchset has a toplevel subdir xrt/
>> The current fpga/ uses a single dir with filename prefixes to subdivide owners
>> For consistency, there should be only one way to organize the fpga/ dir.
>> Because the subdir model scales better, refactor to use it.
>> The discussion wrt xrt is here:
>> https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/
>>
>> Follow drivers/net/ethernet/ which has control configs
>> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
>> Since fpgas do not have many vendors, drop the 'VENDOR' and use
>> FPGA_BLA.
>>
>> There are several new subdirs
>> altera/
>> dfl/
>> lattice/
>> xilinx/
>>
>> Each subdir has a Kconfig that has a new/reused
>>
>> if FPGA_BLA
>>    ... existing configs ...
>> endif FPGA_BLA
>>
>> Which is sourced into the main fpga/Kconfig
>>
>> Each subdir has a Makefile whose transversal is controlled in the
>> fpga/Makefile by
>>
>> obj-$(CONFIG_FPGA_BLA) += bla/
>>
>> Some cleanup to arrange thing alphabetically and make fpga/Makefile's
>> whitespace look more like net/'s
>>
>> Changes from
>> v1
>>    Drop renaming files
>>    Cleanup makefiles
> You can rename the files, you just can not rename the .ko objects
> without everyone knowing what you are doing and you trying to bury it in
> the middle of a differently described patch.
>
> If you want to do that, do you?  I don't really understand why you want
> to move things around right now other than "we have 40 files in one
> directory, ick!".

I am trying to resolve the layout inconsistency between what we have and 
what the xrt patchset does.

The big issue is the files vs dirs.

Over specified filenames is secondary, so I dropped them.

40 files in one dir is itself not a problem.

having 40 files and an xrt/ is.

fpga/ layout should be consistent so the Makefile and Kconfig are easier 
to maintain.

My preference is for subdir's.

Tom

>
> greg k-h
>
Greg Kroah-Hartman June 9, 2021, 4:38 p.m. UTC | #5
On Wed, Jun 09, 2021 at 08:08:06AM -0700, Tom Rix wrote:
> 
> On 6/9/21 7:53 AM, Greg KH wrote:
> > On Wed, Jun 09, 2021 at 07:22:03AM -0700, trix@redhat.com wrote:
> > > From: Tom Rix <trix@redhat.com>
> > > 
> > > The incoming xrt patchset has a toplevel subdir xrt/
> > > The current fpga/ uses a single dir with filename prefixes to subdivide owners
> > > For consistency, there should be only one way to organize the fpga/ dir.
> > > Because the subdir model scales better, refactor to use it.
> > > The discussion wrt xrt is here:
> > > https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/
> > > 
> > > Follow drivers/net/ethernet/ which has control configs
> > > NET_VENDOR_BLA that map to drivers/net/ethernet/bla
> > > Since fpgas do not have many vendors, drop the 'VENDOR' and use
> > > FPGA_BLA.
> > > 
> > > There are several new subdirs
> > > altera/
> > > dfl/
> > > lattice/
> > > xilinx/
> > > 
> > > Each subdir has a Kconfig that has a new/reused
> > > 
> > > if FPGA_BLA
> > >    ... existing configs ...
> > > endif FPGA_BLA
> > > 
> > > Which is sourced into the main fpga/Kconfig
> > > 
> > > Each subdir has a Makefile whose transversal is controlled in the
> > > fpga/Makefile by
> > > 
> > > obj-$(CONFIG_FPGA_BLA) += bla/
> > > 
> > > Some cleanup to arrange thing alphabetically and make fpga/Makefile's
> > > whitespace look more like net/'s
> > > 
> > > Changes from
> > > v1
> > >    Drop renaming files
> > >    Cleanup makefiles
> > You can rename the files, you just can not rename the .ko objects
> > without everyone knowing what you are doing and you trying to bury it in
> > the middle of a differently described patch.
> > 
> > If you want to do that, do you?  I don't really understand why you want
> > to move things around right now other than "we have 40 files in one
> > directory, ick!".
> 
> I am trying to resolve the layout inconsistency between what we have and
> what the xrt patchset does.

Why does it matter?  New stuff can be added to a new dir, why worry
about old stuff?  What does it hurt?

> The big issue is the files vs dirs.
> 
> Over specified filenames is secondary, so I dropped them.
> 
> 40 files in one dir is itself not a problem.
> 
> having 40 files and an xrt/ is.

Why is that a "problem"?

> fpga/ layout should be consistent so the Makefile and Kconfig are easier to
> maintain.

Is it somehow hard to maintain today?  Seems pretty trivial to me...

thanks,

greg k-h
Tom Rix June 9, 2021, 4:50 p.m. UTC | #6
On 6/9/21 9:38 AM, Greg KH wrote:
> On Wed, Jun 09, 2021 at 08:08:06AM -0700, Tom Rix wrote:
>> On 6/9/21 7:53 AM, Greg KH wrote:
>>> On Wed, Jun 09, 2021 at 07:22:03AM -0700, trix@redhat.com wrote:
>>>> From: Tom Rix <trix@redhat.com>
>>>>
>>>> The incoming xrt patchset has a toplevel subdir xrt/
>>>> The current fpga/ uses a single dir with filename prefixes to subdivide owners
>>>> For consistency, there should be only one way to organize the fpga/ dir.
>>>> Because the subdir model scales better, refactor to use it.
>>>> The discussion wrt xrt is here:
>>>> https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/
>>>>
>>>> Follow drivers/net/ethernet/ which has control configs
>>>> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
>>>> Since fpgas do not have many vendors, drop the 'VENDOR' and use
>>>> FPGA_BLA.
>>>>
>>>> There are several new subdirs
>>>> altera/
>>>> dfl/
>>>> lattice/
>>>> xilinx/
>>>>
>>>> Each subdir has a Kconfig that has a new/reused
>>>>
>>>> if FPGA_BLA
>>>>     ... existing configs ...
>>>> endif FPGA_BLA
>>>>
>>>> Which is sourced into the main fpga/Kconfig
>>>>
>>>> Each subdir has a Makefile whose transversal is controlled in the
>>>> fpga/Makefile by
>>>>
>>>> obj-$(CONFIG_FPGA_BLA) += bla/
>>>>
>>>> Some cleanup to arrange thing alphabetically and make fpga/Makefile's
>>>> whitespace look more like net/'s
>>>>
>>>> Changes from
>>>> v1
>>>>     Drop renaming files
>>>>     Cleanup makefiles
>>> You can rename the files, you just can not rename the .ko objects
>>> without everyone knowing what you are doing and you trying to bury it in
>>> the middle of a differently described patch.
>>>
>>> If you want to do that, do you?  I don't really understand why you want
>>> to move things around right now other than "we have 40 files in one
>>> directory, ick!".
>> I am trying to resolve the layout inconsistency between what we have and
>> what the xrt patchset does.
> Why does it matter?  New stuff can be added to a new dir, why worry
> about old stuff?  What does it hurt?
>
>> The big issue is the files vs dirs.
>>
>> Over specified filenames is secondary, so I dropped them.
>>
>> 40 files in one dir is itself not a problem.
>>
>> having 40 files and an xrt/ is.
> Why is that a "problem"?
>
>> fpga/ layout should be consistent so the Makefile and Kconfig are easier to
>> maintain.
> Is it somehow hard to maintain today?  Seems pretty trivial to me...

This change was to help move xrt along.

If you are fine with xrt/, I will drop this patchset.

Tom

>
> thanks,
>
> greg k-h
>
Greg Kroah-Hartman June 9, 2021, 5:13 p.m. UTC | #7
On Wed, Jun 09, 2021 at 09:50:39AM -0700, Tom Rix wrote:
> 
> On 6/9/21 9:38 AM, Greg KH wrote:
> > On Wed, Jun 09, 2021 at 08:08:06AM -0700, Tom Rix wrote:
> > > On 6/9/21 7:53 AM, Greg KH wrote:
> > > > On Wed, Jun 09, 2021 at 07:22:03AM -0700, trix@redhat.com wrote:
> > > > > From: Tom Rix <trix@redhat.com>
> > > > > 
> > > > > The incoming xrt patchset has a toplevel subdir xrt/
> > > > > The current fpga/ uses a single dir with filename prefixes to subdivide owners
> > > > > For consistency, there should be only one way to organize the fpga/ dir.
> > > > > Because the subdir model scales better, refactor to use it.
> > > > > The discussion wrt xrt is here:
> > > > > https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/
> > > > > 
> > > > > Follow drivers/net/ethernet/ which has control configs
> > > > > NET_VENDOR_BLA that map to drivers/net/ethernet/bla
> > > > > Since fpgas do not have many vendors, drop the 'VENDOR' and use
> > > > > FPGA_BLA.
> > > > > 
> > > > > There are several new subdirs
> > > > > altera/
> > > > > dfl/
> > > > > lattice/
> > > > > xilinx/
> > > > > 
> > > > > Each subdir has a Kconfig that has a new/reused
> > > > > 
> > > > > if FPGA_BLA
> > > > >     ... existing configs ...
> > > > > endif FPGA_BLA
> > > > > 
> > > > > Which is sourced into the main fpga/Kconfig
> > > > > 
> > > > > Each subdir has a Makefile whose transversal is controlled in the
> > > > > fpga/Makefile by
> > > > > 
> > > > > obj-$(CONFIG_FPGA_BLA) += bla/
> > > > > 
> > > > > Some cleanup to arrange thing alphabetically and make fpga/Makefile's
> > > > > whitespace look more like net/'s
> > > > > 
> > > > > Changes from
> > > > > v1
> > > > >     Drop renaming files
> > > > >     Cleanup makefiles
> > > > You can rename the files, you just can not rename the .ko objects
> > > > without everyone knowing what you are doing and you trying to bury it in
> > > > the middle of a differently described patch.
> > > > 
> > > > If you want to do that, do you?  I don't really understand why you want
> > > > to move things around right now other than "we have 40 files in one
> > > > directory, ick!".
> > > I am trying to resolve the layout inconsistency between what we have and
> > > what the xrt patchset does.
> > Why does it matter?  New stuff can be added to a new dir, why worry
> > about old stuff?  What does it hurt?
> > 
> > > The big issue is the files vs dirs.
> > > 
> > > Over specified filenames is secondary, so I dropped them.
> > > 
> > > 40 files in one dir is itself not a problem.
> > > 
> > > having 40 files and an xrt/ is.
> > Why is that a "problem"?
> > 
> > > fpga/ layout should be consistent so the Makefile and Kconfig are easier to
> > > maintain.
> > Is it somehow hard to maintain today?  Seems pretty trivial to me...
> 
> This change was to help move xrt along.
> 
> If you are fine with xrt/, I will drop this patchset.

Who has objected to xrt/ being the only new subdirectory?

My main complaints here are:
	- these patches were not tested
	- you renamed kernel modules "accidentally"
	- you forgot SPDX lines
	- lack of description of why these files being moved was
	  necessary in the changelog where you moved the files

Remember, patch 0/X never shows up in changelogs...

You can do better :)

greg k-h
Tom Rix June 9, 2021, 6:52 p.m. UTC | #8
On 6/9/21 10:13 AM, Greg KH wrote:
> On Wed, Jun 09, 2021 at 09:50:39AM -0700, Tom Rix wrote:
>> On 6/9/21 9:38 AM, Greg KH wrote:
>>> On Wed, Jun 09, 2021 at 08:08:06AM -0700, Tom Rix wrote:
>>>> On 6/9/21 7:53 AM, Greg KH wrote:
>>>>> On Wed, Jun 09, 2021 at 07:22:03AM -0700, trix@redhat.com wrote:
>>>>>> From: Tom Rix <trix@redhat.com>
>>>>>>
>>>>>> The incoming xrt patchset has a toplevel subdir xrt/
>>>>>> The current fpga/ uses a single dir with filename prefixes to subdivide owners
>>>>>> For consistency, there should be only one way to organize the fpga/ dir.
>>>>>> Because the subdir model scales better, refactor to use it.
>>>>>> The discussion wrt xrt is here:
>>>>>> https://lore.kernel.org/linux-fpga/68e85a4f-4a10-1ff9-0443-aa565878c855@redhat.com/
>>>>>>
>>>>>> Follow drivers/net/ethernet/ which has control configs
>>>>>> NET_VENDOR_BLA that map to drivers/net/ethernet/bla
>>>>>> Since fpgas do not have many vendors, drop the 'VENDOR' and use
>>>>>> FPGA_BLA.
>>>>>>
>>>>>> There are several new subdirs
>>>>>> altera/
>>>>>> dfl/
>>>>>> lattice/
>>>>>> xilinx/
>>>>>>
>>>>>> Each subdir has a Kconfig that has a new/reused
>>>>>>
>>>>>> if FPGA_BLA
>>>>>>      ... existing configs ...
>>>>>> endif FPGA_BLA
>>>>>>
>>>>>> Which is sourced into the main fpga/Kconfig
>>>>>>
>>>>>> Each subdir has a Makefile whose transversal is controlled in the
>>>>>> fpga/Makefile by
>>>>>>
>>>>>> obj-$(CONFIG_FPGA_BLA) += bla/
>>>>>>
>>>>>> Some cleanup to arrange thing alphabetically and make fpga/Makefile's
>>>>>> whitespace look more like net/'s
>>>>>>
>>>>>> Changes from
>>>>>> v1
>>>>>>      Drop renaming files
>>>>>>      Cleanup makefiles
>>>>> You can rename the files, you just can not rename the .ko objects
>>>>> without everyone knowing what you are doing and you trying to bury it in
>>>>> the middle of a differently described patch.
>>>>>
>>>>> If you want to do that, do you?  I don't really understand why you want
>>>>> to move things around right now other than "we have 40 files in one
>>>>> directory, ick!".
>>>> I am trying to resolve the layout inconsistency between what we have and
>>>> what the xrt patchset does.
>>> Why does it matter?  New stuff can be added to a new dir, why worry
>>> about old stuff?  What does it hurt?
>>>
>>>> The big issue is the files vs dirs.
>>>>
>>>> Over specified filenames is secondary, so I dropped them.
>>>>
>>>> 40 files in one dir is itself not a problem.
>>>>
>>>> having 40 files and an xrt/ is.
>>> Why is that a "problem"?
>>>
>>>> fpga/ layout should be consistent so the Makefile and Kconfig are easier to
>>>> maintain.
>>> Is it somehow hard to maintain today?  Seems pretty trivial to me...
>> This change was to help move xrt along.
>>
>> If you are fine with xrt/, I will drop this patchset.
> Who has objected to xrt/ being the only new subdirectory?

Maybe just me, but it has been mostly me doing the review.

all of my easy comments have been nearly resolved.

now I am looking at bigger issues like this, should subdev's move out of 
fpga/ etc.

>
> My main complaints here are:
> 	- these patches were not tested
> 	- you renamed kernel modules "accidentally"
> 	- you forgot SPDX lines
> 	- lack of description of why these files being moved was
> 	  necessary in the changelog where you moved the files
>
> Remember, patch 0/X never shows up in changelogs...

I will respin and collapse the patches to a single patch with a better 
commit log.

They aren't really useful except as a full change.

Testing will be done for dfl.

Tom

>
> You can do better :)
>
> greg k-h
>
Greg Kroah-Hartman June 9, 2021, 7:16 p.m. UTC | #9
On Wed, Jun 09, 2021 at 11:52:44AM -0700, Tom Rix wrote:
> > My main complaints here are:
> > 	- these patches were not tested
> > 	- you renamed kernel modules "accidentally"
> > 	- you forgot SPDX lines
> > 	- lack of description of why these files being moved was
> > 	  necessary in the changelog where you moved the files
> > 
> > Remember, patch 0/X never shows up in changelogs...
> 
> I will respin and collapse the patches to a single patch with a better
> commit log.

They should not be a single patch, I never said that at all :(

Please read what I wrote above, did I ever mention there was too many
patches in the series here?

{sigh}

greg k-h