diff mbox series

[v2,5/7] media: rockchip: rkisp1: add prefixes for v10 specific parts

Message ID 20210615003741.3758316-6-heiko@sntech.de (mailing list archive)
State New, archived
Headers show
Series rkisp1 support for px30 | expand

Commit Message

Heiko Stübner June 15, 2021, 12:37 a.m. UTC 
From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

The rkisp1 evolved over soc generations and the rk3326/px30 introduced
the so called v12 - probably meaning v1.2.

In a first step adapt the affected v10 parts to give them a
matching suffix to enable us to add v12 variants later on.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
---
 .../platform/rockchip/rkisp1/rkisp1-params.c  | 180 +++++------
 .../platform/rockchip/rkisp1/rkisp1-regs.h    | 295 ++++++++++--------
 .../platform/rockchip/rkisp1/rkisp1-stats.c   |  32 +-
 3 files changed, 269 insertions(+), 238 deletions(-)

Comments

Dafna Hirschfeld June 15, 2021, 6:06 a.m. UTC | #1 
Hi,

On 15.06.21 03:37, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
> 
> The rkisp1 evolved over soc generations and the rk3326/px30 introduced
> the so called v12 - probably meaning v1.2.
> 
> In a first step adapt the affected v10 parts to give them a
> matching suffix to enable us to add v12 variants later on.
> 
> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
> ---
>   .../platform/rockchip/rkisp1/rkisp1-params.c  | 180 +++++------
>   .../platform/rockchip/rkisp1/rkisp1-regs.h    | 295 ++++++++++--------
>   .../platform/rockchip/rkisp1/rkisp1-stats.c   |  32 +-
>   3 files changed, 269 insertions(+), 238 deletions(-)
> 
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> index a971892ba81d..427c7cc400b2 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
> @@ -185,8 +185,8 @@ static void rkisp1_bls_config(struct rkisp1_params *params,
>   
>   /* ISP LS correction interface function */
>   static void
> -rkisp1_lsc_matrix_config(struct rkisp1_params *params,
> -			 const struct rkisp1_cif_isp_lsc_config *pconfig)
> +rkisp1_lsc_matrix_config_v10(struct rkisp1_params *params,
> +			     const struct rkisp1_cif_isp_lsc_config *pconfig)
>   {
>   	unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel, i, j, data;
>   
> @@ -212,39 +212,39 @@ rkisp1_lsc_matrix_config(struct rkisp1_params *params,
>   		 * DWORDs (2nd value of last DWORD unused)
>   		 */
>   		for (j = 0; j < RKISP1_CIF_ISP_LSC_SAMPLES_MAX - 1; j += 2) {
> -			data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->r_data_tbl[i][j],
> -							     pconfig->r_data_tbl[i][j + 1]);
> +			data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->r_data_tbl[i][j],
> +								 pconfig->r_data_tbl[i][j + 1]);
>   			rkisp1_write(params->rkisp1, data,
>   				     RKISP1_CIF_ISP_LSC_R_TABLE_DATA);
>   
> -			data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->gr_data_tbl[i][j],
> -							     pconfig->gr_data_tbl[i][j + 1]);
> +			data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->gr_data_tbl[i][j],
> +								 pconfig->gr_data_tbl[i][j + 1]);
>   			rkisp1_write(params->rkisp1, data,
>   				     RKISP1_CIF_ISP_LSC_GR_TABLE_DATA);
>   
> -			data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->gb_data_tbl[i][j],
> -							     pconfig->gb_data_tbl[i][j + 1]);
> +			data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->gb_data_tbl[i][j],
> +								 pconfig->gb_data_tbl[i][j + 1]);
>   			rkisp1_write(params->rkisp1, data,
>   				     RKISP1_CIF_ISP_LSC_GB_TABLE_DATA);
>   
> -			data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->b_data_tbl[i][j],
> -							     pconfig->b_data_tbl[i][j + 1]);
> +			data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->b_data_tbl[i][j],
> +								 pconfig->b_data_tbl[i][j + 1]);
>   			rkisp1_write(params->rkisp1, data,
>   				     RKISP1_CIF_ISP_LSC_B_TABLE_DATA);
>   		}
> -		data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->r_data_tbl[i][j], 0);
> +		data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->r_data_tbl[i][j], 0);
>   		rkisp1_write(params->rkisp1, data,
>   			     RKISP1_CIF_ISP_LSC_R_TABLE_DATA);
>   
> -		data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->gr_data_tbl[i][j], 0);
> +		data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->gr_data_tbl[i][j], 0);
>   		rkisp1_write(params->rkisp1, data,
>   			     RKISP1_CIF_ISP_LSC_GR_TABLE_DATA);
>   
> -		data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->gb_data_tbl[i][j], 0);
> +		data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->gb_data_tbl[i][j], 0);
>   		rkisp1_write(params->rkisp1, data,
>   			     RKISP1_CIF_ISP_LSC_GB_TABLE_DATA);
>   
> -		data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->b_data_tbl[i][j], 0);
> +		data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->b_data_tbl[i][j], 0);
>   		rkisp1_write(params->rkisp1, data,
>   			     RKISP1_CIF_ISP_LSC_B_TABLE_DATA);
>   	}
> @@ -382,18 +382,18 @@ static void rkisp1_sdg_config(struct rkisp1_params *params,
>   }
>   
>   /* ISP GAMMA correction interface function */
> -static void rkisp1_goc_config(struct rkisp1_params *params,
> -			      const struct rkisp1_cif_isp_goc_config *arg)
> +static void rkisp1_goc_config_v10(struct rkisp1_params *params,
> +				  const struct rkisp1_cif_isp_goc_config *arg)
>   {
>   	unsigned int i;
>   
>   	rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_CTRL,
>   				RKISP1_CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
> -	rkisp1_write(params->rkisp1, arg->mode, RKISP1_CIF_ISP_GAMMA_OUT_MODE);
> +	rkisp1_write(params->rkisp1, arg->mode, RKISP1_CIF_ISP_GAMMA_OUT_MODE_V10);
>   
>   	for (i = 0; i < RKISP1_CIF_ISP_GAMMA_OUT_MAX_SAMPLES_V10; i++)
>   		rkisp1_write(params->rkisp1, arg->gamma_y[i],
> -			     RKISP1_CIF_ISP_GAMMA_OUT_Y_0 + i * 4);
> +			     RKISP1_CIF_ISP_GAMMA_OUT_Y_0_V10 + i * 4);
>   }
>   
>   /* ISP Cross Talk */
> @@ -433,8 +433,8 @@ static void rkisp1_ctk_enable(struct rkisp1_params *params, bool en)
>   }
>   
>   /* ISP White Balance Mode */
> -static void rkisp1_awb_meas_config(struct rkisp1_params *params,
> -				   const struct rkisp1_cif_isp_awb_meas_config *arg)
> +static void rkisp1_awb_meas_config_v10(struct rkisp1_params *params,
> +				       const struct rkisp1_cif_isp_awb_meas_config *arg)
>   {
>   	u32 reg_val = 0;
>   	/* based on the mode,configure the awb module */
> @@ -442,43 +442,43 @@ static void rkisp1_awb_meas_config(struct rkisp1_params *params,
>   		/* Reference Cb and Cr */
>   		rkisp1_write(params->rkisp1,
>   			     RKISP1_CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
> -			     arg->awb_ref_cb, RKISP1_CIF_ISP_AWB_REF);
> +			     arg->awb_ref_cb, RKISP1_CIF_ISP_AWB_REF_V10);
>   		/* Yc Threshold */
>   		rkisp1_write(params->rkisp1,
>   			     RKISP1_CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
>   			     RKISP1_CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
>   			     RKISP1_CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
> -			     arg->min_c, RKISP1_CIF_ISP_AWB_THRESH);
> +			     arg->min_c, RKISP1_CIF_ISP_AWB_THRESH_V10);
>   	}
>   
> -	reg_val = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_AWB_PROP);
> +	reg_val = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_AWB_PROP_V10);
>   	if (arg->enable_ymax_cmp)
>   		reg_val |= RKISP1_CIF_ISP_AWB_YMAX_CMP_EN;
>   	else
>   		reg_val &= ~RKISP1_CIF_ISP_AWB_YMAX_CMP_EN;
> -	rkisp1_write(params->rkisp1, reg_val, RKISP1_CIF_ISP_AWB_PROP);
> +	rkisp1_write(params->rkisp1, reg_val, RKISP1_CIF_ISP_AWB_PROP_V10);
>   
>   	/* window offset */
>   	rkisp1_write(params->rkisp1,
> -		     arg->awb_wnd.v_offs, RKISP1_CIF_ISP_AWB_WND_V_OFFS);
> +		     arg->awb_wnd.v_offs, RKISP1_CIF_ISP_AWB_WND_V_OFFS_V10);
>   	rkisp1_write(params->rkisp1,
> -		     arg->awb_wnd.h_offs, RKISP1_CIF_ISP_AWB_WND_H_OFFS);
> +		     arg->awb_wnd.h_offs, RKISP1_CIF_ISP_AWB_WND_H_OFFS_V10);
>   	/* AWB window size */
>   	rkisp1_write(params->rkisp1,
> -		     arg->awb_wnd.v_size, RKISP1_CIF_ISP_AWB_WND_V_SIZE);
> +		     arg->awb_wnd.v_size, RKISP1_CIF_ISP_AWB_WND_V_SIZE_V10);
>   	rkisp1_write(params->rkisp1,
> -		     arg->awb_wnd.h_size, RKISP1_CIF_ISP_AWB_WND_H_SIZE);
> +		     arg->awb_wnd.h_size, RKISP1_CIF_ISP_AWB_WND_H_SIZE_V10);
>   	/* Number of frames */
>   	rkisp1_write(params->rkisp1,
> -		     arg->frames, RKISP1_CIF_ISP_AWB_FRAMES);
> +		     arg->frames, RKISP1_CIF_ISP_AWB_FRAMES_V10);
>   }
>   
>   static void
> -rkisp1_awb_meas_enable(struct rkisp1_params *params,
> -		       const struct rkisp1_cif_isp_awb_meas_config *arg,
> -		       bool en)
> +rkisp1_awb_meas_enable_v10(struct rkisp1_params *params,
> +			   const struct rkisp1_cif_isp_awb_meas_config *arg,
> +			   bool en)
>   {
> -	u32 reg_val = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_AWB_PROP);
> +	u32 reg_val = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_AWB_PROP_V10);
>   
>   	/* switch off */
>   	reg_val &= RKISP1_CIF_ISP_AWB_MODE_MASK_NONE;
> @@ -489,34 +489,34 @@ rkisp1_awb_meas_enable(struct rkisp1_params *params,
>   		else
>   			reg_val |= RKISP1_CIF_ISP_AWB_MODE_YCBCR_EN;
>   
> -		rkisp1_write(params->rkisp1, reg_val, RKISP1_CIF_ISP_AWB_PROP);
> +		rkisp1_write(params->rkisp1, reg_val, RKISP1_CIF_ISP_AWB_PROP_V10);
>   
>   		/* Measurements require AWB block be active. */
>   		rkisp1_param_set_bits(params, RKISP1_CIF_ISP_CTRL,
>   				      RKISP1_CIF_ISP_CTRL_ISP_AWB_ENA);
>   	} else {
>   		rkisp1_write(params->rkisp1,
> -			     reg_val, RKISP1_CIF_ISP_AWB_PROP);
> +			     reg_val, RKISP1_CIF_ISP_AWB_PROP_V10);
>   		rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_CTRL,
>   					RKISP1_CIF_ISP_CTRL_ISP_AWB_ENA);
>   	}
>   }
>   
>   static void
> -rkisp1_awb_gain_config(struct rkisp1_params *params,
> -		       const struct rkisp1_cif_isp_awb_gain_config *arg)
> +rkisp1_awb_gain_config_v10(struct rkisp1_params *params,
> +			   const struct rkisp1_cif_isp_awb_gain_config *arg)
>   {
>   	rkisp1_write(params->rkisp1,
>   		     RKISP1_CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
> -		     arg->gain_green_b, RKISP1_CIF_ISP_AWB_GAIN_G);
> +		     arg->gain_green_b, RKISP1_CIF_ISP_AWB_GAIN_G_V10);
>   
>   	rkisp1_write(params->rkisp1,
>   		     RKISP1_CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
> -		     arg->gain_blue, RKISP1_CIF_ISP_AWB_GAIN_RB);
> +		     arg->gain_blue, RKISP1_CIF_ISP_AWB_GAIN_RB_V10);
>   }
>   
> -static void rkisp1_aec_config(struct rkisp1_params *params,
> -			      const struct rkisp1_cif_isp_aec_config *arg)
> +static void rkisp1_aec_config_v10(struct rkisp1_params *params,
> +				  const struct rkisp1_cif_isp_aec_config *arg)
>   {
>   	unsigned int block_hsize, block_vsize;
>   	u32 exp_ctrl;
> @@ -531,21 +531,21 @@ static void rkisp1_aec_config(struct rkisp1_params *params,
>   	rkisp1_write(params->rkisp1, exp_ctrl, RKISP1_CIF_ISP_EXP_CTRL);
>   
>   	rkisp1_write(params->rkisp1,
> -		     arg->meas_window.h_offs, RKISP1_CIF_ISP_EXP_H_OFFSET);
> +		     arg->meas_window.h_offs, RKISP1_CIF_ISP_EXP_H_OFFSET_V10);
>   	rkisp1_write(params->rkisp1,
> -		     arg->meas_window.v_offs, RKISP1_CIF_ISP_EXP_V_OFFSET);
> +		     arg->meas_window.v_offs, RKISP1_CIF_ISP_EXP_V_OFFSET_V10);
>   
>   	block_hsize = arg->meas_window.h_size /
> -		      RKISP1_CIF_ISP_EXP_COLUMN_NUM - 1;
> +		      RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10 - 1;
>   	block_vsize = arg->meas_window.v_size /
> -		      RKISP1_CIF_ISP_EXP_ROW_NUM - 1;
> +		      RKISP1_CIF_ISP_EXP_ROW_NUM_V10 - 1;
>   
>   	rkisp1_write(params->rkisp1,
> -		     RKISP1_CIF_ISP_EXP_H_SIZE_SET(block_hsize),
> -		     RKISP1_CIF_ISP_EXP_H_SIZE);
> +		     RKISP1_CIF_ISP_EXP_H_SIZE_SET_V10(block_hsize),
> +		     RKISP1_CIF_ISP_EXP_H_SIZE_V10);
>   	rkisp1_write(params->rkisp1,
> -		     RKISP1_CIF_ISP_EXP_V_SIZE_SET(block_vsize),
> -		     RKISP1_CIF_ISP_EXP_V_SIZE);
> +		     RKISP1_CIF_ISP_EXP_V_SIZE_SET_V10(block_vsize),
> +		     RKISP1_CIF_ISP_EXP_V_SIZE_V10);
>   }
>   
>   static void rkisp1_cproc_config(struct rkisp1_params *params,
> @@ -578,73 +578,73 @@ static void rkisp1_cproc_config(struct rkisp1_params *params,
>   	}
>   }
>   
> -static void rkisp1_hst_config(struct rkisp1_params *params,
> -			      const struct rkisp1_cif_isp_hst_config *arg)
> +static void rkisp1_hst_config_v10(struct rkisp1_params *params,
> +				  const struct rkisp1_cif_isp_hst_config *arg)
>   {
>   	unsigned int block_hsize, block_vsize;
>   	static const u32 hist_weight_regs[] = {
> -		RKISP1_CIF_ISP_HIST_WEIGHT_00TO30,
> -		RKISP1_CIF_ISP_HIST_WEIGHT_40TO21,
> -		RKISP1_CIF_ISP_HIST_WEIGHT_31TO12,
> -		RKISP1_CIF_ISP_HIST_WEIGHT_22TO03,
> -		RKISP1_CIF_ISP_HIST_WEIGHT_13TO43,
> -		RKISP1_CIF_ISP_HIST_WEIGHT_04TO34,
> +		RKISP1_CIF_ISP_HIST_WEIGHT_00TO30_V10,
> +		RKISP1_CIF_ISP_HIST_WEIGHT_40TO21_V10,
> +		RKISP1_CIF_ISP_HIST_WEIGHT_31TO12_V10,
> +		RKISP1_CIF_ISP_HIST_WEIGHT_22TO03_V10,
> +		RKISP1_CIF_ISP_HIST_WEIGHT_13TO43_V10,
> +		RKISP1_CIF_ISP_HIST_WEIGHT_04TO34_V10,
>   	};
>   	const u8 *weight;
>   	unsigned int i;
>   	u32 hist_prop;
>   
>   	/* avoid to override the old enable value */
> -	hist_prop = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_HIST_PROP);
> -	hist_prop &= RKISP1_CIF_ISP_HIST_PROP_MODE_MASK;
> -	hist_prop |= RKISP1_CIF_ISP_HIST_PREDIV_SET(arg->histogram_predivider);
> -	rkisp1_write(params->rkisp1, hist_prop, RKISP1_CIF_ISP_HIST_PROP);
> +	hist_prop = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_HIST_PROP_V10);
> +	hist_prop &= RKISP1_CIF_ISP_HIST_PROP_MODE_MASK_V10;
> +	hist_prop |= RKISP1_CIF_ISP_HIST_PREDIV_SET_V10(arg->histogram_predivider);
> +	rkisp1_write(params->rkisp1, hist_prop, RKISP1_CIF_ISP_HIST_PROP_V10);
>   	rkisp1_write(params->rkisp1,
>   		     arg->meas_window.h_offs,
> -		     RKISP1_CIF_ISP_HIST_H_OFFS);
> +		     RKISP1_CIF_ISP_HIST_H_OFFS_V10);
>   	rkisp1_write(params->rkisp1,
>   		     arg->meas_window.v_offs,
> -		     RKISP1_CIF_ISP_HIST_V_OFFS);
> +		     RKISP1_CIF_ISP_HIST_V_OFFS_V10);
>   
>   	block_hsize = arg->meas_window.h_size /
> -		      RKISP1_CIF_ISP_HIST_COLUMN_NUM - 1;
> -	block_vsize = arg->meas_window.v_size / RKISP1_CIF_ISP_HIST_ROW_NUM - 1;
> +		      RKISP1_CIF_ISP_HIST_COLUMN_NUM_V10 - 1;
> +	block_vsize = arg->meas_window.v_size / RKISP1_CIF_ISP_HIST_ROW_NUM_V10 - 1;
>   
> -	rkisp1_write(params->rkisp1, block_hsize, RKISP1_CIF_ISP_HIST_H_SIZE);
> -	rkisp1_write(params->rkisp1, block_vsize, RKISP1_CIF_ISP_HIST_V_SIZE);
> +	rkisp1_write(params->rkisp1, block_hsize, RKISP1_CIF_ISP_HIST_H_SIZE_V10);
> +	rkisp1_write(params->rkisp1, block_vsize, RKISP1_CIF_ISP_HIST_V_SIZE_V10);
>   
>   	weight = arg->hist_weight;
>   	for (i = 0; i < ARRAY_SIZE(hist_weight_regs); ++i, weight += 4)
>   		rkisp1_write(params->rkisp1,
> -			     RKISP1_CIF_ISP_HIST_WEIGHT_SET(weight[0],
> +			     RKISP1_CIF_ISP_HIST_WEIGHT_SET_V10(weight[0],
>   							    weight[1],
>   							    weight[2],
>   							    weight[3]),
>   				 hist_weight_regs[i]);
>   
> -	rkisp1_write(params->rkisp1, weight[0] & 0x1F, RKISP1_CIF_ISP_HIST_WEIGHT_44);
> +	rkisp1_write(params->rkisp1, weight[0] & 0x1F, RKISP1_CIF_ISP_HIST_WEIGHT_44_V10);
>   }
>   
>   static void
> -rkisp1_hst_enable(struct rkisp1_params *params,
> -		  const struct rkisp1_cif_isp_hst_config *arg, bool en)
> +rkisp1_hst_enable_v10(struct rkisp1_params *params,
> +		      const struct rkisp1_cif_isp_hst_config *arg, bool en)
>   {
>   	if (en)	{
>   		u32 hist_prop = rkisp1_read(params->rkisp1,
> -					    RKISP1_CIF_ISP_HIST_PROP);
> +					    RKISP1_CIF_ISP_HIST_PROP_V10);
>   
> -		hist_prop &= ~RKISP1_CIF_ISP_HIST_PROP_MODE_MASK;
> +		hist_prop &= ~RKISP1_CIF_ISP_HIST_PROP_MODE_MASK_V10;
>   		hist_prop |= arg->mode;
> -		rkisp1_param_set_bits(params, RKISP1_CIF_ISP_HIST_PROP,
> +		rkisp1_param_set_bits(params, RKISP1_CIF_ISP_HIST_PROP_V10,
>   				      hist_prop);
>   	} else {
> -		rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_HIST_PROP,
> -					RKISP1_CIF_ISP_HIST_PROP_MODE_MASK);
> +		rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_HIST_PROP_V10,
> +					RKISP1_CIF_ISP_HIST_PROP_MODE_MASK_V10);
>   	}
>   }
>   
> -static void rkisp1_afm_config(struct rkisp1_params *params,
> -			      const struct rkisp1_cif_isp_afc_config *arg)
> +static void rkisp1_afm_config_v10(struct rkisp1_params *params,
> +				  const struct rkisp1_cif_isp_afc_config *arg)
>   {
>   	size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
>   				  arg->num_afm_win);
> @@ -1234,7 +1234,7 @@ static void rkisp1_params_config_parameter(struct rkisp1_params *params)
>   
>   	memset(hst.hist_weight, 0x01, sizeof(hst.hist_weight));
>   	params->ops->hst_config(params, &hst);
> -	rkisp1_param_set_bits(params, RKISP1_CIF_ISP_HIST_PROP,
> +	rkisp1_param_set_bits(params, RKISP1_CIF_ISP_HIST_PROP_V10,
>   			      rkisp1_hst_params_default_config.mode);
>   
>   	/* set the  range */
> @@ -1293,16 +1293,16 @@ void rkisp1_params_disable(struct rkisp1_params *params)
>   				RKISP1_CIF_ISP_DPF_MODE_EN);
>   }
>   
> -static struct rkisp1_params_ops rkisp1_params_ops = {
> -	.lsc_matrix_config = rkisp1_lsc_matrix_config,
> -	.goc_config = rkisp1_goc_config,
> -	.awb_meas_config = rkisp1_awb_meas_config,
> -	.awb_meas_enable = rkisp1_awb_meas_enable,
> -	.awb_gain_config = rkisp1_awb_gain_config,
> -	.aec_config = rkisp1_aec_config,
> -	.hst_config = rkisp1_hst_config,
> -	.hst_enable = rkisp1_hst_enable,
> -	.afm_config = rkisp1_afm_config,
> +static struct rkisp1_params_ops rkisp1_v10_params_ops = {
> +	.lsc_matrix_config = rkisp1_lsc_matrix_config_v10,
> +	.goc_config = rkisp1_goc_config_v10,
> +	.awb_meas_config = rkisp1_awb_meas_config_v10,
> +	.awb_meas_enable = rkisp1_awb_meas_enable_v10,
> +	.awb_gain_config = rkisp1_awb_gain_config_v10,
> +	.aec_config = rkisp1_aec_config_v10,
> +	.hst_config = rkisp1_hst_config_v10,
> +	.hst_enable = rkisp1_hst_enable_v10,
> +	.afm_config = rkisp1_afm_config_v10,
>   };
>   
>   static int rkisp1_params_enum_fmt_meta_out(struct file *file, void *priv,
> @@ -1472,7 +1472,7 @@ static void rkisp1_init_params(struct rkisp1_params *params)
>   	params->vdev_fmt.fmt.meta.buffersize =
>   		sizeof(struct rkisp1_params_cfg);
>   
> -	params->ops = &rkisp1_params_ops;
> +	params->ops = &rkisp1_v10_params_ops;
>   }
>   
>   int rkisp1_params_register(struct rkisp1_device *rkisp1)
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> index fa33080f51db..c71ccd148bde 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
> @@ -212,6 +212,35 @@
>   
>   /* CCL */
>   #define RKISP1_CIF_CCL_CIF_CLK_DIS			BIT(2)
> +/* VI_ISP_CLK_CTRL */
> +#define RKISP1_CIF_CLK_CTRL_ISP_RAW			BIT(0)
> +#define RKISP1_CIF_CLK_CTRL_ISP_RGB			BIT(1)
> +#define RKISP1_CIF_CLK_CTRL_ISP_YUV			BIT(2)
> +#define RKISP1_CIF_CLK_CTRL_ISP_3A			BIT(3)
> +#define RKISP1_CIF_CLK_CTRL_MIPI_RAW			BIT(4)
> +#define RKISP1_CIF_CLK_CTRL_ISP_IE			BIT(5)
> +#define RKISP1_CIF_CLK_CTRL_RSZ_RAM			BIT(6)
> +#define RKISP1_CIF_CLK_CTRL_JPEG_RAM			BIT(7)
> +#define RKISP1_CIF_CLK_CTRL_ACLK_ISP			BIT(8)
> +#define RKISP1_CIF_CLK_CTRL_MI_IDC			BIT(9)
> +#define RKISP1_CIF_CLK_CTRL_MI_MP			BIT(10)
> +#define RKISP1_CIF_CLK_CTRL_MI_JPEG			BIT(11)
> +#define RKISP1_CIF_CLK_CTRL_MI_DP			BIT(12)
> +#define RKISP1_CIF_CLK_CTRL_MI_Y12			BIT(13)
> +#define RKISP1_CIF_CLK_CTRL_MI_SP			BIT(14)
> +#define RKISP1_CIF_CLK_CTRL_MI_RAW0			BIT(15)
> +#define RKISP1_CIF_CLK_CTRL_MI_RAW1			BIT(16)
> +#define RKISP1_CIF_CLK_CTRL_MI_READ			BIT(17)
> +#define RKISP1_CIF_CLK_CTRL_MI_RAWRD			BIT(18)
> +#define RKISP1_CIF_CLK_CTRL_CP				BIT(19)
> +#define RKISP1_CIF_CLK_CTRL_IE				BIT(20)
> +#define RKISP1_CIF_CLK_CTRL_SI				BIT(21)
> +#define RKISP1_CIF_CLK_CTRL_RSZM			BIT(22)
> +#define RKISP1_CIF_CLK_CTRL_DPMUX			BIT(23)
> +#define RKISP1_CIF_CLK_CTRL_JPEG			BIT(24)
> +#define RKISP1_CIF_CLK_CTRL_RSZS			BIT(25)
> +#define RKISP1_CIF_CLK_CTRL_MIPI			BIT(26)
> +#define RKISP1_CIF_CLK_CTRL_MARVINMI			BIT(27)

What are those new registers? I guess they don't belong to this patch.

Thanks,
Dafna

>   /* ICCL */
>   #define RKISP1_CIF_ICCL_ISP_CLK				BIT(0)
>   #define RKISP1_CIF_ICCL_CP_CLK				BIT(1)
> @@ -346,26 +375,26 @@
>   #define RKISP1_CIF_SUPER_IMP_CTRL_TRANSP_DIS		BIT(2)
>   
>   /* ISP HISTOGRAM CALCULATION : ISP_HIST_PROP */
> -#define RKISP1_CIF_ISP_HIST_PROP_MODE_DIS		(0 << 0)
> -#define RKISP1_CIF_ISP_HIST_PROP_MODE_RGB		BIT(0)
> -#define RKISP1_CIF_ISP_HIST_PROP_MODE_RED		(2 << 0)
> -#define RKISP1_CIF_ISP_HIST_PROP_MODE_GREEN		(3 << 0)
> -#define RKISP1_CIF_ISP_HIST_PROP_MODE_BLUE		(4 << 0)
> -#define RKISP1_CIF_ISP_HIST_PROP_MODE_LUM		(5 << 0)
> -#define RKISP1_CIF_ISP_HIST_PROP_MODE_MASK		0x7
> -#define RKISP1_CIF_ISP_HIST_PREDIV_SET(x)		(((x) & 0x7F) << 3)
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_SET(v0, v1, v2, v3)	\
> +#define RKISP1_CIF_ISP_HIST_PROP_MODE_DIS_V10		(0 << 0)
> +#define RKISP1_CIF_ISP_HIST_PROP_MODE_RGB_V10		BIT(0)
> +#define RKISP1_CIF_ISP_HIST_PROP_MODE_RED_V10		(2 << 0)
> +#define RKISP1_CIF_ISP_HIST_PROP_MODE_GREEN_V10		(3 << 0)
> +#define RKISP1_CIF_ISP_HIST_PROP_MODE_BLUE_V10		(4 << 0)
> +#define RKISP1_CIF_ISP_HIST_PROP_MODE_LUM_V10		(5 << 0)
> +#define RKISP1_CIF_ISP_HIST_PROP_MODE_MASK_V10		0x7
> +#define RKISP1_CIF_ISP_HIST_PREDIV_SET_V10(x)		(((x) & 0x7F) << 3)
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_SET_V10(v0, v1, v2, v3)	\
>   				     (((v0) & 0x1F) | (((v1) & 0x1F) << 8)  |\
>   				     (((v2) & 0x1F) << 16) | \
>   				     (((v3) & 0x1F) << 24))
>   
> -#define RKISP1_CIF_ISP_HIST_WINDOW_OFFSET_RESERVED	0xFFFFF000
> -#define RKISP1_CIF_ISP_HIST_WINDOW_SIZE_RESERVED	0xFFFFF800
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_RESERVED		0xE0E0E0E0
> -#define RKISP1_CIF_ISP_MAX_HIST_PREDIVIDER		0x0000007F
> -#define RKISP1_CIF_ISP_HIST_ROW_NUM			5
> -#define RKISP1_CIF_ISP_HIST_COLUMN_NUM			5
> -#define RKISP1_CIF_ISP_HIST_GET_BIN(x)			((x) & 0x000FFFFF)
> +#define RKISP1_CIF_ISP_HIST_WINDOW_OFFSET_RESERVED_V10	0xFFFFF000
> +#define RKISP1_CIF_ISP_HIST_WINDOW_SIZE_RESERVED_V10	0xFFFFF800
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_RESERVED_V10		0xE0E0E0E0
> +#define RKISP1_CIF_ISP_MAX_HIST_PREDIVIDER_V10		0x0000007F
> +#define RKISP1_CIF_ISP_HIST_ROW_NUM_V10			5
> +#define RKISP1_CIF_ISP_HIST_COLUMN_NUM_V10		5
> +#define RKISP1_CIF_ISP_HIST_GET_BIN_V10(x)		((x) & 0x000FFFFF)
>   
>   /* AUTO FOCUS MEASUREMENT:  ISP_AFM_CTRL */
>   #define RKISP1_ISP_AFM_CTRL_ENABLE			BIT(0)
> @@ -442,41 +471,41 @@
>   #define RKISP1_CIF_ISP_EXP_CTRL_MEASMODE_1		BIT(31)
>   
>   /* ISP_EXP_H_SIZE */
> -#define RKISP1_CIF_ISP_EXP_H_SIZE_SET(x)		((x) & 0x7FF)
> -#define RKISP1_CIF_ISP_EXP_HEIGHT_MASK			0x000007FF
> +#define RKISP1_CIF_ISP_EXP_H_SIZE_SET_V10(x)		((x) & 0x7FF)
> +#define RKISP1_CIF_ISP_EXP_HEIGHT_MASK_V10			0x000007FF
>   /* ISP_EXP_V_SIZE : vertical size must be a multiple of 2). */
> -#define RKISP1_CIF_ISP_EXP_V_SIZE_SET(x)		((x) & 0x7FE)
> +#define RKISP1_CIF_ISP_EXP_V_SIZE_SET_V10(x)		((x) & 0x7FE)
>   
>   /* ISP_EXP_H_OFFSET */
> -#define RKISP1_CIF_ISP_EXP_H_OFFSET_SET(x)		((x) & 0x1FFF)
> -#define RKISP1_CIF_ISP_EXP_MAX_HOFFS			2424
> +#define RKISP1_CIF_ISP_EXP_H_OFFSET_SET_V10(x)		((x) & 0x1FFF)
> +#define RKISP1_CIF_ISP_EXP_MAX_HOFFS_V10		2424
>   /* ISP_EXP_V_OFFSET */
> -#define RKISP1_CIF_ISP_EXP_V_OFFSET_SET(x)		((x) & 0x1FFF)
> -#define RKISP1_CIF_ISP_EXP_MAX_VOFFS			1806
> -
> -#define RKISP1_CIF_ISP_EXP_ROW_NUM			5
> -#define RKISP1_CIF_ISP_EXP_COLUMN_NUM			5
> -#define RKISP1_CIF_ISP_EXP_NUM_LUMA_REGS \
> -	(RKISP1_CIF_ISP_EXP_ROW_NUM * RKISP1_CIF_ISP_EXP_COLUMN_NUM)
> -#define RKISP1_CIF_ISP_EXP_BLOCK_MAX_HSIZE		516
> -#define RKISP1_CIF_ISP_EXP_BLOCK_MIN_HSIZE		35
> -#define RKISP1_CIF_ISP_EXP_BLOCK_MAX_VSIZE		390
> -#define RKISP1_CIF_ISP_EXP_BLOCK_MIN_VSIZE		28
> -#define RKISP1_CIF_ISP_EXP_MAX_HSIZE	\
> -	(RKISP1_CIF_ISP_EXP_BLOCK_MAX_HSIZE * RKISP1_CIF_ISP_EXP_COLUMN_NUM + 1)
> -#define RKISP1_CIF_ISP_EXP_MIN_HSIZE	\
> -	(RKISP1_CIF_ISP_EXP_BLOCK_MIN_HSIZE * RKISP1_CIF_ISP_EXP_COLUMN_NUM + 1)
> -#define RKISP1_CIF_ISP_EXP_MAX_VSIZE	\
> -	(RKISP1_CIF_ISP_EXP_BLOCK_MAX_VSIZE * RKISP1_CIF_ISP_EXP_ROW_NUM + 1)
> -#define RKISP1_CIF_ISP_EXP_MIN_VSIZE	\
> -	(RKISP1_CIF_ISP_EXP_BLOCK_MIN_VSIZE * RKISP1_CIF_ISP_EXP_ROW_NUM + 1)
> +#define RKISP1_CIF_ISP_EXP_V_OFFSET_SET_V10(x)		((x) & 0x1FFF)
> +#define RKISP1_CIF_ISP_EXP_MAX_VOFFS_V10		1806
> +
> +#define RKISP1_CIF_ISP_EXP_ROW_NUM_V10			5
> +#define RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10			5
> +#define RKISP1_CIF_ISP_EXP_NUM_LUMA_REGS_V10 \
> +	(RKISP1_CIF_ISP_EXP_ROW_NUM_V10 * RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10)
> +#define RKISP1_CIF_ISP_EXP_BLOCK_MAX_HSIZE_V10		516
> +#define RKISP1_CIF_ISP_EXP_BLOCK_MIN_HSIZE_V10		35
> +#define RKISP1_CIF_ISP_EXP_BLOCK_MAX_VSIZE_V10		390
> +#define RKISP1_CIF_ISP_EXP_BLOCK_MIN_VSIZE_V10		28
> +#define RKISP1_CIF_ISP_EXP_MAX_HSIZE_V10	\
> +	(RKISP1_CIF_ISP_EXP_BLOCK_MAX_HSIZE_V10 * RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10 + 1)
> +#define RKISP1_CIF_ISP_EXP_MIN_HSIZE_V10	\
> +	(RKISP1_CIF_ISP_EXP_BLOCK_MIN_HSIZE_V10 * RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10 + 1)
> +#define RKISP1_CIF_ISP_EXP_MAX_VSIZE_V10	\
> +	(RKISP1_CIF_ISP_EXP_BLOCK_MAX_VSIZE_V10 * RKISP1_CIF_ISP_EXP_ROW_NUM_V10 + 1)
> +#define RKISP1_CIF_ISP_EXP_MIN_VSIZE_V10	\
> +	(RKISP1_CIF_ISP_EXP_BLOCK_MIN_VSIZE_V10 * RKISP1_CIF_ISP_EXP_ROW_NUM_V10 + 1)
>   
>   /* LSC: ISP_LSC_CTRL */
>   #define RKISP1_CIF_ISP_LSC_CTRL_ENA			BIT(0)
>   #define RKISP1_CIF_ISP_LSC_SECT_SIZE_RESERVED		0xFC00FC00
> -#define RKISP1_CIF_ISP_LSC_GRAD_RESERVED		0xF000F000
> -#define RKISP1_CIF_ISP_LSC_SAMPLE_RESERVED		0xF000F000
> -#define RKISP1_CIF_ISP_LSC_TABLE_DATA(v0, v1)     \
> +#define RKISP1_CIF_ISP_LSC_GRAD_RESERVED_V10		0xF000F000
> +#define RKISP1_CIF_ISP_LSC_SAMPLE_RESERVED_V10		0xF000F000
> +#define RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(v0, v1)     \
>   	(((v0) & 0xFFF) | (((v1) & 0xFFF) << 12))
>   #define RKISP1_CIF_ISP_LSC_SECT_SIZE(v0, v1)      \
>   	(((v0) & 0xFFF) | (((v1) & 0xFFF) << 16))
> @@ -667,18 +696,18 @@
>   #define RKISP1_CIF_ISP_GAMMA_B_Y14		(RKISP1_CIF_ISP_BASE + 0x000000E4)
>   #define RKISP1_CIF_ISP_GAMMA_B_Y15		(RKISP1_CIF_ISP_BASE + 0x000000E8)
>   #define RKISP1_CIF_ISP_GAMMA_B_Y16		(RKISP1_CIF_ISP_BASE + 0x000000EC)
> -#define RKISP1_CIF_ISP_AWB_PROP			(RKISP1_CIF_ISP_BASE + 0x00000110)
> -#define RKISP1_CIF_ISP_AWB_WND_H_OFFS		(RKISP1_CIF_ISP_BASE + 0x00000114)
> -#define RKISP1_CIF_ISP_AWB_WND_V_OFFS		(RKISP1_CIF_ISP_BASE + 0x00000118)
> -#define RKISP1_CIF_ISP_AWB_WND_H_SIZE		(RKISP1_CIF_ISP_BASE + 0x0000011C)
> -#define RKISP1_CIF_ISP_AWB_WND_V_SIZE		(RKISP1_CIF_ISP_BASE + 0x00000120)
> -#define RKISP1_CIF_ISP_AWB_FRAMES		(RKISP1_CIF_ISP_BASE + 0x00000124)
> -#define RKISP1_CIF_ISP_AWB_REF			(RKISP1_CIF_ISP_BASE + 0x00000128)
> -#define RKISP1_CIF_ISP_AWB_THRESH		(RKISP1_CIF_ISP_BASE + 0x0000012C)
> -#define RKISP1_CIF_ISP_AWB_GAIN_G		(RKISP1_CIF_ISP_BASE + 0x00000138)
> -#define RKISP1_CIF_ISP_AWB_GAIN_RB		(RKISP1_CIF_ISP_BASE + 0x0000013C)
> -#define RKISP1_CIF_ISP_AWB_WHITE_CNT		(RKISP1_CIF_ISP_BASE + 0x00000140)
> -#define RKISP1_CIF_ISP_AWB_MEAN			(RKISP1_CIF_ISP_BASE + 0x00000144)
> +#define RKISP1_CIF_ISP_AWB_PROP_V10		(RKISP1_CIF_ISP_BASE + 0x00000110)
> +#define RKISP1_CIF_ISP_AWB_WND_H_OFFS_V10	(RKISP1_CIF_ISP_BASE + 0x00000114)
> +#define RKISP1_CIF_ISP_AWB_WND_V_OFFS_V10	(RKISP1_CIF_ISP_BASE + 0x00000118)
> +#define RKISP1_CIF_ISP_AWB_WND_H_SIZE_V10	(RKISP1_CIF_ISP_BASE + 0x0000011C)
> +#define RKISP1_CIF_ISP_AWB_WND_V_SIZE_V10	(RKISP1_CIF_ISP_BASE + 0x00000120)
> +#define RKISP1_CIF_ISP_AWB_FRAMES_V10		(RKISP1_CIF_ISP_BASE + 0x00000124)
> +#define RKISP1_CIF_ISP_AWB_REF_V10		(RKISP1_CIF_ISP_BASE + 0x00000128)
> +#define RKISP1_CIF_ISP_AWB_THRESH_V10		(RKISP1_CIF_ISP_BASE + 0x0000012C)
> +#define RKISP1_CIF_ISP_AWB_GAIN_G_V10		(RKISP1_CIF_ISP_BASE + 0x00000138)
> +#define RKISP1_CIF_ISP_AWB_GAIN_RB_V10		(RKISP1_CIF_ISP_BASE + 0x0000013C)
> +#define RKISP1_CIF_ISP_AWB_WHITE_CNT_V10	(RKISP1_CIF_ISP_BASE + 0x00000140)
> +#define RKISP1_CIF_ISP_AWB_MEAN_V10		(RKISP1_CIF_ISP_BASE + 0x00000144)
>   #define RKISP1_CIF_ISP_CC_COEFF_0		(RKISP1_CIF_ISP_BASE + 0x00000170)
>   #define RKISP1_CIF_ISP_CC_COEFF_1		(RKISP1_CIF_ISP_BASE + 0x00000174)
>   #define RKISP1_CIF_ISP_CC_COEFF_2		(RKISP1_CIF_ISP_BASE + 0x00000178)
> @@ -712,24 +741,24 @@
>   #define RKISP1_CIF_ISP_CT_COEFF_6		(RKISP1_CIF_ISP_BASE + 0x000001E8)
>   #define RKISP1_CIF_ISP_CT_COEFF_7		(RKISP1_CIF_ISP_BASE + 0x000001EC)
>   #define RKISP1_CIF_ISP_CT_COEFF_8		(RKISP1_CIF_ISP_BASE + 0x000001F0)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_MODE		(RKISP1_CIF_ISP_BASE + 0x000001F4)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_0		(RKISP1_CIF_ISP_BASE + 0x000001F8)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_1		(RKISP1_CIF_ISP_BASE + 0x000001FC)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_2		(RKISP1_CIF_ISP_BASE + 0x00000200)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_3		(RKISP1_CIF_ISP_BASE + 0x00000204)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_4		(RKISP1_CIF_ISP_BASE + 0x00000208)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_5		(RKISP1_CIF_ISP_BASE + 0x0000020C)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_6		(RKISP1_CIF_ISP_BASE + 0x00000210)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_7		(RKISP1_CIF_ISP_BASE + 0x00000214)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_8		(RKISP1_CIF_ISP_BASE + 0x00000218)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_9		(RKISP1_CIF_ISP_BASE + 0x0000021C)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_10		(RKISP1_CIF_ISP_BASE + 0x00000220)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_11		(RKISP1_CIF_ISP_BASE + 0x00000224)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_12		(RKISP1_CIF_ISP_BASE + 0x00000228)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_13		(RKISP1_CIF_ISP_BASE + 0x0000022C)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_14		(RKISP1_CIF_ISP_BASE + 0x00000230)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_15		(RKISP1_CIF_ISP_BASE + 0x00000234)
> -#define RKISP1_CIF_ISP_GAMMA_OUT_Y_16		(RKISP1_CIF_ISP_BASE + 0x00000238)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_MODE_V10	(RKISP1_CIF_ISP_BASE + 0x000001F4)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_0_V10	(RKISP1_CIF_ISP_BASE + 0x000001F8)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_1_V10	(RKISP1_CIF_ISP_BASE + 0x000001FC)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_2_V10	(RKISP1_CIF_ISP_BASE + 0x00000200)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_3_V10	(RKISP1_CIF_ISP_BASE + 0x00000204)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_4_V10	(RKISP1_CIF_ISP_BASE + 0x00000208)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_5_V10	(RKISP1_CIF_ISP_BASE + 0x0000020C)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_6_V10	(RKISP1_CIF_ISP_BASE + 0x00000210)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_7_V10	(RKISP1_CIF_ISP_BASE + 0x00000214)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_8_V10	(RKISP1_CIF_ISP_BASE + 0x00000218)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_9_V10	(RKISP1_CIF_ISP_BASE + 0x0000021C)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_10_V10	(RKISP1_CIF_ISP_BASE + 0x00000220)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_11_V10	(RKISP1_CIF_ISP_BASE + 0x00000224)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_12_V10	(RKISP1_CIF_ISP_BASE + 0x00000228)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_13_V10	(RKISP1_CIF_ISP_BASE + 0x0000022C)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_14_V10	(RKISP1_CIF_ISP_BASE + 0x00000230)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_15_V10	(RKISP1_CIF_ISP_BASE + 0x00000234)
> +#define RKISP1_CIF_ISP_GAMMA_OUT_Y_16_V10	(RKISP1_CIF_ISP_BASE + 0x00000238)
>   #define RKISP1_CIF_ISP_ERR			(RKISP1_CIF_ISP_BASE + 0x0000023C)
>   #define RKISP1_CIF_ISP_ERR_CLR			(RKISP1_CIF_ISP_BASE + 0x00000240)
>   #define RKISP1_CIF_ISP_FRAME_COUNT		(RKISP1_CIF_ISP_BASE + 0x00000244)
> @@ -1005,36 +1034,35 @@
>   #define RKISP1_CIF_ISP_IS_H_SIZE_SHD		(RKISP1_CIF_ISP_IS_BASE + 0x0000002C)
>   #define RKISP1_CIF_ISP_IS_V_SIZE_SHD		(RKISP1_CIF_ISP_IS_BASE + 0x00000030)
>   
> -#define RKISP1_CIF_ISP_HIST_BASE		0x00002400
> -
> -#define RKISP1_CIF_ISP_HIST_PROP		(RKISP1_CIF_ISP_HIST_BASE + 0x00000000)
> -#define RKISP1_CIF_ISP_HIST_H_OFFS		(RKISP1_CIF_ISP_HIST_BASE + 0x00000004)
> -#define RKISP1_CIF_ISP_HIST_V_OFFS		(RKISP1_CIF_ISP_HIST_BASE + 0x00000008)
> -#define RKISP1_CIF_ISP_HIST_H_SIZE		(RKISP1_CIF_ISP_HIST_BASE + 0x0000000C)
> -#define RKISP1_CIF_ISP_HIST_V_SIZE		(RKISP1_CIF_ISP_HIST_BASE + 0x00000010)
> -#define RKISP1_CIF_ISP_HIST_BIN_0		(RKISP1_CIF_ISP_HIST_BASE + 0x00000014)
> -#define RKISP1_CIF_ISP_HIST_BIN_1		(RKISP1_CIF_ISP_HIST_BASE + 0x00000018)
> -#define RKISP1_CIF_ISP_HIST_BIN_2		(RKISP1_CIF_ISP_HIST_BASE + 0x0000001C)
> -#define RKISP1_CIF_ISP_HIST_BIN_3		(RKISP1_CIF_ISP_HIST_BASE + 0x00000020)
> -#define RKISP1_CIF_ISP_HIST_BIN_4		(RKISP1_CIF_ISP_HIST_BASE + 0x00000024)
> -#define RKISP1_CIF_ISP_HIST_BIN_5		(RKISP1_CIF_ISP_HIST_BASE + 0x00000028)
> -#define RKISP1_CIF_ISP_HIST_BIN_6		(RKISP1_CIF_ISP_HIST_BASE + 0x0000002C)
> -#define RKISP1_CIF_ISP_HIST_BIN_7		(RKISP1_CIF_ISP_HIST_BASE + 0x00000030)
> -#define RKISP1_CIF_ISP_HIST_BIN_8		(RKISP1_CIF_ISP_HIST_BASE + 0x00000034)
> -#define RKISP1_CIF_ISP_HIST_BIN_9		(RKISP1_CIF_ISP_HIST_BASE + 0x00000038)
> -#define RKISP1_CIF_ISP_HIST_BIN_10		(RKISP1_CIF_ISP_HIST_BASE + 0x0000003C)
> -#define RKISP1_CIF_ISP_HIST_BIN_11		(RKISP1_CIF_ISP_HIST_BASE + 0x00000040)
> -#define RKISP1_CIF_ISP_HIST_BIN_12		(RKISP1_CIF_ISP_HIST_BASE + 0x00000044)
> -#define RKISP1_CIF_ISP_HIST_BIN_13		(RKISP1_CIF_ISP_HIST_BASE + 0x00000048)
> -#define RKISP1_CIF_ISP_HIST_BIN_14		(RKISP1_CIF_ISP_HIST_BASE + 0x0000004C)
> -#define RKISP1_CIF_ISP_HIST_BIN_15		(RKISP1_CIF_ISP_HIST_BASE + 0x00000050)
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_00TO30	(RKISP1_CIF_ISP_HIST_BASE + 0x00000054)
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_40TO21	(RKISP1_CIF_ISP_HIST_BASE + 0x00000058)
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_31TO12	(RKISP1_CIF_ISP_HIST_BASE + 0x0000005C)
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_22TO03	(RKISP1_CIF_ISP_HIST_BASE + 0x00000060)
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_13TO43	(RKISP1_CIF_ISP_HIST_BASE + 0x00000064)
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_04TO34	(RKISP1_CIF_ISP_HIST_BASE + 0x00000068)
> -#define RKISP1_CIF_ISP_HIST_WEIGHT_44		(RKISP1_CIF_ISP_HIST_BASE + 0x0000006C)
> +#define RKISP1_CIF_ISP_HIST_BASE_V10		0x00002400
> +#define RKISP1_CIF_ISP_HIST_PROP_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000000)
> +#define RKISP1_CIF_ISP_HIST_H_OFFS_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000004)
> +#define RKISP1_CIF_ISP_HIST_V_OFFS_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000008)
> +#define RKISP1_CIF_ISP_HIST_H_SIZE_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000000C)
> +#define RKISP1_CIF_ISP_HIST_V_SIZE_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000010)
> +#define RKISP1_CIF_ISP_HIST_BIN_0_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000014)
> +#define RKISP1_CIF_ISP_HIST_BIN_1_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000018)
> +#define RKISP1_CIF_ISP_HIST_BIN_2_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000001C)
> +#define RKISP1_CIF_ISP_HIST_BIN_3_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000020)
> +#define RKISP1_CIF_ISP_HIST_BIN_4_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000024)
> +#define RKISP1_CIF_ISP_HIST_BIN_5_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000028)
> +#define RKISP1_CIF_ISP_HIST_BIN_6_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000002C)
> +#define RKISP1_CIF_ISP_HIST_BIN_7_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000030)
> +#define RKISP1_CIF_ISP_HIST_BIN_8_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000034)
> +#define RKISP1_CIF_ISP_HIST_BIN_9_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000038)
> +#define RKISP1_CIF_ISP_HIST_BIN_10_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000003C)
> +#define RKISP1_CIF_ISP_HIST_BIN_11_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000040)
> +#define RKISP1_CIF_ISP_HIST_BIN_12_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000044)
> +#define RKISP1_CIF_ISP_HIST_BIN_13_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000048)
> +#define RKISP1_CIF_ISP_HIST_BIN_14_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000004C)
> +#define RKISP1_CIF_ISP_HIST_BIN_15_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000050)
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_00TO30_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000054)
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_40TO21_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000058)
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_31TO12_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000005C)
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_22TO03_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000060)
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_13TO43_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000064)
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_04TO34_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000068)
> +#define RKISP1_CIF_ISP_HIST_WEIGHT_44_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000006C)
>   
>   #define RKISP1_CIF_ISP_FILT_BASE		0x00002500
>   #define RKISP1_CIF_ISP_FILT_MODE		(RKISP1_CIF_ISP_FILT_BASE + 0x00000000)
> @@ -1060,35 +1088,35 @@
>   
>   #define RKISP1_CIF_ISP_EXP_BASE			0x00002600
>   #define RKISP1_CIF_ISP_EXP_CTRL			(RKISP1_CIF_ISP_EXP_BASE + 0x00000000)
> -#define RKISP1_CIF_ISP_EXP_H_OFFSET		(RKISP1_CIF_ISP_EXP_BASE + 0x00000004)
> -#define RKISP1_CIF_ISP_EXP_V_OFFSET		(RKISP1_CIF_ISP_EXP_BASE + 0x00000008)
> -#define RKISP1_CIF_ISP_EXP_H_SIZE		(RKISP1_CIF_ISP_EXP_BASE + 0x0000000C)
> -#define RKISP1_CIF_ISP_EXP_V_SIZE		(RKISP1_CIF_ISP_EXP_BASE + 0x00000010)
> -#define RKISP1_CIF_ISP_EXP_MEAN_00		(RKISP1_CIF_ISP_EXP_BASE + 0x00000014)
> -#define RKISP1_CIF_ISP_EXP_MEAN_10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000018)
> -#define RKISP1_CIF_ISP_EXP_MEAN_20		(RKISP1_CIF_ISP_EXP_BASE + 0x0000001c)
> -#define RKISP1_CIF_ISP_EXP_MEAN_30		(RKISP1_CIF_ISP_EXP_BASE + 0x00000020)
> -#define RKISP1_CIF_ISP_EXP_MEAN_40		(RKISP1_CIF_ISP_EXP_BASE + 0x00000024)
> -#define RKISP1_CIF_ISP_EXP_MEAN_01		(RKISP1_CIF_ISP_EXP_BASE + 0x00000028)
> -#define RKISP1_CIF_ISP_EXP_MEAN_11		(RKISP1_CIF_ISP_EXP_BASE + 0x0000002c)
> -#define RKISP1_CIF_ISP_EXP_MEAN_21		(RKISP1_CIF_ISP_EXP_BASE + 0x00000030)
> -#define RKISP1_CIF_ISP_EXP_MEAN_31		(RKISP1_CIF_ISP_EXP_BASE + 0x00000034)
> -#define RKISP1_CIF_ISP_EXP_MEAN_41		(RKISP1_CIF_ISP_EXP_BASE + 0x00000038)
> -#define RKISP1_CIF_ISP_EXP_MEAN_02		(RKISP1_CIF_ISP_EXP_BASE + 0x0000003c)
> -#define RKISP1_CIF_ISP_EXP_MEAN_12		(RKISP1_CIF_ISP_EXP_BASE + 0x00000040)
> -#define RKISP1_CIF_ISP_EXP_MEAN_22		(RKISP1_CIF_ISP_EXP_BASE + 0x00000044)
> -#define RKISP1_CIF_ISP_EXP_MEAN_32		(RKISP1_CIF_ISP_EXP_BASE + 0x00000048)
> -#define RKISP1_CIF_ISP_EXP_MEAN_42		(RKISP1_CIF_ISP_EXP_BASE + 0x0000004c)
> -#define RKISP1_CIF_ISP_EXP_MEAN_03		(RKISP1_CIF_ISP_EXP_BASE + 0x00000050)
> -#define RKISP1_CIF_ISP_EXP_MEAN_13		(RKISP1_CIF_ISP_EXP_BASE + 0x00000054)
> -#define RKISP1_CIF_ISP_EXP_MEAN_23		(RKISP1_CIF_ISP_EXP_BASE + 0x00000058)
> -#define RKISP1_CIF_ISP_EXP_MEAN_33		(RKISP1_CIF_ISP_EXP_BASE + 0x0000005c)
> -#define RKISP1_CIF_ISP_EXP_MEAN_43		(RKISP1_CIF_ISP_EXP_BASE + 0x00000060)
> -#define RKISP1_CIF_ISP_EXP_MEAN_04		(RKISP1_CIF_ISP_EXP_BASE + 0x00000064)
> -#define RKISP1_CIF_ISP_EXP_MEAN_14		(RKISP1_CIF_ISP_EXP_BASE + 0x00000068)
> -#define RKISP1_CIF_ISP_EXP_MEAN_24		(RKISP1_CIF_ISP_EXP_BASE + 0x0000006c)
> -#define RKISP1_CIF_ISP_EXP_MEAN_34		(RKISP1_CIF_ISP_EXP_BASE + 0x00000070)
> -#define RKISP1_CIF_ISP_EXP_MEAN_44		(RKISP1_CIF_ISP_EXP_BASE + 0x00000074)
> +#define RKISP1_CIF_ISP_EXP_H_OFFSET_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000004)
> +#define RKISP1_CIF_ISP_EXP_V_OFFSET_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000008)
> +#define RKISP1_CIF_ISP_EXP_H_SIZE_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000000C)
> +#define RKISP1_CIF_ISP_EXP_V_SIZE_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000010)
> +#define RKISP1_CIF_ISP_EXP_MEAN_00_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000014)
> +#define RKISP1_CIF_ISP_EXP_MEAN_10_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000018)
> +#define RKISP1_CIF_ISP_EXP_MEAN_20_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000001c)
> +#define RKISP1_CIF_ISP_EXP_MEAN_30_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000020)
> +#define RKISP1_CIF_ISP_EXP_MEAN_40_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000024)
> +#define RKISP1_CIF_ISP_EXP_MEAN_01_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000028)
> +#define RKISP1_CIF_ISP_EXP_MEAN_11_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000002c)
> +#define RKISP1_CIF_ISP_EXP_MEAN_21_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000030)
> +#define RKISP1_CIF_ISP_EXP_MEAN_31_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000034)
> +#define RKISP1_CIF_ISP_EXP_MEAN_41_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000038)
> +#define RKISP1_CIF_ISP_EXP_MEAN_02_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000003c)
> +#define RKISP1_CIF_ISP_EXP_MEAN_12_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000040)
> +#define RKISP1_CIF_ISP_EXP_MEAN_22_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000044)
> +#define RKISP1_CIF_ISP_EXP_MEAN_32_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000048)
> +#define RKISP1_CIF_ISP_EXP_MEAN_42_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000004c)
> +#define RKISP1_CIF_ISP_EXP_MEAN_03_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000050)
> +#define RKISP1_CIF_ISP_EXP_MEAN_13_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000054)
> +#define RKISP1_CIF_ISP_EXP_MEAN_23_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000058)
> +#define RKISP1_CIF_ISP_EXP_MEAN_33_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000005c)
> +#define RKISP1_CIF_ISP_EXP_MEAN_43_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000060)
> +#define RKISP1_CIF_ISP_EXP_MEAN_04_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000064)
> +#define RKISP1_CIF_ISP_EXP_MEAN_14_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000068)
> +#define RKISP1_CIF_ISP_EXP_MEAN_24_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000006c)
> +#define RKISP1_CIF_ISP_EXP_MEAN_34_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000070)
> +#define RKISP1_CIF_ISP_EXP_MEAN_44_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000074)
>   
>   #define RKISP1_CIF_ISP_BLS_BASE			0x00002700
>   #define RKISP1_CIF_ISP_BLS_CTRL			(RKISP1_CIF_ISP_BLS_BASE + 0x00000000)
> @@ -1260,4 +1288,7 @@
>   #define RKISP1_CIF_ISP_VSM_DELTA_H		(RKISP1_CIF_ISP_VSM_BASE + 0x0000001C)
>   #define RKISP1_CIF_ISP_VSM_DELTA_V		(RKISP1_CIF_ISP_VSM_BASE + 0x00000020)
>   
> +#define RKISP1_CIF_ISP_CSI0_BASE		0x00007000
> +#define RKISP1_CIF_ISP_CSI0_CTRL0		(RKISP1_CIF_ISP_CSI0_BASE + 0x00000000)
> +
>   #endif /* _RKISP1_REGS_H */
> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
> index f68a5e78e54a..3f286c55ad60 100644
> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
> @@ -175,18 +175,18 @@ rkisp1_stats_init_vb2_queue(struct vb2_queue *q, struct rkisp1_stats *stats)
>   	return vb2_queue_init(q);
>   }
>   
> -static void rkisp1_stats_get_awb_meas(struct rkisp1_stats *stats,
> -				      struct rkisp1_stat_buffer *pbuf)
> +static void rkisp1_stats_get_awb_meas_v10(struct rkisp1_stats *stats,
> +					  struct rkisp1_stat_buffer *pbuf)
>   {
>   	/* Protect against concurrent access from ISR? */
>   	struct rkisp1_device *rkisp1 = stats->rkisp1;
>   	u32 reg_val;
>   
>   	pbuf->meas_type |= RKISP1_CIF_ISP_STAT_AWB;
> -	reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AWB_WHITE_CNT);
> +	reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AWB_WHITE_CNT_V10);
>   	pbuf->params.awb.awb_mean[0].cnt =
>   				RKISP1_CIF_ISP_AWB_GET_PIXEL_CNT(reg_val);
> -	reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AWB_MEAN);
> +	reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AWB_MEAN_V10);
>   
>   	pbuf->params.awb.awb_mean[0].mean_cr_or_r =
>   				RKISP1_CIF_ISP_AWB_GET_MEAN_CR_R(reg_val);
> @@ -196,8 +196,8 @@ static void rkisp1_stats_get_awb_meas(struct rkisp1_stats *stats,
>   				RKISP1_CIF_ISP_AWB_GET_MEAN_Y_G(reg_val);
>   }
>   
> -static void rkisp1_stats_get_aec_meas(struct rkisp1_stats *stats,
> -				      struct rkisp1_stat_buffer *pbuf)
> +static void rkisp1_stats_get_aec_meas_v10(struct rkisp1_stats *stats,
> +					  struct rkisp1_stat_buffer *pbuf)
>   {
>   	struct rkisp1_device *rkisp1 = stats->rkisp1;
>   	unsigned int i;
> @@ -206,7 +206,7 @@ static void rkisp1_stats_get_aec_meas(struct rkisp1_stats *stats,
>   	for (i = 0; i < RKISP1_CIF_ISP_AE_MEAN_MAX_V10; i++)
>   		pbuf->params.ae.exp_mean[i] =
>   			(u8)rkisp1_read(rkisp1,
> -					RKISP1_CIF_ISP_EXP_MEAN_00 + i * 4);
> +					RKISP1_CIF_ISP_EXP_MEAN_00_V10 + i * 4);
>   }
>   
>   static void rkisp1_stats_get_afc_meas(struct rkisp1_stats *stats,
> @@ -226,17 +226,17 @@ static void rkisp1_stats_get_afc_meas(struct rkisp1_stats *stats,
>   	af->window[2].lum = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AFM_LUM_C);
>   }
>   
> -static void rkisp1_stats_get_hst_meas(struct rkisp1_stats *stats,
> -				      struct rkisp1_stat_buffer *pbuf)
> +static void rkisp1_stats_get_hst_meas_v10(struct rkisp1_stats *stats,
> +					  struct rkisp1_stat_buffer *pbuf)
>   {
>   	struct rkisp1_device *rkisp1 = stats->rkisp1;
>   	unsigned int i;
>   
>   	pbuf->meas_type |= RKISP1_CIF_ISP_STAT_HIST;
>   	for (i = 0; i < RKISP1_CIF_ISP_HIST_BIN_N_MAX_V10; i++) {
> -		u32 reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_HIST_BIN_0 + i * 4);
> +		u32 reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_HIST_BIN_0_V10 + i * 4);
>   
> -		pbuf->params.hist.hist_bins[i] = RKISP1_CIF_ISP_HIST_GET_BIN(reg_val);
> +		pbuf->params.hist.hist_bins[i] = RKISP1_CIF_ISP_HIST_GET_BIN_V10(reg_val);
>   	}
>   }
>   
> @@ -287,10 +287,10 @@ static void rkisp1_stats_get_bls_meas(struct rkisp1_stats *stats,
>   	}
>   }
>   
> -static struct rkisp1_stats_ops rkisp1_stats_ops = {
> -	.get_awb_meas = rkisp1_stats_get_awb_meas,
> -	.get_aec_meas = rkisp1_stats_get_aec_meas,
> -	.get_hst_meas = rkisp1_stats_get_hst_meas,
> +static struct rkisp1_stats_ops rkisp1_v10_stats_ops = {
> +	.get_awb_meas = rkisp1_stats_get_awb_meas_v10,
> +	.get_aec_meas = rkisp1_stats_get_aec_meas_v10,
> +	.get_hst_meas = rkisp1_stats_get_hst_meas_v10,
>   };
>   
>   static void
> @@ -361,7 +361,7 @@ static void rkisp1_init_stats(struct rkisp1_stats *stats)
>   	stats->vdev_fmt.fmt.meta.buffersize =
>   		sizeof(struct rkisp1_stat_buffer);
>   
> -	stats->ops = &rkisp1_stats_ops;
> +	stats->ops = &rkisp1_v10_stats_ops;
>   }
>   
>   int rkisp1_stats_register(struct rkisp1_device *rkisp1)
>
kernel test robot June 16, 2021, 7:36 p.m. UTC | #2 
Hi Heiko,

I love your patch! Yet something to improve:

[auto build test ERROR on rockchip/for-next]
[also build test ERROR on v5.13-rc6 next-20210616]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Heiko-Stuebner/rkisp1-support-for-px30/20210616-201601
base:   https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: ia64-randconfig-s032-20210615 (attached as .config)
compiler: ia64-linux-gcc (GCC) 9.3.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.3-341-g8af24329-dirty
        # https://github.com/0day-ci/linux/commit/346e0127683f58d32c265369f5ec0aa7a984aeb5
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Heiko-Stuebner/rkisp1-support-for-px30/20210616-201601
        git checkout 346e0127683f58d32c265369f5ec0aa7a984aeb5
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' W=1 ARCH=ia64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/media/platform/rockchip/rkisp1/rkisp1-params.c: In function 'rkisp1_isp_isr_meas_config':
   drivers/media/platform/rockchip/rkisp1/rkisp1-params.c:1111:2: warning: this 'if' clause does not guard... [-Wmisleading-indentation]
    1111 |  if (module_en_update & RKISP1_CIF_ISP_MODULE_HST)
         |  ^~
   drivers/media/platform/rockchip/rkisp1/rkisp1-params.c:1115:3: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the 'if'
    1115 |   rkisp1_hst_enable(params,
         |   ^~~~~~~~~~~~~~~~~
>> drivers/media/platform/rockchip/rkisp1/rkisp1-params.c:1115:3: error: implicit declaration of function 'rkisp1_hst_enable'; did you mean 'rkisp1_ie_enable'? [-Werror=implicit-function-declaration]
    1115 |   rkisp1_hst_enable(params,
         |   ^~~~~~~~~~~~~~~~~
         |   rkisp1_ie_enable
   cc1: some warnings being treated as errors


vim +1115 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c

bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1071  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1072  static void rkisp1_isp_isr_meas_config(struct rkisp1_params *params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1073  				       struct  rkisp1_params_cfg *new_params)
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1074  {
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1075  	unsigned int module_en_update, module_cfg_update, module_ens;
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1076  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1077  	module_en_update = new_params->module_en_update;
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1078  	module_cfg_update = new_params->module_cfg_update;
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1079  	module_ens = new_params->module_ens;
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1080  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1081  	/* update awb config */
db1733ce23bd37 drivers/staging/media/rkisp1/rkisp1-params.c           Dafna Hirschfeld 2020-10-19  1082  	if (module_cfg_update & RKISP1_CIF_ISP_MODULE_AWB)
3495922d4cf7d3 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c Heiko Stuebner   2021-06-15  1083  		params->ops->awb_meas_config(params, &new_params->meas.awb_meas_config);
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1084  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1085  	if (module_en_update & RKISP1_CIF_ISP_MODULE_AWB)
3495922d4cf7d3 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c Heiko Stuebner   2021-06-15  1086  		params->ops->awb_meas_enable(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1087  					     &new_params->meas.awb_meas_config,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1088  					     !!(module_ens & RKISP1_CIF_ISP_MODULE_AWB));
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1089  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1090  	/* update afc config */
db1733ce23bd37 drivers/staging/media/rkisp1/rkisp1-params.c           Dafna Hirschfeld 2020-10-19  1091  	if (module_cfg_update & RKISP1_CIF_ISP_MODULE_AFC)
3495922d4cf7d3 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c Heiko Stuebner   2021-06-15  1092  		params->ops->afm_config(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1093  					&new_params->meas.afc_config);
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1094  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1095  	if (module_en_update & RKISP1_CIF_ISP_MODULE_AFC) {
cdda99d70d73d0 drivers/staging/media/rkisp1/rkisp1-params.c           Dafna Hirschfeld 2020-10-19  1096  		if (module_ens & RKISP1_CIF_ISP_MODULE_AFC)
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1097  			rkisp1_param_set_bits(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1098  					      RKISP1_CIF_ISP_AFM_CTRL,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1099  					      RKISP1_CIF_ISP_AFM_ENA);
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1100  		else
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1101  			rkisp1_param_clear_bits(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1102  						RKISP1_CIF_ISP_AFM_CTRL,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1103  						RKISP1_CIF_ISP_AFM_ENA);
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1104  	}
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1105  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1106  	/* update hst config */
db1733ce23bd37 drivers/staging/media/rkisp1/rkisp1-params.c           Dafna Hirschfeld 2020-10-19  1107  	if (module_cfg_update & RKISP1_CIF_ISP_MODULE_HST)
3495922d4cf7d3 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c Heiko Stuebner   2021-06-15  1108  		params->ops->hst_config(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1109  					&new_params->meas.hst_config);
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1110  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1111  	if (module_en_update & RKISP1_CIF_ISP_MODULE_HST)
3495922d4cf7d3 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c Heiko Stuebner   2021-06-15  1112  		params->ops->hst_enable(params,
3495922d4cf7d3 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c Heiko Stuebner   2021-06-15  1113  					&new_params->meas.hst_config,
3495922d4cf7d3 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c Heiko Stuebner   2021-06-15  1114  					!!(module_ens & RKISP1_CIF_ISP_MODULE_HST));
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08 @1115  		rkisp1_hst_enable(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1116  				  &new_params->meas.hst_config,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1117  				  !!(module_ens & RKISP1_CIF_ISP_MODULE_HST));
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1118  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1119  	/* update aec config */
db1733ce23bd37 drivers/staging/media/rkisp1/rkisp1-params.c           Dafna Hirschfeld 2020-10-19  1120  	if (module_cfg_update & RKISP1_CIF_ISP_MODULE_AEC)
3495922d4cf7d3 drivers/media/platform/rockchip/rkisp1/rkisp1-params.c Heiko Stuebner   2021-06-15  1121  		params->ops->aec_config(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1122  					&new_params->meas.aec_config);
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1123  
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1124  	if (module_en_update & RKISP1_CIF_ISP_MODULE_AEC) {
cdda99d70d73d0 drivers/staging/media/rkisp1/rkisp1-params.c           Dafna Hirschfeld 2020-10-19  1125  		if (module_ens & RKISP1_CIF_ISP_MODULE_AEC)
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1126  			rkisp1_param_set_bits(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1127  					      RKISP1_CIF_ISP_EXP_CTRL,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1128  					      RKISP1_CIF_ISP_EXP_ENA);
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1129  		else
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1130  			rkisp1_param_clear_bits(params,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1131  						RKISP1_CIF_ISP_EXP_CTRL,
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1132  						RKISP1_CIF_ISP_EXP_ENA);
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1133  	}
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1134  }
bae1155cf5798c drivers/staging/media/rkisp1/rkisp1-params.c           Jacob Chen       2020-01-08  1135  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff mbox series

Patch

diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
index a971892ba81d..427c7cc400b2 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
@@ -185,8 +185,8 @@  static void rkisp1_bls_config(struct rkisp1_params *params,
 
 /* ISP LS correction interface function */
 static void
-rkisp1_lsc_matrix_config(struct rkisp1_params *params,
-			 const struct rkisp1_cif_isp_lsc_config *pconfig)
+rkisp1_lsc_matrix_config_v10(struct rkisp1_params *params,
+			     const struct rkisp1_cif_isp_lsc_config *pconfig)
 {
 	unsigned int isp_lsc_status, sram_addr, isp_lsc_table_sel, i, j, data;
 
@@ -212,39 +212,39 @@  rkisp1_lsc_matrix_config(struct rkisp1_params *params,
 		 * DWORDs (2nd value of last DWORD unused)
 		 */
 		for (j = 0; j < RKISP1_CIF_ISP_LSC_SAMPLES_MAX - 1; j += 2) {
-			data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->r_data_tbl[i][j],
-							     pconfig->r_data_tbl[i][j + 1]);
+			data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->r_data_tbl[i][j],
+								 pconfig->r_data_tbl[i][j + 1]);
 			rkisp1_write(params->rkisp1, data,
 				     RKISP1_CIF_ISP_LSC_R_TABLE_DATA);
 
-			data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->gr_data_tbl[i][j],
-							     pconfig->gr_data_tbl[i][j + 1]);
+			data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->gr_data_tbl[i][j],
+								 pconfig->gr_data_tbl[i][j + 1]);
 			rkisp1_write(params->rkisp1, data,
 				     RKISP1_CIF_ISP_LSC_GR_TABLE_DATA);
 
-			data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->gb_data_tbl[i][j],
-							     pconfig->gb_data_tbl[i][j + 1]);
+			data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->gb_data_tbl[i][j],
+								 pconfig->gb_data_tbl[i][j + 1]);
 			rkisp1_write(params->rkisp1, data,
 				     RKISP1_CIF_ISP_LSC_GB_TABLE_DATA);
 
-			data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->b_data_tbl[i][j],
-							     pconfig->b_data_tbl[i][j + 1]);
+			data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->b_data_tbl[i][j],
+								 pconfig->b_data_tbl[i][j + 1]);
 			rkisp1_write(params->rkisp1, data,
 				     RKISP1_CIF_ISP_LSC_B_TABLE_DATA);
 		}
-		data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->r_data_tbl[i][j], 0);
+		data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->r_data_tbl[i][j], 0);
 		rkisp1_write(params->rkisp1, data,
 			     RKISP1_CIF_ISP_LSC_R_TABLE_DATA);
 
-		data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->gr_data_tbl[i][j], 0);
+		data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->gr_data_tbl[i][j], 0);
 		rkisp1_write(params->rkisp1, data,
 			     RKISP1_CIF_ISP_LSC_GR_TABLE_DATA);
 
-		data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->gb_data_tbl[i][j], 0);
+		data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->gb_data_tbl[i][j], 0);
 		rkisp1_write(params->rkisp1, data,
 			     RKISP1_CIF_ISP_LSC_GB_TABLE_DATA);
 
-		data = RKISP1_CIF_ISP_LSC_TABLE_DATA(pconfig->b_data_tbl[i][j], 0);
+		data = RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(pconfig->b_data_tbl[i][j], 0);
 		rkisp1_write(params->rkisp1, data,
 			     RKISP1_CIF_ISP_LSC_B_TABLE_DATA);
 	}
@@ -382,18 +382,18 @@  static void rkisp1_sdg_config(struct rkisp1_params *params,
 }
 
 /* ISP GAMMA correction interface function */
-static void rkisp1_goc_config(struct rkisp1_params *params,
-			      const struct rkisp1_cif_isp_goc_config *arg)
+static void rkisp1_goc_config_v10(struct rkisp1_params *params,
+				  const struct rkisp1_cif_isp_goc_config *arg)
 {
 	unsigned int i;
 
 	rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_CTRL,
 				RKISP1_CIF_ISP_CTRL_ISP_GAMMA_OUT_ENA);
-	rkisp1_write(params->rkisp1, arg->mode, RKISP1_CIF_ISP_GAMMA_OUT_MODE);
+	rkisp1_write(params->rkisp1, arg->mode, RKISP1_CIF_ISP_GAMMA_OUT_MODE_V10);
 
 	for (i = 0; i < RKISP1_CIF_ISP_GAMMA_OUT_MAX_SAMPLES_V10; i++)
 		rkisp1_write(params->rkisp1, arg->gamma_y[i],
-			     RKISP1_CIF_ISP_GAMMA_OUT_Y_0 + i * 4);
+			     RKISP1_CIF_ISP_GAMMA_OUT_Y_0_V10 + i * 4);
 }
 
 /* ISP Cross Talk */
@@ -433,8 +433,8 @@  static void rkisp1_ctk_enable(struct rkisp1_params *params, bool en)
 }
 
 /* ISP White Balance Mode */
-static void rkisp1_awb_meas_config(struct rkisp1_params *params,
-				   const struct rkisp1_cif_isp_awb_meas_config *arg)
+static void rkisp1_awb_meas_config_v10(struct rkisp1_params *params,
+				       const struct rkisp1_cif_isp_awb_meas_config *arg)
 {
 	u32 reg_val = 0;
 	/* based on the mode,configure the awb module */
@@ -442,43 +442,43 @@  static void rkisp1_awb_meas_config(struct rkisp1_params *params,
 		/* Reference Cb and Cr */
 		rkisp1_write(params->rkisp1,
 			     RKISP1_CIF_ISP_AWB_REF_CR_SET(arg->awb_ref_cr) |
-			     arg->awb_ref_cb, RKISP1_CIF_ISP_AWB_REF);
+			     arg->awb_ref_cb, RKISP1_CIF_ISP_AWB_REF_V10);
 		/* Yc Threshold */
 		rkisp1_write(params->rkisp1,
 			     RKISP1_CIF_ISP_AWB_MAX_Y_SET(arg->max_y) |
 			     RKISP1_CIF_ISP_AWB_MIN_Y_SET(arg->min_y) |
 			     RKISP1_CIF_ISP_AWB_MAX_CS_SET(arg->max_csum) |
-			     arg->min_c, RKISP1_CIF_ISP_AWB_THRESH);
+			     arg->min_c, RKISP1_CIF_ISP_AWB_THRESH_V10);
 	}
 
-	reg_val = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_AWB_PROP);
+	reg_val = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_AWB_PROP_V10);
 	if (arg->enable_ymax_cmp)
 		reg_val |= RKISP1_CIF_ISP_AWB_YMAX_CMP_EN;
 	else
 		reg_val &= ~RKISP1_CIF_ISP_AWB_YMAX_CMP_EN;
-	rkisp1_write(params->rkisp1, reg_val, RKISP1_CIF_ISP_AWB_PROP);
+	rkisp1_write(params->rkisp1, reg_val, RKISP1_CIF_ISP_AWB_PROP_V10);
 
 	/* window offset */
 	rkisp1_write(params->rkisp1,
-		     arg->awb_wnd.v_offs, RKISP1_CIF_ISP_AWB_WND_V_OFFS);
+		     arg->awb_wnd.v_offs, RKISP1_CIF_ISP_AWB_WND_V_OFFS_V10);
 	rkisp1_write(params->rkisp1,
-		     arg->awb_wnd.h_offs, RKISP1_CIF_ISP_AWB_WND_H_OFFS);
+		     arg->awb_wnd.h_offs, RKISP1_CIF_ISP_AWB_WND_H_OFFS_V10);
 	/* AWB window size */
 	rkisp1_write(params->rkisp1,
-		     arg->awb_wnd.v_size, RKISP1_CIF_ISP_AWB_WND_V_SIZE);
+		     arg->awb_wnd.v_size, RKISP1_CIF_ISP_AWB_WND_V_SIZE_V10);
 	rkisp1_write(params->rkisp1,
-		     arg->awb_wnd.h_size, RKISP1_CIF_ISP_AWB_WND_H_SIZE);
+		     arg->awb_wnd.h_size, RKISP1_CIF_ISP_AWB_WND_H_SIZE_V10);
 	/* Number of frames */
 	rkisp1_write(params->rkisp1,
-		     arg->frames, RKISP1_CIF_ISP_AWB_FRAMES);
+		     arg->frames, RKISP1_CIF_ISP_AWB_FRAMES_V10);
 }
 
 static void
-rkisp1_awb_meas_enable(struct rkisp1_params *params,
-		       const struct rkisp1_cif_isp_awb_meas_config *arg,
-		       bool en)
+rkisp1_awb_meas_enable_v10(struct rkisp1_params *params,
+			   const struct rkisp1_cif_isp_awb_meas_config *arg,
+			   bool en)
 {
-	u32 reg_val = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_AWB_PROP);
+	u32 reg_val = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_AWB_PROP_V10);
 
 	/* switch off */
 	reg_val &= RKISP1_CIF_ISP_AWB_MODE_MASK_NONE;
@@ -489,34 +489,34 @@  rkisp1_awb_meas_enable(struct rkisp1_params *params,
 		else
 			reg_val |= RKISP1_CIF_ISP_AWB_MODE_YCBCR_EN;
 
-		rkisp1_write(params->rkisp1, reg_val, RKISP1_CIF_ISP_AWB_PROP);
+		rkisp1_write(params->rkisp1, reg_val, RKISP1_CIF_ISP_AWB_PROP_V10);
 
 		/* Measurements require AWB block be active. */
 		rkisp1_param_set_bits(params, RKISP1_CIF_ISP_CTRL,
 				      RKISP1_CIF_ISP_CTRL_ISP_AWB_ENA);
 	} else {
 		rkisp1_write(params->rkisp1,
-			     reg_val, RKISP1_CIF_ISP_AWB_PROP);
+			     reg_val, RKISP1_CIF_ISP_AWB_PROP_V10);
 		rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_CTRL,
 					RKISP1_CIF_ISP_CTRL_ISP_AWB_ENA);
 	}
 }
 
 static void
-rkisp1_awb_gain_config(struct rkisp1_params *params,
-		       const struct rkisp1_cif_isp_awb_gain_config *arg)
+rkisp1_awb_gain_config_v10(struct rkisp1_params *params,
+			   const struct rkisp1_cif_isp_awb_gain_config *arg)
 {
 	rkisp1_write(params->rkisp1,
 		     RKISP1_CIF_ISP_AWB_GAIN_R_SET(arg->gain_green_r) |
-		     arg->gain_green_b, RKISP1_CIF_ISP_AWB_GAIN_G);
+		     arg->gain_green_b, RKISP1_CIF_ISP_AWB_GAIN_G_V10);
 
 	rkisp1_write(params->rkisp1,
 		     RKISP1_CIF_ISP_AWB_GAIN_R_SET(arg->gain_red) |
-		     arg->gain_blue, RKISP1_CIF_ISP_AWB_GAIN_RB);
+		     arg->gain_blue, RKISP1_CIF_ISP_AWB_GAIN_RB_V10);
 }
 
-static void rkisp1_aec_config(struct rkisp1_params *params,
-			      const struct rkisp1_cif_isp_aec_config *arg)
+static void rkisp1_aec_config_v10(struct rkisp1_params *params,
+				  const struct rkisp1_cif_isp_aec_config *arg)
 {
 	unsigned int block_hsize, block_vsize;
 	u32 exp_ctrl;
@@ -531,21 +531,21 @@  static void rkisp1_aec_config(struct rkisp1_params *params,
 	rkisp1_write(params->rkisp1, exp_ctrl, RKISP1_CIF_ISP_EXP_CTRL);
 
 	rkisp1_write(params->rkisp1,
-		     arg->meas_window.h_offs, RKISP1_CIF_ISP_EXP_H_OFFSET);
+		     arg->meas_window.h_offs, RKISP1_CIF_ISP_EXP_H_OFFSET_V10);
 	rkisp1_write(params->rkisp1,
-		     arg->meas_window.v_offs, RKISP1_CIF_ISP_EXP_V_OFFSET);
+		     arg->meas_window.v_offs, RKISP1_CIF_ISP_EXP_V_OFFSET_V10);
 
 	block_hsize = arg->meas_window.h_size /
-		      RKISP1_CIF_ISP_EXP_COLUMN_NUM - 1;
+		      RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10 - 1;
 	block_vsize = arg->meas_window.v_size /
-		      RKISP1_CIF_ISP_EXP_ROW_NUM - 1;
+		      RKISP1_CIF_ISP_EXP_ROW_NUM_V10 - 1;
 
 	rkisp1_write(params->rkisp1,
-		     RKISP1_CIF_ISP_EXP_H_SIZE_SET(block_hsize),
-		     RKISP1_CIF_ISP_EXP_H_SIZE);
+		     RKISP1_CIF_ISP_EXP_H_SIZE_SET_V10(block_hsize),
+		     RKISP1_CIF_ISP_EXP_H_SIZE_V10);
 	rkisp1_write(params->rkisp1,
-		     RKISP1_CIF_ISP_EXP_V_SIZE_SET(block_vsize),
-		     RKISP1_CIF_ISP_EXP_V_SIZE);
+		     RKISP1_CIF_ISP_EXP_V_SIZE_SET_V10(block_vsize),
+		     RKISP1_CIF_ISP_EXP_V_SIZE_V10);
 }
 
 static void rkisp1_cproc_config(struct rkisp1_params *params,
@@ -578,73 +578,73 @@  static void rkisp1_cproc_config(struct rkisp1_params *params,
 	}
 }
 
-static void rkisp1_hst_config(struct rkisp1_params *params,
-			      const struct rkisp1_cif_isp_hst_config *arg)
+static void rkisp1_hst_config_v10(struct rkisp1_params *params,
+				  const struct rkisp1_cif_isp_hst_config *arg)
 {
 	unsigned int block_hsize, block_vsize;
 	static const u32 hist_weight_regs[] = {
-		RKISP1_CIF_ISP_HIST_WEIGHT_00TO30,
-		RKISP1_CIF_ISP_HIST_WEIGHT_40TO21,
-		RKISP1_CIF_ISP_HIST_WEIGHT_31TO12,
-		RKISP1_CIF_ISP_HIST_WEIGHT_22TO03,
-		RKISP1_CIF_ISP_HIST_WEIGHT_13TO43,
-		RKISP1_CIF_ISP_HIST_WEIGHT_04TO34,
+		RKISP1_CIF_ISP_HIST_WEIGHT_00TO30_V10,
+		RKISP1_CIF_ISP_HIST_WEIGHT_40TO21_V10,
+		RKISP1_CIF_ISP_HIST_WEIGHT_31TO12_V10,
+		RKISP1_CIF_ISP_HIST_WEIGHT_22TO03_V10,
+		RKISP1_CIF_ISP_HIST_WEIGHT_13TO43_V10,
+		RKISP1_CIF_ISP_HIST_WEIGHT_04TO34_V10,
 	};
 	const u8 *weight;
 	unsigned int i;
 	u32 hist_prop;
 
 	/* avoid to override the old enable value */
-	hist_prop = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_HIST_PROP);
-	hist_prop &= RKISP1_CIF_ISP_HIST_PROP_MODE_MASK;
-	hist_prop |= RKISP1_CIF_ISP_HIST_PREDIV_SET(arg->histogram_predivider);
-	rkisp1_write(params->rkisp1, hist_prop, RKISP1_CIF_ISP_HIST_PROP);
+	hist_prop = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_HIST_PROP_V10);
+	hist_prop &= RKISP1_CIF_ISP_HIST_PROP_MODE_MASK_V10;
+	hist_prop |= RKISP1_CIF_ISP_HIST_PREDIV_SET_V10(arg->histogram_predivider);
+	rkisp1_write(params->rkisp1, hist_prop, RKISP1_CIF_ISP_HIST_PROP_V10);
 	rkisp1_write(params->rkisp1,
 		     arg->meas_window.h_offs,
-		     RKISP1_CIF_ISP_HIST_H_OFFS);
+		     RKISP1_CIF_ISP_HIST_H_OFFS_V10);
 	rkisp1_write(params->rkisp1,
 		     arg->meas_window.v_offs,
-		     RKISP1_CIF_ISP_HIST_V_OFFS);
+		     RKISP1_CIF_ISP_HIST_V_OFFS_V10);
 
 	block_hsize = arg->meas_window.h_size /
-		      RKISP1_CIF_ISP_HIST_COLUMN_NUM - 1;
-	block_vsize = arg->meas_window.v_size / RKISP1_CIF_ISP_HIST_ROW_NUM - 1;
+		      RKISP1_CIF_ISP_HIST_COLUMN_NUM_V10 - 1;
+	block_vsize = arg->meas_window.v_size / RKISP1_CIF_ISP_HIST_ROW_NUM_V10 - 1;
 
-	rkisp1_write(params->rkisp1, block_hsize, RKISP1_CIF_ISP_HIST_H_SIZE);
-	rkisp1_write(params->rkisp1, block_vsize, RKISP1_CIF_ISP_HIST_V_SIZE);
+	rkisp1_write(params->rkisp1, block_hsize, RKISP1_CIF_ISP_HIST_H_SIZE_V10);
+	rkisp1_write(params->rkisp1, block_vsize, RKISP1_CIF_ISP_HIST_V_SIZE_V10);
 
 	weight = arg->hist_weight;
 	for (i = 0; i < ARRAY_SIZE(hist_weight_regs); ++i, weight += 4)
 		rkisp1_write(params->rkisp1,
-			     RKISP1_CIF_ISP_HIST_WEIGHT_SET(weight[0],
+			     RKISP1_CIF_ISP_HIST_WEIGHT_SET_V10(weight[0],
 							    weight[1],
 							    weight[2],
 							    weight[3]),
 				 hist_weight_regs[i]);
 
-	rkisp1_write(params->rkisp1, weight[0] & 0x1F, RKISP1_CIF_ISP_HIST_WEIGHT_44);
+	rkisp1_write(params->rkisp1, weight[0] & 0x1F, RKISP1_CIF_ISP_HIST_WEIGHT_44_V10);
 }
 
 static void
-rkisp1_hst_enable(struct rkisp1_params *params,
-		  const struct rkisp1_cif_isp_hst_config *arg, bool en)
+rkisp1_hst_enable_v10(struct rkisp1_params *params,
+		      const struct rkisp1_cif_isp_hst_config *arg, bool en)
 {
 	if (en)	{
 		u32 hist_prop = rkisp1_read(params->rkisp1,
-					    RKISP1_CIF_ISP_HIST_PROP);
+					    RKISP1_CIF_ISP_HIST_PROP_V10);
 
-		hist_prop &= ~RKISP1_CIF_ISP_HIST_PROP_MODE_MASK;
+		hist_prop &= ~RKISP1_CIF_ISP_HIST_PROP_MODE_MASK_V10;
 		hist_prop |= arg->mode;
-		rkisp1_param_set_bits(params, RKISP1_CIF_ISP_HIST_PROP,
+		rkisp1_param_set_bits(params, RKISP1_CIF_ISP_HIST_PROP_V10,
 				      hist_prop);
 	} else {
-		rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_HIST_PROP,
-					RKISP1_CIF_ISP_HIST_PROP_MODE_MASK);
+		rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_HIST_PROP_V10,
+					RKISP1_CIF_ISP_HIST_PROP_MODE_MASK_V10);
 	}
 }
 
-static void rkisp1_afm_config(struct rkisp1_params *params,
-			      const struct rkisp1_cif_isp_afc_config *arg)
+static void rkisp1_afm_config_v10(struct rkisp1_params *params,
+				  const struct rkisp1_cif_isp_afc_config *arg)
 {
 	size_t num_of_win = min_t(size_t, ARRAY_SIZE(arg->afm_win),
 				  arg->num_afm_win);
@@ -1234,7 +1234,7 @@  static void rkisp1_params_config_parameter(struct rkisp1_params *params)
 
 	memset(hst.hist_weight, 0x01, sizeof(hst.hist_weight));
 	params->ops->hst_config(params, &hst);
-	rkisp1_param_set_bits(params, RKISP1_CIF_ISP_HIST_PROP,
+	rkisp1_param_set_bits(params, RKISP1_CIF_ISP_HIST_PROP_V10,
 			      rkisp1_hst_params_default_config.mode);
 
 	/* set the  range */
@@ -1293,16 +1293,16 @@  void rkisp1_params_disable(struct rkisp1_params *params)
 				RKISP1_CIF_ISP_DPF_MODE_EN);
 }
 
-static struct rkisp1_params_ops rkisp1_params_ops = {
-	.lsc_matrix_config = rkisp1_lsc_matrix_config,
-	.goc_config = rkisp1_goc_config,
-	.awb_meas_config = rkisp1_awb_meas_config,
-	.awb_meas_enable = rkisp1_awb_meas_enable,
-	.awb_gain_config = rkisp1_awb_gain_config,
-	.aec_config = rkisp1_aec_config,
-	.hst_config = rkisp1_hst_config,
-	.hst_enable = rkisp1_hst_enable,
-	.afm_config = rkisp1_afm_config,
+static struct rkisp1_params_ops rkisp1_v10_params_ops = {
+	.lsc_matrix_config = rkisp1_lsc_matrix_config_v10,
+	.goc_config = rkisp1_goc_config_v10,
+	.awb_meas_config = rkisp1_awb_meas_config_v10,
+	.awb_meas_enable = rkisp1_awb_meas_enable_v10,
+	.awb_gain_config = rkisp1_awb_gain_config_v10,
+	.aec_config = rkisp1_aec_config_v10,
+	.hst_config = rkisp1_hst_config_v10,
+	.hst_enable = rkisp1_hst_enable_v10,
+	.afm_config = rkisp1_afm_config_v10,
 };
 
 static int rkisp1_params_enum_fmt_meta_out(struct file *file, void *priv,
@@ -1472,7 +1472,7 @@  static void rkisp1_init_params(struct rkisp1_params *params)
 	params->vdev_fmt.fmt.meta.buffersize =
 		sizeof(struct rkisp1_params_cfg);
 
-	params->ops = &rkisp1_params_ops;
+	params->ops = &rkisp1_v10_params_ops;
 }
 
 int rkisp1_params_register(struct rkisp1_device *rkisp1)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
index fa33080f51db..c71ccd148bde 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
@@ -212,6 +212,35 @@ 
 
 /* CCL */
 #define RKISP1_CIF_CCL_CIF_CLK_DIS			BIT(2)
+/* VI_ISP_CLK_CTRL */
+#define RKISP1_CIF_CLK_CTRL_ISP_RAW			BIT(0)
+#define RKISP1_CIF_CLK_CTRL_ISP_RGB			BIT(1)
+#define RKISP1_CIF_CLK_CTRL_ISP_YUV			BIT(2)
+#define RKISP1_CIF_CLK_CTRL_ISP_3A			BIT(3)
+#define RKISP1_CIF_CLK_CTRL_MIPI_RAW			BIT(4)
+#define RKISP1_CIF_CLK_CTRL_ISP_IE			BIT(5)
+#define RKISP1_CIF_CLK_CTRL_RSZ_RAM			BIT(6)
+#define RKISP1_CIF_CLK_CTRL_JPEG_RAM			BIT(7)
+#define RKISP1_CIF_CLK_CTRL_ACLK_ISP			BIT(8)
+#define RKISP1_CIF_CLK_CTRL_MI_IDC			BIT(9)
+#define RKISP1_CIF_CLK_CTRL_MI_MP			BIT(10)
+#define RKISP1_CIF_CLK_CTRL_MI_JPEG			BIT(11)
+#define RKISP1_CIF_CLK_CTRL_MI_DP			BIT(12)
+#define RKISP1_CIF_CLK_CTRL_MI_Y12			BIT(13)
+#define RKISP1_CIF_CLK_CTRL_MI_SP			BIT(14)
+#define RKISP1_CIF_CLK_CTRL_MI_RAW0			BIT(15)
+#define RKISP1_CIF_CLK_CTRL_MI_RAW1			BIT(16)
+#define RKISP1_CIF_CLK_CTRL_MI_READ			BIT(17)
+#define RKISP1_CIF_CLK_CTRL_MI_RAWRD			BIT(18)
+#define RKISP1_CIF_CLK_CTRL_CP				BIT(19)
+#define RKISP1_CIF_CLK_CTRL_IE				BIT(20)
+#define RKISP1_CIF_CLK_CTRL_SI				BIT(21)
+#define RKISP1_CIF_CLK_CTRL_RSZM			BIT(22)
+#define RKISP1_CIF_CLK_CTRL_DPMUX			BIT(23)
+#define RKISP1_CIF_CLK_CTRL_JPEG			BIT(24)
+#define RKISP1_CIF_CLK_CTRL_RSZS			BIT(25)
+#define RKISP1_CIF_CLK_CTRL_MIPI			BIT(26)
+#define RKISP1_CIF_CLK_CTRL_MARVINMI			BIT(27)
 /* ICCL */
 #define RKISP1_CIF_ICCL_ISP_CLK				BIT(0)
 #define RKISP1_CIF_ICCL_CP_CLK				BIT(1)
@@ -346,26 +375,26 @@ 
 #define RKISP1_CIF_SUPER_IMP_CTRL_TRANSP_DIS		BIT(2)
 
 /* ISP HISTOGRAM CALCULATION : ISP_HIST_PROP */
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_DIS		(0 << 0)
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_RGB		BIT(0)
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_RED		(2 << 0)
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_GREEN		(3 << 0)
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_BLUE		(4 << 0)
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_LUM		(5 << 0)
-#define RKISP1_CIF_ISP_HIST_PROP_MODE_MASK		0x7
-#define RKISP1_CIF_ISP_HIST_PREDIV_SET(x)		(((x) & 0x7F) << 3)
-#define RKISP1_CIF_ISP_HIST_WEIGHT_SET(v0, v1, v2, v3)	\
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_DIS_V10		(0 << 0)
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_RGB_V10		BIT(0)
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_RED_V10		(2 << 0)
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_GREEN_V10		(3 << 0)
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_BLUE_V10		(4 << 0)
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_LUM_V10		(5 << 0)
+#define RKISP1_CIF_ISP_HIST_PROP_MODE_MASK_V10		0x7
+#define RKISP1_CIF_ISP_HIST_PREDIV_SET_V10(x)		(((x) & 0x7F) << 3)
+#define RKISP1_CIF_ISP_HIST_WEIGHT_SET_V10(v0, v1, v2, v3)	\
 				     (((v0) & 0x1F) | (((v1) & 0x1F) << 8)  |\
 				     (((v2) & 0x1F) << 16) | \
 				     (((v3) & 0x1F) << 24))
 
-#define RKISP1_CIF_ISP_HIST_WINDOW_OFFSET_RESERVED	0xFFFFF000
-#define RKISP1_CIF_ISP_HIST_WINDOW_SIZE_RESERVED	0xFFFFF800
-#define RKISP1_CIF_ISP_HIST_WEIGHT_RESERVED		0xE0E0E0E0
-#define RKISP1_CIF_ISP_MAX_HIST_PREDIVIDER		0x0000007F
-#define RKISP1_CIF_ISP_HIST_ROW_NUM			5
-#define RKISP1_CIF_ISP_HIST_COLUMN_NUM			5
-#define RKISP1_CIF_ISP_HIST_GET_BIN(x)			((x) & 0x000FFFFF)
+#define RKISP1_CIF_ISP_HIST_WINDOW_OFFSET_RESERVED_V10	0xFFFFF000
+#define RKISP1_CIF_ISP_HIST_WINDOW_SIZE_RESERVED_V10	0xFFFFF800
+#define RKISP1_CIF_ISP_HIST_WEIGHT_RESERVED_V10		0xE0E0E0E0
+#define RKISP1_CIF_ISP_MAX_HIST_PREDIVIDER_V10		0x0000007F
+#define RKISP1_CIF_ISP_HIST_ROW_NUM_V10			5
+#define RKISP1_CIF_ISP_HIST_COLUMN_NUM_V10		5
+#define RKISP1_CIF_ISP_HIST_GET_BIN_V10(x)		((x) & 0x000FFFFF)
 
 /* AUTO FOCUS MEASUREMENT:  ISP_AFM_CTRL */
 #define RKISP1_ISP_AFM_CTRL_ENABLE			BIT(0)
@@ -442,41 +471,41 @@ 
 #define RKISP1_CIF_ISP_EXP_CTRL_MEASMODE_1		BIT(31)
 
 /* ISP_EXP_H_SIZE */
-#define RKISP1_CIF_ISP_EXP_H_SIZE_SET(x)		((x) & 0x7FF)
-#define RKISP1_CIF_ISP_EXP_HEIGHT_MASK			0x000007FF
+#define RKISP1_CIF_ISP_EXP_H_SIZE_SET_V10(x)		((x) & 0x7FF)
+#define RKISP1_CIF_ISP_EXP_HEIGHT_MASK_V10			0x000007FF
 /* ISP_EXP_V_SIZE : vertical size must be a multiple of 2). */
-#define RKISP1_CIF_ISP_EXP_V_SIZE_SET(x)		((x) & 0x7FE)
+#define RKISP1_CIF_ISP_EXP_V_SIZE_SET_V10(x)		((x) & 0x7FE)
 
 /* ISP_EXP_H_OFFSET */
-#define RKISP1_CIF_ISP_EXP_H_OFFSET_SET(x)		((x) & 0x1FFF)
-#define RKISP1_CIF_ISP_EXP_MAX_HOFFS			2424
+#define RKISP1_CIF_ISP_EXP_H_OFFSET_SET_V10(x)		((x) & 0x1FFF)
+#define RKISP1_CIF_ISP_EXP_MAX_HOFFS_V10		2424
 /* ISP_EXP_V_OFFSET */
-#define RKISP1_CIF_ISP_EXP_V_OFFSET_SET(x)		((x) & 0x1FFF)
-#define RKISP1_CIF_ISP_EXP_MAX_VOFFS			1806
-
-#define RKISP1_CIF_ISP_EXP_ROW_NUM			5
-#define RKISP1_CIF_ISP_EXP_COLUMN_NUM			5
-#define RKISP1_CIF_ISP_EXP_NUM_LUMA_REGS \
-	(RKISP1_CIF_ISP_EXP_ROW_NUM * RKISP1_CIF_ISP_EXP_COLUMN_NUM)
-#define RKISP1_CIF_ISP_EXP_BLOCK_MAX_HSIZE		516
-#define RKISP1_CIF_ISP_EXP_BLOCK_MIN_HSIZE		35
-#define RKISP1_CIF_ISP_EXP_BLOCK_MAX_VSIZE		390
-#define RKISP1_CIF_ISP_EXP_BLOCK_MIN_VSIZE		28
-#define RKISP1_CIF_ISP_EXP_MAX_HSIZE	\
-	(RKISP1_CIF_ISP_EXP_BLOCK_MAX_HSIZE * RKISP1_CIF_ISP_EXP_COLUMN_NUM + 1)
-#define RKISP1_CIF_ISP_EXP_MIN_HSIZE	\
-	(RKISP1_CIF_ISP_EXP_BLOCK_MIN_HSIZE * RKISP1_CIF_ISP_EXP_COLUMN_NUM + 1)
-#define RKISP1_CIF_ISP_EXP_MAX_VSIZE	\
-	(RKISP1_CIF_ISP_EXP_BLOCK_MAX_VSIZE * RKISP1_CIF_ISP_EXP_ROW_NUM + 1)
-#define RKISP1_CIF_ISP_EXP_MIN_VSIZE	\
-	(RKISP1_CIF_ISP_EXP_BLOCK_MIN_VSIZE * RKISP1_CIF_ISP_EXP_ROW_NUM + 1)
+#define RKISP1_CIF_ISP_EXP_V_OFFSET_SET_V10(x)		((x) & 0x1FFF)
+#define RKISP1_CIF_ISP_EXP_MAX_VOFFS_V10		1806
+
+#define RKISP1_CIF_ISP_EXP_ROW_NUM_V10			5
+#define RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10			5
+#define RKISP1_CIF_ISP_EXP_NUM_LUMA_REGS_V10 \
+	(RKISP1_CIF_ISP_EXP_ROW_NUM_V10 * RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10)
+#define RKISP1_CIF_ISP_EXP_BLOCK_MAX_HSIZE_V10		516
+#define RKISP1_CIF_ISP_EXP_BLOCK_MIN_HSIZE_V10		35
+#define RKISP1_CIF_ISP_EXP_BLOCK_MAX_VSIZE_V10		390
+#define RKISP1_CIF_ISP_EXP_BLOCK_MIN_VSIZE_V10		28
+#define RKISP1_CIF_ISP_EXP_MAX_HSIZE_V10	\
+	(RKISP1_CIF_ISP_EXP_BLOCK_MAX_HSIZE_V10 * RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10 + 1)
+#define RKISP1_CIF_ISP_EXP_MIN_HSIZE_V10	\
+	(RKISP1_CIF_ISP_EXP_BLOCK_MIN_HSIZE_V10 * RKISP1_CIF_ISP_EXP_COLUMN_NUM_V10 + 1)
+#define RKISP1_CIF_ISP_EXP_MAX_VSIZE_V10	\
+	(RKISP1_CIF_ISP_EXP_BLOCK_MAX_VSIZE_V10 * RKISP1_CIF_ISP_EXP_ROW_NUM_V10 + 1)
+#define RKISP1_CIF_ISP_EXP_MIN_VSIZE_V10	\
+	(RKISP1_CIF_ISP_EXP_BLOCK_MIN_VSIZE_V10 * RKISP1_CIF_ISP_EXP_ROW_NUM_V10 + 1)
 
 /* LSC: ISP_LSC_CTRL */
 #define RKISP1_CIF_ISP_LSC_CTRL_ENA			BIT(0)
 #define RKISP1_CIF_ISP_LSC_SECT_SIZE_RESERVED		0xFC00FC00
-#define RKISP1_CIF_ISP_LSC_GRAD_RESERVED		0xF000F000
-#define RKISP1_CIF_ISP_LSC_SAMPLE_RESERVED		0xF000F000
-#define RKISP1_CIF_ISP_LSC_TABLE_DATA(v0, v1)     \
+#define RKISP1_CIF_ISP_LSC_GRAD_RESERVED_V10		0xF000F000
+#define RKISP1_CIF_ISP_LSC_SAMPLE_RESERVED_V10		0xF000F000
+#define RKISP1_CIF_ISP_LSC_TABLE_DATA_V10(v0, v1)     \
 	(((v0) & 0xFFF) | (((v1) & 0xFFF) << 12))
 #define RKISP1_CIF_ISP_LSC_SECT_SIZE(v0, v1)      \
 	(((v0) & 0xFFF) | (((v1) & 0xFFF) << 16))
@@ -667,18 +696,18 @@ 
 #define RKISP1_CIF_ISP_GAMMA_B_Y14		(RKISP1_CIF_ISP_BASE + 0x000000E4)
 #define RKISP1_CIF_ISP_GAMMA_B_Y15		(RKISP1_CIF_ISP_BASE + 0x000000E8)
 #define RKISP1_CIF_ISP_GAMMA_B_Y16		(RKISP1_CIF_ISP_BASE + 0x000000EC)
-#define RKISP1_CIF_ISP_AWB_PROP			(RKISP1_CIF_ISP_BASE + 0x00000110)
-#define RKISP1_CIF_ISP_AWB_WND_H_OFFS		(RKISP1_CIF_ISP_BASE + 0x00000114)
-#define RKISP1_CIF_ISP_AWB_WND_V_OFFS		(RKISP1_CIF_ISP_BASE + 0x00000118)
-#define RKISP1_CIF_ISP_AWB_WND_H_SIZE		(RKISP1_CIF_ISP_BASE + 0x0000011C)
-#define RKISP1_CIF_ISP_AWB_WND_V_SIZE		(RKISP1_CIF_ISP_BASE + 0x00000120)
-#define RKISP1_CIF_ISP_AWB_FRAMES		(RKISP1_CIF_ISP_BASE + 0x00000124)
-#define RKISP1_CIF_ISP_AWB_REF			(RKISP1_CIF_ISP_BASE + 0x00000128)
-#define RKISP1_CIF_ISP_AWB_THRESH		(RKISP1_CIF_ISP_BASE + 0x0000012C)
-#define RKISP1_CIF_ISP_AWB_GAIN_G		(RKISP1_CIF_ISP_BASE + 0x00000138)
-#define RKISP1_CIF_ISP_AWB_GAIN_RB		(RKISP1_CIF_ISP_BASE + 0x0000013C)
-#define RKISP1_CIF_ISP_AWB_WHITE_CNT		(RKISP1_CIF_ISP_BASE + 0x00000140)
-#define RKISP1_CIF_ISP_AWB_MEAN			(RKISP1_CIF_ISP_BASE + 0x00000144)
+#define RKISP1_CIF_ISP_AWB_PROP_V10		(RKISP1_CIF_ISP_BASE + 0x00000110)
+#define RKISP1_CIF_ISP_AWB_WND_H_OFFS_V10	(RKISP1_CIF_ISP_BASE + 0x00000114)
+#define RKISP1_CIF_ISP_AWB_WND_V_OFFS_V10	(RKISP1_CIF_ISP_BASE + 0x00000118)
+#define RKISP1_CIF_ISP_AWB_WND_H_SIZE_V10	(RKISP1_CIF_ISP_BASE + 0x0000011C)
+#define RKISP1_CIF_ISP_AWB_WND_V_SIZE_V10	(RKISP1_CIF_ISP_BASE + 0x00000120)
+#define RKISP1_CIF_ISP_AWB_FRAMES_V10		(RKISP1_CIF_ISP_BASE + 0x00000124)
+#define RKISP1_CIF_ISP_AWB_REF_V10		(RKISP1_CIF_ISP_BASE + 0x00000128)
+#define RKISP1_CIF_ISP_AWB_THRESH_V10		(RKISP1_CIF_ISP_BASE + 0x0000012C)
+#define RKISP1_CIF_ISP_AWB_GAIN_G_V10		(RKISP1_CIF_ISP_BASE + 0x00000138)
+#define RKISP1_CIF_ISP_AWB_GAIN_RB_V10		(RKISP1_CIF_ISP_BASE + 0x0000013C)
+#define RKISP1_CIF_ISP_AWB_WHITE_CNT_V10	(RKISP1_CIF_ISP_BASE + 0x00000140)
+#define RKISP1_CIF_ISP_AWB_MEAN_V10		(RKISP1_CIF_ISP_BASE + 0x00000144)
 #define RKISP1_CIF_ISP_CC_COEFF_0		(RKISP1_CIF_ISP_BASE + 0x00000170)
 #define RKISP1_CIF_ISP_CC_COEFF_1		(RKISP1_CIF_ISP_BASE + 0x00000174)
 #define RKISP1_CIF_ISP_CC_COEFF_2		(RKISP1_CIF_ISP_BASE + 0x00000178)
@@ -712,24 +741,24 @@ 
 #define RKISP1_CIF_ISP_CT_COEFF_6		(RKISP1_CIF_ISP_BASE + 0x000001E8)
 #define RKISP1_CIF_ISP_CT_COEFF_7		(RKISP1_CIF_ISP_BASE + 0x000001EC)
 #define RKISP1_CIF_ISP_CT_COEFF_8		(RKISP1_CIF_ISP_BASE + 0x000001F0)
-#define RKISP1_CIF_ISP_GAMMA_OUT_MODE		(RKISP1_CIF_ISP_BASE + 0x000001F4)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_0		(RKISP1_CIF_ISP_BASE + 0x000001F8)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_1		(RKISP1_CIF_ISP_BASE + 0x000001FC)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_2		(RKISP1_CIF_ISP_BASE + 0x00000200)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_3		(RKISP1_CIF_ISP_BASE + 0x00000204)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_4		(RKISP1_CIF_ISP_BASE + 0x00000208)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_5		(RKISP1_CIF_ISP_BASE + 0x0000020C)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_6		(RKISP1_CIF_ISP_BASE + 0x00000210)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_7		(RKISP1_CIF_ISP_BASE + 0x00000214)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_8		(RKISP1_CIF_ISP_BASE + 0x00000218)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_9		(RKISP1_CIF_ISP_BASE + 0x0000021C)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_10		(RKISP1_CIF_ISP_BASE + 0x00000220)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_11		(RKISP1_CIF_ISP_BASE + 0x00000224)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_12		(RKISP1_CIF_ISP_BASE + 0x00000228)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_13		(RKISP1_CIF_ISP_BASE + 0x0000022C)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_14		(RKISP1_CIF_ISP_BASE + 0x00000230)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_15		(RKISP1_CIF_ISP_BASE + 0x00000234)
-#define RKISP1_CIF_ISP_GAMMA_OUT_Y_16		(RKISP1_CIF_ISP_BASE + 0x00000238)
+#define RKISP1_CIF_ISP_GAMMA_OUT_MODE_V10	(RKISP1_CIF_ISP_BASE + 0x000001F4)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_0_V10	(RKISP1_CIF_ISP_BASE + 0x000001F8)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_1_V10	(RKISP1_CIF_ISP_BASE + 0x000001FC)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_2_V10	(RKISP1_CIF_ISP_BASE + 0x00000200)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_3_V10	(RKISP1_CIF_ISP_BASE + 0x00000204)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_4_V10	(RKISP1_CIF_ISP_BASE + 0x00000208)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_5_V10	(RKISP1_CIF_ISP_BASE + 0x0000020C)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_6_V10	(RKISP1_CIF_ISP_BASE + 0x00000210)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_7_V10	(RKISP1_CIF_ISP_BASE + 0x00000214)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_8_V10	(RKISP1_CIF_ISP_BASE + 0x00000218)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_9_V10	(RKISP1_CIF_ISP_BASE + 0x0000021C)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_10_V10	(RKISP1_CIF_ISP_BASE + 0x00000220)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_11_V10	(RKISP1_CIF_ISP_BASE + 0x00000224)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_12_V10	(RKISP1_CIF_ISP_BASE + 0x00000228)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_13_V10	(RKISP1_CIF_ISP_BASE + 0x0000022C)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_14_V10	(RKISP1_CIF_ISP_BASE + 0x00000230)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_15_V10	(RKISP1_CIF_ISP_BASE + 0x00000234)
+#define RKISP1_CIF_ISP_GAMMA_OUT_Y_16_V10	(RKISP1_CIF_ISP_BASE + 0x00000238)
 #define RKISP1_CIF_ISP_ERR			(RKISP1_CIF_ISP_BASE + 0x0000023C)
 #define RKISP1_CIF_ISP_ERR_CLR			(RKISP1_CIF_ISP_BASE + 0x00000240)
 #define RKISP1_CIF_ISP_FRAME_COUNT		(RKISP1_CIF_ISP_BASE + 0x00000244)
@@ -1005,36 +1034,35 @@ 
 #define RKISP1_CIF_ISP_IS_H_SIZE_SHD		(RKISP1_CIF_ISP_IS_BASE + 0x0000002C)
 #define RKISP1_CIF_ISP_IS_V_SIZE_SHD		(RKISP1_CIF_ISP_IS_BASE + 0x00000030)
 
-#define RKISP1_CIF_ISP_HIST_BASE		0x00002400
-
-#define RKISP1_CIF_ISP_HIST_PROP		(RKISP1_CIF_ISP_HIST_BASE + 0x00000000)
-#define RKISP1_CIF_ISP_HIST_H_OFFS		(RKISP1_CIF_ISP_HIST_BASE + 0x00000004)
-#define RKISP1_CIF_ISP_HIST_V_OFFS		(RKISP1_CIF_ISP_HIST_BASE + 0x00000008)
-#define RKISP1_CIF_ISP_HIST_H_SIZE		(RKISP1_CIF_ISP_HIST_BASE + 0x0000000C)
-#define RKISP1_CIF_ISP_HIST_V_SIZE		(RKISP1_CIF_ISP_HIST_BASE + 0x00000010)
-#define RKISP1_CIF_ISP_HIST_BIN_0		(RKISP1_CIF_ISP_HIST_BASE + 0x00000014)
-#define RKISP1_CIF_ISP_HIST_BIN_1		(RKISP1_CIF_ISP_HIST_BASE + 0x00000018)
-#define RKISP1_CIF_ISP_HIST_BIN_2		(RKISP1_CIF_ISP_HIST_BASE + 0x0000001C)
-#define RKISP1_CIF_ISP_HIST_BIN_3		(RKISP1_CIF_ISP_HIST_BASE + 0x00000020)
-#define RKISP1_CIF_ISP_HIST_BIN_4		(RKISP1_CIF_ISP_HIST_BASE + 0x00000024)
-#define RKISP1_CIF_ISP_HIST_BIN_5		(RKISP1_CIF_ISP_HIST_BASE + 0x00000028)
-#define RKISP1_CIF_ISP_HIST_BIN_6		(RKISP1_CIF_ISP_HIST_BASE + 0x0000002C)
-#define RKISP1_CIF_ISP_HIST_BIN_7		(RKISP1_CIF_ISP_HIST_BASE + 0x00000030)
-#define RKISP1_CIF_ISP_HIST_BIN_8		(RKISP1_CIF_ISP_HIST_BASE + 0x00000034)
-#define RKISP1_CIF_ISP_HIST_BIN_9		(RKISP1_CIF_ISP_HIST_BASE + 0x00000038)
-#define RKISP1_CIF_ISP_HIST_BIN_10		(RKISP1_CIF_ISP_HIST_BASE + 0x0000003C)
-#define RKISP1_CIF_ISP_HIST_BIN_11		(RKISP1_CIF_ISP_HIST_BASE + 0x00000040)
-#define RKISP1_CIF_ISP_HIST_BIN_12		(RKISP1_CIF_ISP_HIST_BASE + 0x00000044)
-#define RKISP1_CIF_ISP_HIST_BIN_13		(RKISP1_CIF_ISP_HIST_BASE + 0x00000048)
-#define RKISP1_CIF_ISP_HIST_BIN_14		(RKISP1_CIF_ISP_HIST_BASE + 0x0000004C)
-#define RKISP1_CIF_ISP_HIST_BIN_15		(RKISP1_CIF_ISP_HIST_BASE + 0x00000050)
-#define RKISP1_CIF_ISP_HIST_WEIGHT_00TO30	(RKISP1_CIF_ISP_HIST_BASE + 0x00000054)
-#define RKISP1_CIF_ISP_HIST_WEIGHT_40TO21	(RKISP1_CIF_ISP_HIST_BASE + 0x00000058)
-#define RKISP1_CIF_ISP_HIST_WEIGHT_31TO12	(RKISP1_CIF_ISP_HIST_BASE + 0x0000005C)
-#define RKISP1_CIF_ISP_HIST_WEIGHT_22TO03	(RKISP1_CIF_ISP_HIST_BASE + 0x00000060)
-#define RKISP1_CIF_ISP_HIST_WEIGHT_13TO43	(RKISP1_CIF_ISP_HIST_BASE + 0x00000064)
-#define RKISP1_CIF_ISP_HIST_WEIGHT_04TO34	(RKISP1_CIF_ISP_HIST_BASE + 0x00000068)
-#define RKISP1_CIF_ISP_HIST_WEIGHT_44		(RKISP1_CIF_ISP_HIST_BASE + 0x0000006C)
+#define RKISP1_CIF_ISP_HIST_BASE_V10		0x00002400
+#define RKISP1_CIF_ISP_HIST_PROP_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000000)
+#define RKISP1_CIF_ISP_HIST_H_OFFS_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000004)
+#define RKISP1_CIF_ISP_HIST_V_OFFS_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000008)
+#define RKISP1_CIF_ISP_HIST_H_SIZE_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000000C)
+#define RKISP1_CIF_ISP_HIST_V_SIZE_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000010)
+#define RKISP1_CIF_ISP_HIST_BIN_0_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000014)
+#define RKISP1_CIF_ISP_HIST_BIN_1_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000018)
+#define RKISP1_CIF_ISP_HIST_BIN_2_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000001C)
+#define RKISP1_CIF_ISP_HIST_BIN_3_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000020)
+#define RKISP1_CIF_ISP_HIST_BIN_4_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000024)
+#define RKISP1_CIF_ISP_HIST_BIN_5_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000028)
+#define RKISP1_CIF_ISP_HIST_BIN_6_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000002C)
+#define RKISP1_CIF_ISP_HIST_BIN_7_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000030)
+#define RKISP1_CIF_ISP_HIST_BIN_8_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000034)
+#define RKISP1_CIF_ISP_HIST_BIN_9_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000038)
+#define RKISP1_CIF_ISP_HIST_BIN_10_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000003C)
+#define RKISP1_CIF_ISP_HIST_BIN_11_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000040)
+#define RKISP1_CIF_ISP_HIST_BIN_12_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000044)
+#define RKISP1_CIF_ISP_HIST_BIN_13_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000048)
+#define RKISP1_CIF_ISP_HIST_BIN_14_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000004C)
+#define RKISP1_CIF_ISP_HIST_BIN_15_V10		(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000050)
+#define RKISP1_CIF_ISP_HIST_WEIGHT_00TO30_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000054)
+#define RKISP1_CIF_ISP_HIST_WEIGHT_40TO21_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000058)
+#define RKISP1_CIF_ISP_HIST_WEIGHT_31TO12_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000005C)
+#define RKISP1_CIF_ISP_HIST_WEIGHT_22TO03_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000060)
+#define RKISP1_CIF_ISP_HIST_WEIGHT_13TO43_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000064)
+#define RKISP1_CIF_ISP_HIST_WEIGHT_04TO34_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x00000068)
+#define RKISP1_CIF_ISP_HIST_WEIGHT_44_V10	(RKISP1_CIF_ISP_HIST_BASE_V10 + 0x0000006C)
 
 #define RKISP1_CIF_ISP_FILT_BASE		0x00002500
 #define RKISP1_CIF_ISP_FILT_MODE		(RKISP1_CIF_ISP_FILT_BASE + 0x00000000)
@@ -1060,35 +1088,35 @@ 
 
 #define RKISP1_CIF_ISP_EXP_BASE			0x00002600
 #define RKISP1_CIF_ISP_EXP_CTRL			(RKISP1_CIF_ISP_EXP_BASE + 0x00000000)
-#define RKISP1_CIF_ISP_EXP_H_OFFSET		(RKISP1_CIF_ISP_EXP_BASE + 0x00000004)
-#define RKISP1_CIF_ISP_EXP_V_OFFSET		(RKISP1_CIF_ISP_EXP_BASE + 0x00000008)
-#define RKISP1_CIF_ISP_EXP_H_SIZE		(RKISP1_CIF_ISP_EXP_BASE + 0x0000000C)
-#define RKISP1_CIF_ISP_EXP_V_SIZE		(RKISP1_CIF_ISP_EXP_BASE + 0x00000010)
-#define RKISP1_CIF_ISP_EXP_MEAN_00		(RKISP1_CIF_ISP_EXP_BASE + 0x00000014)
-#define RKISP1_CIF_ISP_EXP_MEAN_10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000018)
-#define RKISP1_CIF_ISP_EXP_MEAN_20		(RKISP1_CIF_ISP_EXP_BASE + 0x0000001c)
-#define RKISP1_CIF_ISP_EXP_MEAN_30		(RKISP1_CIF_ISP_EXP_BASE + 0x00000020)
-#define RKISP1_CIF_ISP_EXP_MEAN_40		(RKISP1_CIF_ISP_EXP_BASE + 0x00000024)
-#define RKISP1_CIF_ISP_EXP_MEAN_01		(RKISP1_CIF_ISP_EXP_BASE + 0x00000028)
-#define RKISP1_CIF_ISP_EXP_MEAN_11		(RKISP1_CIF_ISP_EXP_BASE + 0x0000002c)
-#define RKISP1_CIF_ISP_EXP_MEAN_21		(RKISP1_CIF_ISP_EXP_BASE + 0x00000030)
-#define RKISP1_CIF_ISP_EXP_MEAN_31		(RKISP1_CIF_ISP_EXP_BASE + 0x00000034)
-#define RKISP1_CIF_ISP_EXP_MEAN_41		(RKISP1_CIF_ISP_EXP_BASE + 0x00000038)
-#define RKISP1_CIF_ISP_EXP_MEAN_02		(RKISP1_CIF_ISP_EXP_BASE + 0x0000003c)
-#define RKISP1_CIF_ISP_EXP_MEAN_12		(RKISP1_CIF_ISP_EXP_BASE + 0x00000040)
-#define RKISP1_CIF_ISP_EXP_MEAN_22		(RKISP1_CIF_ISP_EXP_BASE + 0x00000044)
-#define RKISP1_CIF_ISP_EXP_MEAN_32		(RKISP1_CIF_ISP_EXP_BASE + 0x00000048)
-#define RKISP1_CIF_ISP_EXP_MEAN_42		(RKISP1_CIF_ISP_EXP_BASE + 0x0000004c)
-#define RKISP1_CIF_ISP_EXP_MEAN_03		(RKISP1_CIF_ISP_EXP_BASE + 0x00000050)
-#define RKISP1_CIF_ISP_EXP_MEAN_13		(RKISP1_CIF_ISP_EXP_BASE + 0x00000054)
-#define RKISP1_CIF_ISP_EXP_MEAN_23		(RKISP1_CIF_ISP_EXP_BASE + 0x00000058)
-#define RKISP1_CIF_ISP_EXP_MEAN_33		(RKISP1_CIF_ISP_EXP_BASE + 0x0000005c)
-#define RKISP1_CIF_ISP_EXP_MEAN_43		(RKISP1_CIF_ISP_EXP_BASE + 0x00000060)
-#define RKISP1_CIF_ISP_EXP_MEAN_04		(RKISP1_CIF_ISP_EXP_BASE + 0x00000064)
-#define RKISP1_CIF_ISP_EXP_MEAN_14		(RKISP1_CIF_ISP_EXP_BASE + 0x00000068)
-#define RKISP1_CIF_ISP_EXP_MEAN_24		(RKISP1_CIF_ISP_EXP_BASE + 0x0000006c)
-#define RKISP1_CIF_ISP_EXP_MEAN_34		(RKISP1_CIF_ISP_EXP_BASE + 0x00000070)
-#define RKISP1_CIF_ISP_EXP_MEAN_44		(RKISP1_CIF_ISP_EXP_BASE + 0x00000074)
+#define RKISP1_CIF_ISP_EXP_H_OFFSET_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000004)
+#define RKISP1_CIF_ISP_EXP_V_OFFSET_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000008)
+#define RKISP1_CIF_ISP_EXP_H_SIZE_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000000C)
+#define RKISP1_CIF_ISP_EXP_V_SIZE_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000010)
+#define RKISP1_CIF_ISP_EXP_MEAN_00_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000014)
+#define RKISP1_CIF_ISP_EXP_MEAN_10_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000018)
+#define RKISP1_CIF_ISP_EXP_MEAN_20_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000001c)
+#define RKISP1_CIF_ISP_EXP_MEAN_30_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000020)
+#define RKISP1_CIF_ISP_EXP_MEAN_40_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000024)
+#define RKISP1_CIF_ISP_EXP_MEAN_01_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000028)
+#define RKISP1_CIF_ISP_EXP_MEAN_11_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000002c)
+#define RKISP1_CIF_ISP_EXP_MEAN_21_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000030)
+#define RKISP1_CIF_ISP_EXP_MEAN_31_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000034)
+#define RKISP1_CIF_ISP_EXP_MEAN_41_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000038)
+#define RKISP1_CIF_ISP_EXP_MEAN_02_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000003c)
+#define RKISP1_CIF_ISP_EXP_MEAN_12_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000040)
+#define RKISP1_CIF_ISP_EXP_MEAN_22_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000044)
+#define RKISP1_CIF_ISP_EXP_MEAN_32_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000048)
+#define RKISP1_CIF_ISP_EXP_MEAN_42_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000004c)
+#define RKISP1_CIF_ISP_EXP_MEAN_03_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000050)
+#define RKISP1_CIF_ISP_EXP_MEAN_13_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000054)
+#define RKISP1_CIF_ISP_EXP_MEAN_23_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000058)
+#define RKISP1_CIF_ISP_EXP_MEAN_33_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000005c)
+#define RKISP1_CIF_ISP_EXP_MEAN_43_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000060)
+#define RKISP1_CIF_ISP_EXP_MEAN_04_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000064)
+#define RKISP1_CIF_ISP_EXP_MEAN_14_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000068)
+#define RKISP1_CIF_ISP_EXP_MEAN_24_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x0000006c)
+#define RKISP1_CIF_ISP_EXP_MEAN_34_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000070)
+#define RKISP1_CIF_ISP_EXP_MEAN_44_V10		(RKISP1_CIF_ISP_EXP_BASE + 0x00000074)
 
 #define RKISP1_CIF_ISP_BLS_BASE			0x00002700
 #define RKISP1_CIF_ISP_BLS_CTRL			(RKISP1_CIF_ISP_BLS_BASE + 0x00000000)
@@ -1260,4 +1288,7 @@ 
 #define RKISP1_CIF_ISP_VSM_DELTA_H		(RKISP1_CIF_ISP_VSM_BASE + 0x0000001C)
 #define RKISP1_CIF_ISP_VSM_DELTA_V		(RKISP1_CIF_ISP_VSM_BASE + 0x00000020)
 
+#define RKISP1_CIF_ISP_CSI0_BASE		0x00007000
+#define RKISP1_CIF_ISP_CSI0_CTRL0		(RKISP1_CIF_ISP_CSI0_BASE + 0x00000000)
+
 #endif /* _RKISP1_REGS_H */
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
index f68a5e78e54a..3f286c55ad60 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-stats.c
@@ -175,18 +175,18 @@  rkisp1_stats_init_vb2_queue(struct vb2_queue *q, struct rkisp1_stats *stats)
 	return vb2_queue_init(q);
 }
 
-static void rkisp1_stats_get_awb_meas(struct rkisp1_stats *stats,
-				      struct rkisp1_stat_buffer *pbuf)
+static void rkisp1_stats_get_awb_meas_v10(struct rkisp1_stats *stats,
+					  struct rkisp1_stat_buffer *pbuf)
 {
 	/* Protect against concurrent access from ISR? */
 	struct rkisp1_device *rkisp1 = stats->rkisp1;
 	u32 reg_val;
 
 	pbuf->meas_type |= RKISP1_CIF_ISP_STAT_AWB;
-	reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AWB_WHITE_CNT);
+	reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AWB_WHITE_CNT_V10);
 	pbuf->params.awb.awb_mean[0].cnt =
 				RKISP1_CIF_ISP_AWB_GET_PIXEL_CNT(reg_val);
-	reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AWB_MEAN);
+	reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AWB_MEAN_V10);
 
 	pbuf->params.awb.awb_mean[0].mean_cr_or_r =
 				RKISP1_CIF_ISP_AWB_GET_MEAN_CR_R(reg_val);
@@ -196,8 +196,8 @@  static void rkisp1_stats_get_awb_meas(struct rkisp1_stats *stats,
 				RKISP1_CIF_ISP_AWB_GET_MEAN_Y_G(reg_val);
 }
 
-static void rkisp1_stats_get_aec_meas(struct rkisp1_stats *stats,
-				      struct rkisp1_stat_buffer *pbuf)
+static void rkisp1_stats_get_aec_meas_v10(struct rkisp1_stats *stats,
+					  struct rkisp1_stat_buffer *pbuf)
 {
 	struct rkisp1_device *rkisp1 = stats->rkisp1;
 	unsigned int i;
@@ -206,7 +206,7 @@  static void rkisp1_stats_get_aec_meas(struct rkisp1_stats *stats,
 	for (i = 0; i < RKISP1_CIF_ISP_AE_MEAN_MAX_V10; i++)
 		pbuf->params.ae.exp_mean[i] =
 			(u8)rkisp1_read(rkisp1,
-					RKISP1_CIF_ISP_EXP_MEAN_00 + i * 4);
+					RKISP1_CIF_ISP_EXP_MEAN_00_V10 + i * 4);
 }
 
 static void rkisp1_stats_get_afc_meas(struct rkisp1_stats *stats,
@@ -226,17 +226,17 @@  static void rkisp1_stats_get_afc_meas(struct rkisp1_stats *stats,
 	af->window[2].lum = rkisp1_read(rkisp1, RKISP1_CIF_ISP_AFM_LUM_C);
 }
 
-static void rkisp1_stats_get_hst_meas(struct rkisp1_stats *stats,
-				      struct rkisp1_stat_buffer *pbuf)
+static void rkisp1_stats_get_hst_meas_v10(struct rkisp1_stats *stats,
+					  struct rkisp1_stat_buffer *pbuf)
 {
 	struct rkisp1_device *rkisp1 = stats->rkisp1;
 	unsigned int i;
 
 	pbuf->meas_type |= RKISP1_CIF_ISP_STAT_HIST;
 	for (i = 0; i < RKISP1_CIF_ISP_HIST_BIN_N_MAX_V10; i++) {
-		u32 reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_HIST_BIN_0 + i * 4);
+		u32 reg_val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_HIST_BIN_0_V10 + i * 4);
 
-		pbuf->params.hist.hist_bins[i] = RKISP1_CIF_ISP_HIST_GET_BIN(reg_val);
+		pbuf->params.hist.hist_bins[i] = RKISP1_CIF_ISP_HIST_GET_BIN_V10(reg_val);
 	}
 }
 
@@ -287,10 +287,10 @@  static void rkisp1_stats_get_bls_meas(struct rkisp1_stats *stats,
 	}
 }
 
-static struct rkisp1_stats_ops rkisp1_stats_ops = {
-	.get_awb_meas = rkisp1_stats_get_awb_meas,
-	.get_aec_meas = rkisp1_stats_get_aec_meas,
-	.get_hst_meas = rkisp1_stats_get_hst_meas,
+static struct rkisp1_stats_ops rkisp1_v10_stats_ops = {
+	.get_awb_meas = rkisp1_stats_get_awb_meas_v10,
+	.get_aec_meas = rkisp1_stats_get_aec_meas_v10,
+	.get_hst_meas = rkisp1_stats_get_hst_meas_v10,
 };
 
 static void
@@ -361,7 +361,7 @@  static void rkisp1_init_stats(struct rkisp1_stats *stats)
 	stats->vdev_fmt.fmt.meta.buffersize =
 		sizeof(struct rkisp1_stat_buffer);
 
-	stats->ops = &rkisp1_stats_ops;
+	stats->ops = &rkisp1_v10_stats_ops;
 }
 
 int rkisp1_stats_register(struct rkisp1_device *rkisp1)