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[v14,00/12] add ecspi ERR009165 for i.mx6/7 soc family

Message ID 1617809456-17693-1-git-send-email-yibin.gong@nxp.com (mailing list archive)
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Series add ecspi ERR009165 for i.mx6/7 soc family | expand

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Robin Gong April 7, 2021, 3:30 p.m. UTC
There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
transfer to be send twice in DMA mode. Please get more information from:
https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding
new sdma ram script which works in XCH  mode as PIO inside sdma instead
of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be
exist on all legacy i.mx6/7 soc family before i.mx6ul.
NXP fix this design issue from i.mx6ul, so newer chips including i.mx6ul/
6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8 chips
still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi'
for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need errata
or not.
The first two reverted patches should be the same issue, though, it
seems 'fixed' by changing to other shp script. Hope Sean or Sascha could
have the chance to test this patch set if could fix their issues.
Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work
on i.mx8mm because the event id is zero.

PS:
   Please get sdma firmware from below linux-firmware and copy it to your
local rootfs /lib/firmware/imx/sdma.
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/imx/sdma

v2:
  1.Add commit log for reverted patches.
  2.Add comment for 'ecspi_fixed' in sdma driver.
  3.Add 'fsl,imx6sll-ecspi' compatible instead of 'fsl,imx6ul-ecspi'
    rather than remove.
v3:
  1.Confirm with design team make sure ERR009165 fixed on i.mx6ul/i.mx6ull
    /i.mx6sll, not fixed on i.mx8m/8mm and other i.mx6/7 legacy chips.
    Correct dts related dts patch in v2.
  2.Clean eratta information in binding doc and new 'tx_glitch_fixed' flag
    in spi-imx driver to state ERR009165 fixed or not.
  3.Enlarge burst size to fifo size for tx since tx_wml set to 0 in the
    errata workaroud, thus improve performance as possible.
v4:
  1.Add Ack tag from Mark and Vinod
  2.Remove checking 'event_id1' zero as 'event_id0'.
v5:
  1.Add the last patch for compatible with the current uart driver which
    using rom script, so both uart ram script and rom script supported
    in latest firmware, by default uart rom script used. UART driver
    will be broken without this patch.
v6:
  1.Resend after rebase the latest next branch.
  2.Remove below No.13~No.15 patches of v5 because they were mergered.
  	ARM: dts: imx6ul: add dma support on ecspi
  	ARM: dts: imx6sll: correct sdma compatible
  	arm64: defconfig: Enable SDMA on i.mx8mq/8mm
  3.Revert "dmaengine: imx-sdma: fix context cache" since
    'context_loaded' removed.
v7:
  1.Put the last patch 13/13 'Revert "dmaengine: imx-sdma: fix context
    cache"' to the ahead of 03/13 'Revert "dmaengine: imx-sdma: refine
    to load context only once" so that no building waring during comes out
    during bisect.
  2.Address Sascha's comments, including eliminating any i.mx6sx in this
    series, adding new 'is_imx6ul_ecspi()' instead imx in imx51 and taking
    care SMC bit for PIO.
  3.Add back missing 'Reviewed-by' tag on 08/15(v5):09/13(v7)
   'spi: imx: add new i.mx6ul compatible name in binding doc'
v8:
  1.remove 0003-Revert-dmaengine-imx-sdma-fix-context-cache.patch and merge
    it into 04/13 of v7
  2.add 0005-spi-imx-fallback-to-PIO-if-dma-setup-failure.patch for no any
    ecspi function broken even if sdma firmware not updated.
  3.merge 'tx.dst_maxburst' changes in the two continous patches into one
    patch to avoid confusion.
  4.fix typo 'duplicated'.
v9:
  1. add "spi: imx: add dma_sync_sg_for_device after fallback from dma"
     to fix the potential issue brought by commit bcd8e7761ec9("spi: imx:
     fallback to PIO if dma setup failure") which is the only one patch
     of v8 merged. Thanks Matthias for reporting:
     https://lore.kernel.org/linux-arm-kernel/5d246dd81607bb6e5cb9af86ad4e53f7a7a99c50.camel@ew.tq-group.com/
  2. remove 05/13 of v8 "spi: imx:fallback to PIO if dma setup failure"
     since it's been merged.
v10:
  1. remove 01/13 "spi: imx: add dma_sync_sg_for_device after fallback from dma"
     since there is another independent patch merged:
     -- commit 809b1b04df898 ("spi: introduce fallback to pio")
  2. add "dmaengine: dma: imx-sdma: add fw_loaded and is_ram_script" which
     is used to fix the potential dma_alloc_coherent() failure while this
     patchset applied but sdma firmware may not be ready for long time.
  3. burst size change back from fifo size to normal wml to align with nxp
     internal tree which has been test for years. Overnight with loopback
     test with spidev failed with fifo size, but pass with wml(half of fifo
     size).Seems the whole fifo size fed may cause rxfifo overflow during
     tx shift out while rx shift in.
     "spi: imx: remove ERR009165 workaround on i.mx6ul"
  4. remove 12/13 'dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm'
     since below two similar patches merged:
     -- commit 25962e1a7f1d ("dmaengine: imx-sdma: Fix the event id check to
     include RX event for UART6")
     -- commit 2f57b8d57673 ("dmaengine: imx-sdma: Fix: Remove 'always true'
     comparison")
v11:
  1. change dev_err() to dev_warn_once() in case sdma firmware not loaded to
     eliminate meaningless duplicate log print.
v12:
  1. take care uart_2_mcu_addr/uartsh_2_mcu_addr since such rom scripts are
     now located in the bottom part of sdma_script_start_addrs which are beyond
     the SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1. Reported by Frieder as below:
     https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg2263544.html
v13:
  1. rebase with latest linux-next.
  2. remove 09/12 'spi: imx: add new i.mx6ul compatible name in binding doc'
     since it's been converted to yaml already.
  3. add 'Fixes', 'Cc: stable@vger.kernel.org' and 'Test-by' tags for 03,04
     since they are confirmed fix by Richard Leitner:
     https://lkml.org/lkml/2020/8/17/39
     https://www.spinics.net/lists/dmaengine/msg23489.html
  4. fix potential descriptor free unexpected on the next transfer before
     the last channel terminated:
     https://www.spinics.net/lists/dmaengine/msg23400.html
v14:
  1. rebase with latest linux-next.

Robin Gong (12):
  Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
  Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
  Revert "dmaengine: imx-sdma: refine to load context only once"
  dmaengine: imx-sdma: remove duplicated sdma_load_context
  dmaengine: dma: imx-sdma: add fw_loaded and is_ram_script
  dmaengine: imx-sdma: add mcu_2_ecspi script
  spi: imx: fix ERR009165
  spi: imx: remove ERR009165 workaround on i.mx6ul
  dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
  dma: imx-sdma: add i.mx6ul compatible name
  dmaengine: imx-sdma: add uart rom script
  dmaengine: imx-sdma: add terminated list for freed descriptor in
    worker

 .../devicetree/bindings/dma/fsl-imx-sdma.txt       |  1 +
 arch/arm/boot/dts/imx6q.dtsi                       |  2 +-
 arch/arm/boot/dts/imx6qdl.dtsi                     |  8 +-
 drivers/dma/imx-sdma.c                             | 90 ++++++++++++++++------
 drivers/spi/spi-imx.c                              | 49 ++++++++++--
 include/linux/platform_data/dma-imx-sdma.h         |  8 +-
 6 files changed, 122 insertions(+), 36 deletions(-)

Comments

Fabio Estevam June 11, 2021, 1:51 p.m. UTC | #1
Hi Robin,

On Wed, Apr 7, 2021 at 4:15 AM Robin Gong <yibin.gong@nxp.com> wrote:
>
> There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
> transfer to be send twice in DMA mode. Please get more information from:
> https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding
> new sdma ram script which works in XCH  mode as PIO inside sdma instead
> of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be
> exist on all legacy i.mx6/7 soc family before i.mx6ul.
> NXP fix this design issue from i.mx6ul, so newer chips including i.mx6ul/
> 6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8 chips
> still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi'
> for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need errata
> or not.
> The first two reverted patches should be the same issue, though, it
> seems 'fixed' by changing to other shp script. Hope Sean or Sascha could
> have the chance to test this patch set if could fix their issues.
> Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work
> on i.mx8mm because the event id is zero.
>
> PS:
>    Please get sdma firmware from below linux-firmware and copy it to your
> local rootfs /lib/firmware/imx/sdma.
> https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/imx/sdma

Without this series, SPI DMA does not work on i.MX8MM:

 [   41.315984] spi_master spi1: I/O Error in DMA RX

I applied your series and SPI DMA works now:

Reviewed-by: Fabio Estevam <festevam@gmail.com>

Thanks
Robin Gong June 15, 2021, 1:55 a.m. UTC | #2
On 06/11/21 21:51 Fabio Estevam <festevam@gmail.com> wrote: 
> Hi Robin,
> 
> On Wed, Apr 7, 2021 at 4:15 AM Robin Gong <yibin.gong@nxp.com> wrote:
> >
> > There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
> > transfer to be send twice in DMA mode. Please get more information from:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.
> >
> nxp.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&amp;data=04%7C01%7
> Cyibin.g
> >
> ong%40nxp.com%7Cab59d4a2e95a4351e48708d92cdffc09%7C686ea1d3bc2
> b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637590162781662129%7CUnknown%7CTWF
> pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC
> I6Mn0%3D%7C1000&amp;sdata=DIbrrAYvpoJ4lKrkDJYvyoixR9DcMCgVDwuW
> gI5fuVw%3D&amp;reserved=0. The workaround is adding new sdma ram
> script which works in XCH  mode as PIO inside sdma instead of SMC mode,
> meanwhile, 'TX_THRESHOLD' should be 0. The issue should be exist on all
> legacy i.mx6/7 soc family before i.mx6ul.
> > NXP fix this design issue from i.mx6ul, so newer chips including
> > i.mx6ul/ 6ull/6sll do not need this workaroud anymore. All other
> > i.mx6/7/8 chips still need this workaroud. This patch set add new
> 'fsl,imx6ul-ecspi'
> > for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need
> > errata or not.
> > The first two reverted patches should be the same issue, though, it
> > seems 'fixed' by changing to other shp script. Hope Sean or Sascha
> > could have the chance to test this patch set if could fix their issues.
> > Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work
> > on i.mx8mm because the event id is zero.
> >
> > PS:
> >    Please get sdma firmware from below linux-firmware and copy it to
> > your local rootfs /lib/firmware/imx/sdma.
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.
> >
> kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-fir
> mw
> >
> are.git%2Ftree%2Fimx%2Fsdma&amp;data=04%7C01%7Cyibin.gong%40nxp.c
> om%7C
> >
> ab59d4a2e95a4351e48708d92cdffc09%7C686ea1d3bc2b4c6fa92cd99c5c301
> 635%7C
> >
> 0%7C1%7C637590162781662129%7CUnknown%7CTWFpbGZsb3d8eyJWIjoi
> MC4wLjAwMDA
> >
> iLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=uL
> %2F
> >
> 6w%2F7JF76dqTfKYk4BT%2F5flWr0d3U2O86ABSq2UhI%3D&amp;reserved=0
> 
> Without this series, SPI DMA does not work on i.MX8MM:
> 
>  [   41.315984] spi_master spi1: I/O Error in DMA RX
> 
> I applied your series and SPI DMA works now:
> 
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Thanks Fabio.
Hello Vinod, Mark, 
Is my patch set good enough to merge? I remember someone else are
requesting it from last year like Fabio.
Fabio Estevam June 15, 2021, 2:12 a.m. UTC | #3
Hi Robin,

On Wed, Apr 7, 2021 at 4:15 AM Robin Gong <yibin.gong@nxp.com> wrote:
>
> There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
> transfer to be send twice in DMA mode. Please get more information from:
> https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding
> new sdma ram script which works in XCH  mode as PIO inside sdma instead
> of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be

Could you please confirm whether the sdma-imx7d.bin firmware available at
https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/log/imx/sdma/sdma-imx7d.bin

contains the "new sdma ram script which works in XCH  mode as PIO
inside sdma instead
of SMC mode" fix?

Thanks,

Fabio Estevam
Robin Gong June 15, 2021, 2:17 a.m. UTC | #4
On 06/15/21 10:13 Fabio Estevam <festevam@gmail.com> wrote:
> Hi Robin,
> 
> On Wed, Apr 7, 2021 at 4:15 AM Robin Gong <yibin.gong@nxp.com> wrote:
> >
> > There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
> > transfer to be send twice in DMA mode. Please get more information from:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.
> >
> nxp.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&amp;data=04%7C01%7
> Cyibin.g
> >
> ong%40nxp.com%7C3c61a5cfd0574c1bc4eb08d92fa31257%7C686ea1d3bc2
> b4c6fa92
> >
> cd99c5c301635%7C0%7C1%7C637593199700307681%7CUnknown%7CTWF
> pbGZsb3d8eyJ
> >
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C1000
> >
> &amp;sdata=g2%2FwpDG22czIhj7ELil2kiiGPG0d74Ac7D8H3g0YtJc%3D&amp;r
> eserv
> > ed=0. The workaround is adding new sdma ram script which works in XCH
> > mode as PIO inside sdma instead of SMC mode, meanwhile, 'TX_THRESHOLD'
> > should be 0. The issue should be
> 
> Could you please confirm whether the sdma-imx7d.bin firmware available at
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kern
> el.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-firmwa
> re.git%2Flog%2Fimx%2Fsdma%2Fsdma-imx7d.bin&amp;data=04%7C01%7Cyi
> bin.gong%40nxp.com%7C3c61a5cfd0574c1bc4eb08d92fa31257%7C686ea1d
> 3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637593199700307681%7CUnkn
> own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1
> haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=6UDEjl3ehC49af38OI%2FQhE
> mbeLYgQSJB91Kriihw1Jk%3D&amp;reserved=0
> 
> contains the "new sdma ram script which works in XCH  mode as PIO inside
> sdma instead of SMC mode" fix?
Yes, it contains.
Vinod Koul June 15, 2021, 6:07 a.m. UTC | #5
On 15-06-21, 01:55, Robin Gong wrote:
> On 06/11/21 21:51 Fabio Estevam <festevam@gmail.com> wrote: 

> > Without this series, SPI DMA does not work on i.MX8MM:
> > 
> >  [   41.315984] spi_master spi1: I/O Error in DMA RX
> > 
> > I applied your series and SPI DMA works now:
> > 
> > Reviewed-by: Fabio Estevam <festevam@gmail.com>
> Thanks Fabio.
> Hello Vinod, Mark, 
> Is my patch set good enough to merge? I remember someone else are
> requesting it from last year like Fabio. 

I have acked the last dmaengine patch, is there any else required from
me? Which tree will be this merged thru?
Robin Gong June 15, 2021, 6:36 a.m. UTC | #6
On 15/06/21 14:08 Vinod Koul <vkoul@kernel.org> wrote:
> On 15-06-21, 01:55, Robin Gong wrote:
> > On 06/11/21 21:51 Fabio Estevam <festevam@gmail.com> wrote:
> 
> > > Without this series, SPI DMA does not work on i.MX8MM:
> > >
> > >  [   41.315984] spi_master spi1: I/O Error in DMA RX
> > >
> > > I applied your series and SPI DMA works now:
> > >
> > > Reviewed-by: Fabio Estevam <festevam@gmail.com>
> > Thanks Fabio.
> > Hello Vinod, Mark,
> > Is my patch set good enough to merge? I remember someone else are
> > requesting it from last year like Fabio.
> 
> I have acked the last dmaengine patch, is there any else required from me?
> Which tree will be this merged thru?
Thanks Vinod, mainline is enough I think.
Vinod Koul June 15, 2021, 12:07 p.m. UTC | #7
On 15-06-21, 06:36, Robin Gong wrote:
> On 15/06/21 14:08 Vinod Koul <vkoul@kernel.org> wrote:
> > On 15-06-21, 01:55, Robin Gong wrote:
> > > On 06/11/21 21:51 Fabio Estevam <festevam@gmail.com> wrote:
> > 
> > > > Without this series, SPI DMA does not work on i.MX8MM:
> > > >
> > > >  [   41.315984] spi_master spi1: I/O Error in DMA RX
> > > >
> > > > I applied your series and SPI DMA works now:
> > > >
> > > > Reviewed-by: Fabio Estevam <festevam@gmail.com>
> > > Thanks Fabio.
> > > Hello Vinod, Mark,
> > > Is my patch set good enough to merge? I remember someone else are
> > > requesting it from last year like Fabio.
> > 
> > I have acked the last dmaengine patch, is there any else required from me?
> > Which tree will be this merged thru?
> Thanks Vinod, mainline is enough I think. 

I meant which subsystem tree will this go thru :)
Robin Gong June 15, 2021, 2:10 p.m. UTC | #8
On 15/06/21 20:08 Vinod Koul <vkoul@kernel.org> wrote:
> On 15-06-21, 06:36, Robin Gong wrote:
> > On 15/06/21 14:08 Vinod Koul <vkoul@kernel.org> wrote:
> > > On 15-06-21, 01:55, Robin Gong wrote:
> > > > On 06/11/21 21:51 Fabio Estevam <festevam@gmail.com> wrote:
> > >
> > > > > Without this series, SPI DMA does not work on i.MX8MM:
> > > > >
> > > > >  [   41.315984] spi_master spi1: I/O Error in DMA RX
> > > > >
> > > > > I applied your series and SPI DMA works now:
> > > > >
> > > > > Reviewed-by: Fabio Estevam <festevam@gmail.com>
> > > > Thanks Fabio.
> > > > Hello Vinod, Mark,
> > > > Is my patch set good enough to merge? I remember someone else are
> > > > requesting it from last year like Fabio.
> > >
> > > I have acked the last dmaengine patch, is there any else required from me?
> > > Which tree will be this merged thru?
> > Thanks Vinod, mainline is enough I think.
> 
> I meant which subsystem tree will this go thru :)
I thought the patches with 'spi' tag could be merged into spi tree while
'dmaengine' merged into dmaengine tree, the rest of dts patch merged
into i.mx branch. But from HW errata view, maybe merging all into i.mx
branch is a better way?
Vinod Koul June 16, 2021, 10:16 a.m. UTC | #9
On 15-06-21, 14:10, Robin Gong wrote:
> On 15/06/21 20:08 Vinod Koul <vkoul@kernel.org> wrote:
> > On 15-06-21, 06:36, Robin Gong wrote:
> > > On 15/06/21 14:08 Vinod Koul <vkoul@kernel.org> wrote:
> > > > On 15-06-21, 01:55, Robin Gong wrote:
> > > > > On 06/11/21 21:51 Fabio Estevam <festevam@gmail.com> wrote:
> > > >
> > > > > > Without this series, SPI DMA does not work on i.MX8MM:
> > > > > >
> > > > > >  [   41.315984] spi_master spi1: I/O Error in DMA RX
> > > > > >
> > > > > > I applied your series and SPI DMA works now:
> > > > > >
> > > > > > Reviewed-by: Fabio Estevam <festevam@gmail.com>
> > > > > Thanks Fabio.
> > > > > Hello Vinod, Mark,
> > > > > Is my patch set good enough to merge? I remember someone else are
> > > > > requesting it from last year like Fabio.
> > > >
> > > > I have acked the last dmaengine patch, is there any else required from me?
> > > > Which tree will be this merged thru?
> > > Thanks Vinod, mainline is enough I think.
> > 
> > I meant which subsystem tree will this go thru :)
> I thought the patches with 'spi' tag could be merged into spi tree while
> 'dmaengine' merged into dmaengine tree, the rest of dts patch merged
> into i.mx branch. But from HW errata view, maybe merging all into i.mx
> branch is a better way?

Are there any dependecies between patches? If not all can merge thru
respective subsystem. You already have the ack, so I dont mind if you
pick thru imx tree
Robin Gong June 16, 2021, 10:44 a.m. UTC | #10
On 16/06/21 18:16 Vinod Koul <vkoul@kernel.org> wrote:
> On 15-06-21, 14:10, Robin Gong wrote:
> > On 15/06/21 20:08 Vinod Koul <vkoul@kernel.org> wrote:
> > I thought the patches with 'spi' tag could be merged into spi tree
> > while 'dmaengine' merged into dmaengine tree, the rest of dts patch
> > merged into i.mx branch. But from HW errata view, maybe merging all
> > into i.mx branch is a better way?
> 
> Are there any dependecies between patches? If not all can merge thru
> respective subsystem. You already have the ack, so I dont mind if you pick thru
> imx tree
Yes, this errata need both spi/dma work together, thanks Vinod.

Hi Shawn, 
Do you have any comment for v14? If not, could it be
merged into imx tree including spi/dmaengine?