| Message ID | 20210608073603.2408-4-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: DDI buf trans cleaup and fixes | expand |
On Tue, 08 Jun 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > In order to abstact the buf trans stuff let's wrap the platform > specific structs into a union. > > v2: Handle adl-p > > Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1 Holds for v2. > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 76 +- > .../drm/i915/display/intel_ddi_buf_trans.c | 1370 ++++++++--------- > .../drm/i915/display/intel_ddi_buf_trans.h | 30 +- > 3 files changed, 742 insertions(+), 734 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index 33e94030090f..f3fba535812c 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -102,7 +102,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, > u32 iboost_bit = 0; > int i, n_entries; > enum port port = encoder->port; > - const struct hsw_ddi_buf_trans *ddi_translations; > + const union intel_ddi_buf_trans_entry *ddi_translations; > > ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries); > > @@ -116,9 +116,9 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, > > for (i = 0; i < n_entries; i++) { > intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, i), > - ddi_translations[i].trans1 | iboost_bit); > + ddi_translations[i].hsw.trans1 | iboost_bit); > intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, i), > - ddi_translations[i].trans2); > + ddi_translations[i].hsw.trans2); > } > } > > @@ -135,7 +135,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder, > u32 iboost_bit = 0; > int n_entries; > enum port port = encoder->port; > - const struct hsw_ddi_buf_trans *ddi_translations; > + const union intel_ddi_buf_trans_entry *ddi_translations; > > ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries); > > @@ -151,9 +151,9 @@ static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder, > > /* Entry 9 is for HDMI: */ > intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, 9), > - ddi_translations[level].trans1 | iboost_bit); > + ddi_translations[level].hsw.trans1 | iboost_bit); > intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, 9), > - ddi_translations[level].trans2); > + ddi_translations[level].hsw.trans2); > } > > void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, > @@ -944,7 +944,7 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder, > iboost = intel_bios_encoder_dp_boost_level(encoder->devdata); > > if (iboost == 0) { > - const struct hsw_ddi_buf_trans *ddi_translations; > + const union intel_ddi_buf_trans_entry *ddi_translations; > int n_entries; > > ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries); > @@ -954,7 +954,7 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder, > if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries)) > level = n_entries - 1; > > - iboost = ddi_translations[level].i_boost; > + iboost = ddi_translations[level].hsw.i_boost; > } > > /* Make sure that the requested I_boost is valid */ > @@ -974,7 +974,7 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder *encoder, > int level) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - const struct bxt_ddi_buf_trans *ddi_translations; > + const union intel_ddi_buf_trans_entry *ddi_translations; > enum port port = encoder->port; > int n_entries; > > @@ -985,10 +985,10 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder *encoder, > level = n_entries - 1; > > bxt_ddi_phy_set_signal_level(dev_priv, port, > - ddi_translations[level].margin, > - ddi_translations[level].scale, > - ddi_translations[level].enable, > - ddi_translations[level].deemphasis); > + ddi_translations[level].bxt.margin, > + ddi_translations[level].bxt.scale, > + ddi_translations[level].bxt.enable, > + ddi_translations[level].bxt.deemphasis); > } > > static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp, > @@ -1049,7 +1049,7 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder, > int level) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - const struct cnl_ddi_buf_trans *ddi_translations; > + const union intel_ddi_buf_trans_entry *ddi_translations; > enum port port = encoder->port; > int n_entries, ln; > u32 val; > @@ -1071,8 +1071,8 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder, > val = intel_de_read(dev_priv, CNL_PORT_TX_DW2_LN0(port)); > val &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK | > RCOMP_SCALAR_MASK); > - val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_sel); > - val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_sel); > + val |= SWING_SEL_UPPER(ddi_translations[level].cnl.dw2_swing_sel); > + val |= SWING_SEL_LOWER(ddi_translations[level].cnl.dw2_swing_sel); > /* Rcomp scalar is fixed as 0x98 for every table entry */ > val |= RCOMP_SCALAR(0x98); > intel_de_write(dev_priv, CNL_PORT_TX_DW2_GRP(port), val); > @@ -1083,9 +1083,9 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder, > val = intel_de_read(dev_priv, CNL_PORT_TX_DW4_LN(ln, port)); > val &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK | > CURSOR_COEFF_MASK); > - val |= POST_CURSOR_1(ddi_translations[level].dw4_post_cursor_1); > - val |= POST_CURSOR_2(ddi_translations[level].dw4_post_cursor_2); > - val |= CURSOR_COEFF(ddi_translations[level].dw4_cursor_coeff); > + val |= POST_CURSOR_1(ddi_translations[level].cnl.dw4_post_cursor_1); > + val |= POST_CURSOR_2(ddi_translations[level].cnl.dw4_post_cursor_2); > + val |= CURSOR_COEFF(ddi_translations[level].cnl.dw4_cursor_coeff); > intel_de_write(dev_priv, CNL_PORT_TX_DW4_LN(ln, port), val); > } > > @@ -1100,7 +1100,7 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder, > /* Program PORT_TX_DW7 */ > val = intel_de_read(dev_priv, CNL_PORT_TX_DW7_LN0(port)); > val &= ~N_SCALAR_MASK; > - val |= N_SCALAR(ddi_translations[level].dw7_n_scalar); > + val |= N_SCALAR(ddi_translations[level].cnl.dw7_n_scalar); > intel_de_write(dev_priv, CNL_PORT_TX_DW7_GRP(port), val); > } > > @@ -1170,7 +1170,7 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, > int level) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > - const struct cnl_ddi_buf_trans *ddi_translations; > + const union intel_ddi_buf_trans_entry *ddi_translations; > enum phy phy = intel_port_to_phy(dev_priv, encoder->port); > int n_entries, ln; > u32 val; > @@ -1211,8 +1211,8 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, > val = intel_de_read(dev_priv, ICL_PORT_TX_DW2_LN0(phy)); > val &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK | > RCOMP_SCALAR_MASK); > - val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_sel); > - val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_sel); > + val |= SWING_SEL_UPPER(ddi_translations[level].cnl.dw2_swing_sel); > + val |= SWING_SEL_LOWER(ddi_translations[level].cnl.dw2_swing_sel); > /* Program Rcomp scalar for every table entry */ > val |= RCOMP_SCALAR(0x98); > intel_de_write(dev_priv, ICL_PORT_TX_DW2_GRP(phy), val); > @@ -1223,16 +1223,16 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, > val = intel_de_read(dev_priv, ICL_PORT_TX_DW4_LN(ln, phy)); > val &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK | > CURSOR_COEFF_MASK); > - val |= POST_CURSOR_1(ddi_translations[level].dw4_post_cursor_1); > - val |= POST_CURSOR_2(ddi_translations[level].dw4_post_cursor_2); > - val |= CURSOR_COEFF(ddi_translations[level].dw4_cursor_coeff); > + val |= POST_CURSOR_1(ddi_translations[level].cnl.dw4_post_cursor_1); > + val |= POST_CURSOR_2(ddi_translations[level].cnl.dw4_post_cursor_2); > + val |= CURSOR_COEFF(ddi_translations[level].cnl.dw4_cursor_coeff); > intel_de_write(dev_priv, ICL_PORT_TX_DW4_LN(ln, phy), val); > } > > /* Program PORT_TX_DW7 */ > val = intel_de_read(dev_priv, ICL_PORT_TX_DW7_LN0(phy)); > val &= ~N_SCALAR_MASK; > - val |= N_SCALAR(ddi_translations[level].dw7_n_scalar); > + val |= N_SCALAR(ddi_translations[level].cnl.dw7_n_scalar); > intel_de_write(dev_priv, ICL_PORT_TX_DW7_GRP(phy), val); > } > > @@ -1303,7 +1303,7 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port); > - const struct icl_mg_phy_ddi_buf_trans *ddi_translations; > + const union intel_ddi_buf_trans_entry *ddi_translations; > int n_entries, ln; > u32 val; > > @@ -1333,13 +1333,13 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, > val = intel_de_read(dev_priv, MG_TX1_SWINGCTRL(ln, tc_port)); > val &= ~CRI_TXDEEMPH_OVERRIDE_17_12_MASK; > val |= CRI_TXDEEMPH_OVERRIDE_17_12( > - ddi_translations[level].cri_txdeemph_override_17_12); > + ddi_translations[level].mg.cri_txdeemph_override_17_12); > intel_de_write(dev_priv, MG_TX1_SWINGCTRL(ln, tc_port), val); > > val = intel_de_read(dev_priv, MG_TX2_SWINGCTRL(ln, tc_port)); > val &= ~CRI_TXDEEMPH_OVERRIDE_17_12_MASK; > val |= CRI_TXDEEMPH_OVERRIDE_17_12( > - ddi_translations[level].cri_txdeemph_override_17_12); > + ddi_translations[level].mg.cri_txdeemph_override_17_12); > intel_de_write(dev_priv, MG_TX2_SWINGCTRL(ln, tc_port), val); > } > > @@ -1349,9 +1349,9 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, > val &= ~(CRI_TXDEEMPH_OVERRIDE_11_6_MASK | > CRI_TXDEEMPH_OVERRIDE_5_0_MASK); > val |= CRI_TXDEEMPH_OVERRIDE_5_0( > - ddi_translations[level].cri_txdeemph_override_5_0) | > + ddi_translations[level].mg.cri_txdeemph_override_5_0) | > CRI_TXDEEMPH_OVERRIDE_11_6( > - ddi_translations[level].cri_txdeemph_override_11_6) | > + ddi_translations[level].mg.cri_txdeemph_override_11_6) | > CRI_TXDEEMPH_OVERRIDE_EN; > intel_de_write(dev_priv, MG_TX1_DRVCTRL(ln, tc_port), val); > > @@ -1359,9 +1359,9 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, > val &= ~(CRI_TXDEEMPH_OVERRIDE_11_6_MASK | > CRI_TXDEEMPH_OVERRIDE_5_0_MASK); > val |= CRI_TXDEEMPH_OVERRIDE_5_0( > - ddi_translations[level].cri_txdeemph_override_5_0) | > + ddi_translations[level].mg.cri_txdeemph_override_5_0) | > CRI_TXDEEMPH_OVERRIDE_11_6( > - ddi_translations[level].cri_txdeemph_override_11_6) | > + ddi_translations[level].mg.cri_txdeemph_override_11_6) | > CRI_TXDEEMPH_OVERRIDE_EN; > intel_de_write(dev_priv, MG_TX2_DRVCTRL(ln, tc_port), val); > > @@ -1441,7 +1441,7 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port); > - const struct tgl_dkl_phy_ddi_buf_trans *ddi_translations; > + const union intel_ddi_buf_trans_entry *ddi_translations; > u32 val, dpcnt_mask, dpcnt_val; > int n_entries, ln; > > @@ -1461,9 +1461,9 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, > dpcnt_mask = (DKL_TX_PRESHOOT_COEFF_MASK | > DKL_TX_DE_EMPAHSIS_COEFF_MASK | > DKL_TX_VSWING_CONTROL_MASK); > - dpcnt_val = DKL_TX_VSWING_CONTROL(ddi_translations[level].dkl_vswing_control); > - dpcnt_val |= DKL_TX_DE_EMPHASIS_COEFF(ddi_translations[level].dkl_de_emphasis_control); > - dpcnt_val |= DKL_TX_PRESHOOT_COEFF(ddi_translations[level].dkl_preshoot_control); > + dpcnt_val = DKL_TX_VSWING_CONTROL(ddi_translations[level].dkl.dkl_vswing_control); > + dpcnt_val |= DKL_TX_DE_EMPHASIS_COEFF(ddi_translations[level].dkl.dkl_de_emphasis_control); > + dpcnt_val |= DKL_TX_PRESHOOT_COEFF(ddi_translations[level].dkl.dkl_preshoot_control); > > for (ln = 0; ln < 2; ln++) { > intel_de_write(dev_priv, HIP_INDEX_REG(tc_port), > diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > index f7b7178363e8..3f38267b7dd6 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c > @@ -13,761 +13,761 @@ > * them for both DP and FDI transports, allowing those ports to > * automatically adapt to HDMI connections as well > */ > -static const struct hsw_ddi_buf_trans hsw_ddi_translations_dp[] = { > - { 0x00FFFFFF, 0x0006000E, 0x0 }, > - { 0x00D75FFF, 0x0005000A, 0x0 }, > - { 0x00C30FFF, 0x00040006, 0x0 }, > - { 0x80AAAFFF, 0x000B0000, 0x0 }, > - { 0x00FFFFFF, 0x0005000A, 0x0 }, > - { 0x00D75FFF, 0x000C0004, 0x0 }, > - { 0x80C30FFF, 0x000B0000, 0x0 }, > - { 0x00FFFFFF, 0x00040006, 0x0 }, > - { 0x80D75FFF, 0x000B0000, 0x0 }, > +static const union intel_ddi_buf_trans_entry hsw_ddi_translations_dp[] = { > + { .hsw = { 0x00FFFFFF, 0x0006000E, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x0005000A, 0x0 } }, > + { .hsw = { 0x00C30FFF, 0x00040006, 0x0 } }, > + { .hsw = { 0x80AAAFFF, 0x000B0000, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x0005000A, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x000C0004, 0x0 } }, > + { .hsw = { 0x80C30FFF, 0x000B0000, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x00040006, 0x0 } }, > + { .hsw = { 0x80D75FFF, 0x000B0000, 0x0 } }, > }; > > -static const struct hsw_ddi_buf_trans hsw_ddi_translations_fdi[] = { > - { 0x00FFFFFF, 0x0007000E, 0x0 }, > - { 0x00D75FFF, 0x000F000A, 0x0 }, > - { 0x00C30FFF, 0x00060006, 0x0 }, > - { 0x00AAAFFF, 0x001E0000, 0x0 }, > - { 0x00FFFFFF, 0x000F000A, 0x0 }, > - { 0x00D75FFF, 0x00160004, 0x0 }, > - { 0x00C30FFF, 0x001E0000, 0x0 }, > - { 0x00FFFFFF, 0x00060006, 0x0 }, > - { 0x00D75FFF, 0x001E0000, 0x0 }, > +static const union intel_ddi_buf_trans_entry hsw_ddi_translations_fdi[] = { > + { .hsw = { 0x00FFFFFF, 0x0007000E, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x000F000A, 0x0 } }, > + { .hsw = { 0x00C30FFF, 0x00060006, 0x0 } }, > + { .hsw = { 0x00AAAFFF, 0x001E0000, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x000F000A, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x00160004, 0x0 } }, > + { .hsw = { 0x00C30FFF, 0x001E0000, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x00060006, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x001E0000, 0x0 } }, > }; > > -static const struct hsw_ddi_buf_trans hsw_ddi_translations_hdmi[] = { > - /* Idx NT mV d T mV d db */ > - { 0x00FFFFFF, 0x0006000E, 0x0 },/* 0: 400 400 0 */ > - { 0x00E79FFF, 0x000E000C, 0x0 },/* 1: 400 500 2 */ > - { 0x00D75FFF, 0x0005000A, 0x0 },/* 2: 400 600 3.5 */ > - { 0x00FFFFFF, 0x0005000A, 0x0 },/* 3: 600 600 0 */ > - { 0x00E79FFF, 0x001D0007, 0x0 },/* 4: 600 750 2 */ > - { 0x00D75FFF, 0x000C0004, 0x0 },/* 5: 600 900 3.5 */ > - { 0x00FFFFFF, 0x00040006, 0x0 },/* 6: 800 800 0 */ > - { 0x80E79FFF, 0x00030002, 0x0 },/* 7: 800 1000 2 */ > - { 0x00FFFFFF, 0x00140005, 0x0 },/* 8: 850 850 0 */ > - { 0x00FFFFFF, 0x000C0004, 0x0 },/* 9: 900 900 0 */ > - { 0x00FFFFFF, 0x001C0003, 0x0 },/* 10: 950 950 0 */ > - { 0x80FFFFFF, 0x00030002, 0x0 },/* 11: 1000 1000 0 */ > +static const union intel_ddi_buf_trans_entry hsw_ddi_translations_hdmi[] = { > + /* Idx NT mV d T mV d db */ > + { .hsw = { 0x00FFFFFF, 0x0006000E, 0x0 } }, /* 0: 400 400 0 */ > + { .hsw = { 0x00E79FFF, 0x000E000C, 0x0 } }, /* 1: 400 500 2 */ > + { .hsw = { 0x00D75FFF, 0x0005000A, 0x0 } }, /* 2: 400 600 3.5 */ > + { .hsw = { 0x00FFFFFF, 0x0005000A, 0x0 } }, /* 3: 600 600 0 */ > + { .hsw = { 0x00E79FFF, 0x001D0007, 0x0 } }, /* 4: 600 750 2 */ > + { .hsw = { 0x00D75FFF, 0x000C0004, 0x0 } }, /* 5: 600 900 3.5 */ > + { .hsw = { 0x00FFFFFF, 0x00040006, 0x0 } }, /* 6: 800 800 0 */ > + { .hsw = { 0x80E79FFF, 0x00030002, 0x0 } }, /* 7: 800 1000 2 */ > + { .hsw = { 0x00FFFFFF, 0x00140005, 0x0 } }, /* 8: 850 850 0 */ > + { .hsw = { 0x00FFFFFF, 0x000C0004, 0x0 } }, /* 9: 900 900 0 */ > + { .hsw = { 0x00FFFFFF, 0x001C0003, 0x0 } }, /* 10: 950 950 0 */ > + { .hsw = { 0x80FFFFFF, 0x00030002, 0x0 } }, /* 11: 1000 1000 0 */ > }; > > -static const struct hsw_ddi_buf_trans bdw_ddi_translations_edp[] = { > - { 0x00FFFFFF, 0x00000012, 0x0 }, > - { 0x00EBAFFF, 0x00020011, 0x0 }, > - { 0x00C71FFF, 0x0006000F, 0x0 }, > - { 0x00AAAFFF, 0x000E000A, 0x0 }, > - { 0x00FFFFFF, 0x00020011, 0x0 }, > - { 0x00DB6FFF, 0x0005000F, 0x0 }, > - { 0x00BEEFFF, 0x000A000C, 0x0 }, > - { 0x00FFFFFF, 0x0005000F, 0x0 }, > - { 0x00DB6FFF, 0x000A000C, 0x0 }, > +static const union intel_ddi_buf_trans_entry bdw_ddi_translations_edp[] = { > + { .hsw = { 0x00FFFFFF, 0x00000012, 0x0 } }, > + { .hsw = { 0x00EBAFFF, 0x00020011, 0x0 } }, > + { .hsw = { 0x00C71FFF, 0x0006000F, 0x0 } }, > + { .hsw = { 0x00AAAFFF, 0x000E000A, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x00020011, 0x0 } }, > + { .hsw = { 0x00DB6FFF, 0x0005000F, 0x0 } }, > + { .hsw = { 0x00BEEFFF, 0x000A000C, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x0005000F, 0x0 } }, > + { .hsw = { 0x00DB6FFF, 0x000A000C, 0x0 } }, > }; > > -static const struct hsw_ddi_buf_trans bdw_ddi_translations_dp[] = { > - { 0x00FFFFFF, 0x0007000E, 0x0 }, > - { 0x00D75FFF, 0x000E000A, 0x0 }, > - { 0x00BEFFFF, 0x00140006, 0x0 }, > - { 0x80B2CFFF, 0x001B0002, 0x0 }, > - { 0x00FFFFFF, 0x000E000A, 0x0 }, > - { 0x00DB6FFF, 0x00160005, 0x0 }, > - { 0x80C71FFF, 0x001A0002, 0x0 }, > - { 0x00F7DFFF, 0x00180004, 0x0 }, > - { 0x80D75FFF, 0x001B0002, 0x0 }, > +static const union intel_ddi_buf_trans_entry bdw_ddi_translations_dp[] = { > + { .hsw = { 0x00FFFFFF, 0x0007000E, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x000E000A, 0x0 } }, > + { .hsw = { 0x00BEFFFF, 0x00140006, 0x0 } }, > + { .hsw = { 0x80B2CFFF, 0x001B0002, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x000E000A, 0x0 } }, > + { .hsw = { 0x00DB6FFF, 0x00160005, 0x0 } }, > + { .hsw = { 0x80C71FFF, 0x001A0002, 0x0 } }, > + { .hsw = { 0x00F7DFFF, 0x00180004, 0x0 } }, > + { .hsw = { 0x80D75FFF, 0x001B0002, 0x0 } }, > }; > > -static const struct hsw_ddi_buf_trans bdw_ddi_translations_fdi[] = { > - { 0x00FFFFFF, 0x0001000E, 0x0 }, > - { 0x00D75FFF, 0x0004000A, 0x0 }, > - { 0x00C30FFF, 0x00070006, 0x0 }, > - { 0x00AAAFFF, 0x000C0000, 0x0 }, > - { 0x00FFFFFF, 0x0004000A, 0x0 }, > - { 0x00D75FFF, 0x00090004, 0x0 }, > - { 0x00C30FFF, 0x000C0000, 0x0 }, > - { 0x00FFFFFF, 0x00070006, 0x0 }, > - { 0x00D75FFF, 0x000C0000, 0x0 }, > +static const union intel_ddi_buf_trans_entry bdw_ddi_translations_fdi[] = { > + { .hsw = { 0x00FFFFFF, 0x0001000E, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x0004000A, 0x0 } }, > + { .hsw = { 0x00C30FFF, 0x00070006, 0x0 } }, > + { .hsw = { 0x00AAAFFF, 0x000C0000, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x0004000A, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x00090004, 0x0 } }, > + { .hsw = { 0x00C30FFF, 0x000C0000, 0x0 } }, > + { .hsw = { 0x00FFFFFF, 0x00070006, 0x0 } }, > + { .hsw = { 0x00D75FFF, 0x000C0000, 0x0 } }, > }; > > -static const struct hsw_ddi_buf_trans bdw_ddi_translations_hdmi[] = { > - /* Idx NT mV d T mV df db */ > - { 0x00FFFFFF, 0x0007000E, 0x0 },/* 0: 400 400 0 */ > - { 0x00D75FFF, 0x000E000A, 0x0 },/* 1: 400 600 3.5 */ > - { 0x00BEFFFF, 0x00140006, 0x0 },/* 2: 400 800 6 */ > - { 0x00FFFFFF, 0x0009000D, 0x0 },/* 3: 450 450 0 */ > - { 0x00FFFFFF, 0x000E000A, 0x0 },/* 4: 600 600 0 */ > - { 0x00D7FFFF, 0x00140006, 0x0 },/* 5: 600 800 2.5 */ > - { 0x80CB2FFF, 0x001B0002, 0x0 },/* 6: 600 1000 4.5 */ > - { 0x00FFFFFF, 0x00140006, 0x0 },/* 7: 800 800 0 */ > - { 0x80E79FFF, 0x001B0002, 0x0 },/* 8: 800 1000 2 */ > - { 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */ > +static const union intel_ddi_buf_trans_entry bdw_ddi_translations_hdmi[] = { > + /* Idx NT mV d T mV df db */ > + { .hsw = { 0x00FFFFFF, 0x0007000E, 0x0 } }, /* 0: 400 400 0 */ > + { .hsw = { 0x00D75FFF, 0x000E000A, 0x0 } }, /* 1: 400 600 3.5 */ > + { .hsw = { 0x00BEFFFF, 0x00140006, 0x0 } }, /* 2: 400 800 6 */ > + { .hsw = { 0x00FFFFFF, 0x0009000D, 0x0 } }, /* 3: 450 450 0 */ > + { .hsw = { 0x00FFFFFF, 0x000E000A, 0x0 } }, /* 4: 600 600 0 */ > + { .hsw = { 0x00D7FFFF, 0x00140006, 0x0 } }, /* 5: 600 800 2.5 */ > + { .hsw = { 0x80CB2FFF, 0x001B0002, 0x0 } }, /* 6: 600 1000 4.5 */ > + { .hsw = { 0x00FFFFFF, 0x00140006, 0x0 } }, /* 7: 800 800 0 */ > + { .hsw = { 0x80E79FFF, 0x001B0002, 0x0 } }, /* 8: 800 1000 2 */ > + { .hsw = { 0x80FFFFFF, 0x001B0002, 0x0 } }, /* 9: 1000 1000 0 */ > }; > > /* Skylake H and S */ > -static const struct hsw_ddi_buf_trans skl_ddi_translations_dp[] = { > - { 0x00002016, 0x000000A0, 0x0 }, > - { 0x00005012, 0x0000009B, 0x0 }, > - { 0x00007011, 0x00000088, 0x0 }, > - { 0x80009010, 0x000000C0, 0x1 }, > - { 0x00002016, 0x0000009B, 0x0 }, > - { 0x00005012, 0x00000088, 0x0 }, > - { 0x80007011, 0x000000C0, 0x1 }, > - { 0x00002016, 0x000000DF, 0x0 }, > - { 0x80005012, 0x000000C0, 0x1 }, > +static const union intel_ddi_buf_trans_entry skl_ddi_translations_dp[] = { > + { .hsw = { 0x00002016, 0x000000A0, 0x0 } }, > + { .hsw = { 0x00005012, 0x0000009B, 0x0 } }, > + { .hsw = { 0x00007011, 0x00000088, 0x0 } }, > + { .hsw = { 0x80009010, 0x000000C0, 0x1 } }, > + { .hsw = { 0x00002016, 0x0000009B, 0x0 } }, > + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, > + { .hsw = { 0x80007011, 0x000000C0, 0x1 } }, > + { .hsw = { 0x00002016, 0x000000DF, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x1 } }, > }; > > /* Skylake U */ > -static const struct hsw_ddi_buf_trans skl_u_ddi_translations_dp[] = { > - { 0x0000201B, 0x000000A2, 0x0 }, > - { 0x00005012, 0x00000088, 0x0 }, > - { 0x80007011, 0x000000CD, 0x1 }, > - { 0x80009010, 0x000000C0, 0x1 }, > - { 0x0000201B, 0x0000009D, 0x0 }, > - { 0x80005012, 0x000000C0, 0x1 }, > - { 0x80007011, 0x000000C0, 0x1 }, > - { 0x00002016, 0x00000088, 0x0 }, > - { 0x80005012, 0x000000C0, 0x1 }, > +static const union intel_ddi_buf_trans_entry skl_u_ddi_translations_dp[] = { > + { .hsw = { 0x0000201B, 0x000000A2, 0x0 } }, > + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, > + { .hsw = { 0x80007011, 0x000000CD, 0x1 } }, > + { .hsw = { 0x80009010, 0x000000C0, 0x1 } }, > + { .hsw = { 0x0000201B, 0x0000009D, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x1 } }, > + { .hsw = { 0x80007011, 0x000000C0, 0x1 } }, > + { .hsw = { 0x00002016, 0x00000088, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x1 } }, > }; > > /* Skylake Y */ > -static const struct hsw_ddi_buf_trans skl_y_ddi_translations_dp[] = { > - { 0x00000018, 0x000000A2, 0x0 }, > - { 0x00005012, 0x00000088, 0x0 }, > - { 0x80007011, 0x000000CD, 0x3 }, > - { 0x80009010, 0x000000C0, 0x3 }, > - { 0x00000018, 0x0000009D, 0x0 }, > - { 0x80005012, 0x000000C0, 0x3 }, > - { 0x80007011, 0x000000C0, 0x3 }, > - { 0x00000018, 0x00000088, 0x0 }, > - { 0x80005012, 0x000000C0, 0x3 }, > +static const union intel_ddi_buf_trans_entry skl_y_ddi_translations_dp[] = { > + { .hsw = { 0x00000018, 0x000000A2, 0x0 } }, > + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, > + { .hsw = { 0x80007011, 0x000000CD, 0x3 } }, > + { .hsw = { 0x80009010, 0x000000C0, 0x3 } }, > + { .hsw = { 0x00000018, 0x0000009D, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, > + { .hsw = { 0x80007011, 0x000000C0, 0x3 } }, > + { .hsw = { 0x00000018, 0x00000088, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, > }; > > /* Kabylake H and S */ > -static const struct hsw_ddi_buf_trans kbl_ddi_translations_dp[] = { > - { 0x00002016, 0x000000A0, 0x0 }, > - { 0x00005012, 0x0000009B, 0x0 }, > - { 0x00007011, 0x00000088, 0x0 }, > - { 0x80009010, 0x000000C0, 0x1 }, > - { 0x00002016, 0x0000009B, 0x0 }, > - { 0x00005012, 0x00000088, 0x0 }, > - { 0x80007011, 0x000000C0, 0x1 }, > - { 0x00002016, 0x00000097, 0x0 }, > - { 0x80005012, 0x000000C0, 0x1 }, > +static const union intel_ddi_buf_trans_entry kbl_ddi_translations_dp[] = { > + { .hsw = { 0x00002016, 0x000000A0, 0x0 } }, > + { .hsw = { 0x00005012, 0x0000009B, 0x0 } }, > + { .hsw = { 0x00007011, 0x00000088, 0x0 } }, > + { .hsw = { 0x80009010, 0x000000C0, 0x1 } }, > + { .hsw = { 0x00002016, 0x0000009B, 0x0 } }, > + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, > + { .hsw = { 0x80007011, 0x000000C0, 0x1 } }, > + { .hsw = { 0x00002016, 0x00000097, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x1 } }, > }; > > /* Kabylake U */ > -static const struct hsw_ddi_buf_trans kbl_u_ddi_translations_dp[] = { > - { 0x0000201B, 0x000000A1, 0x0 }, > - { 0x00005012, 0x00000088, 0x0 }, > - { 0x80007011, 0x000000CD, 0x3 }, > - { 0x80009010, 0x000000C0, 0x3 }, > - { 0x0000201B, 0x0000009D, 0x0 }, > - { 0x80005012, 0x000000C0, 0x3 }, > - { 0x80007011, 0x000000C0, 0x3 }, > - { 0x00002016, 0x0000004F, 0x0 }, > - { 0x80005012, 0x000000C0, 0x3 }, > +static const union intel_ddi_buf_trans_entry kbl_u_ddi_translations_dp[] = { > + { .hsw = { 0x0000201B, 0x000000A1, 0x0 } }, > + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, > + { .hsw = { 0x80007011, 0x000000CD, 0x3 } }, > + { .hsw = { 0x80009010, 0x000000C0, 0x3 } }, > + { .hsw = { 0x0000201B, 0x0000009D, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, > + { .hsw = { 0x80007011, 0x000000C0, 0x3 } }, > + { .hsw = { 0x00002016, 0x0000004F, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, > }; > > /* Kabylake Y */ > -static const struct hsw_ddi_buf_trans kbl_y_ddi_translations_dp[] = { > - { 0x00001017, 0x000000A1, 0x0 }, > - { 0x00005012, 0x00000088, 0x0 }, > - { 0x80007011, 0x000000CD, 0x3 }, > - { 0x8000800F, 0x000000C0, 0x3 }, > - { 0x00001017, 0x0000009D, 0x0 }, > - { 0x80005012, 0x000000C0, 0x3 }, > - { 0x80007011, 0x000000C0, 0x3 }, > - { 0x00001017, 0x0000004C, 0x0 }, > - { 0x80005012, 0x000000C0, 0x3 }, > +static const union intel_ddi_buf_trans_entry kbl_y_ddi_translations_dp[] = { > + { .hsw = { 0x00001017, 0x000000A1, 0x0 } }, > + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, > + { .hsw = { 0x80007011, 0x000000CD, 0x3 } }, > + { .hsw = { 0x8000800F, 0x000000C0, 0x3 } }, > + { .hsw = { 0x00001017, 0x0000009D, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, > + { .hsw = { 0x80007011, 0x000000C0, 0x3 } }, > + { .hsw = { 0x00001017, 0x0000004C, 0x0 } }, > + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, > }; > > /* > * Skylake/Kabylake H and S > * eDP 1.4 low vswing translation parameters > */ > -static const struct hsw_ddi_buf_trans skl_ddi_translations_edp[] = { > - { 0x00000018, 0x000000A8, 0x0 }, > - { 0x00004013, 0x000000A9, 0x0 }, > - { 0x00007011, 0x000000A2, 0x0 }, > - { 0x00009010, 0x0000009C, 0x0 }, > - { 0x00000018, 0x000000A9, 0x0 }, > - { 0x00006013, 0x000000A2, 0x0 }, > - { 0x00007011, 0x000000A6, 0x0 }, > - { 0x00000018, 0x000000AB, 0x0 }, > - { 0x00007013, 0x0000009F, 0x0 }, > - { 0x00000018, 0x000000DF, 0x0 }, > +static const union intel_ddi_buf_trans_entry skl_ddi_translations_edp[] = { > + { .hsw = { 0x00000018, 0x000000A8, 0x0 } }, > + { .hsw = { 0x00004013, 0x000000A9, 0x0 } }, > + { .hsw = { 0x00007011, 0x000000A2, 0x0 } }, > + { .hsw = { 0x00009010, 0x0000009C, 0x0 } }, > + { .hsw = { 0x00000018, 0x000000A9, 0x0 } }, > + { .hsw = { 0x00006013, 0x000000A2, 0x0 } }, > + { .hsw = { 0x00007011, 0x000000A6, 0x0 } }, > + { .hsw = { 0x00000018, 0x000000AB, 0x0 } }, > + { .hsw = { 0x00007013, 0x0000009F, 0x0 } }, > + { .hsw = { 0x00000018, 0x000000DF, 0x0 } }, > }; > > /* > * Skylake/Kabylake U > * eDP 1.4 low vswing translation parameters > */ > -static const struct hsw_ddi_buf_trans skl_u_ddi_translations_edp[] = { > - { 0x00000018, 0x000000A8, 0x0 }, > - { 0x00004013, 0x000000A9, 0x0 }, > - { 0x00007011, 0x000000A2, 0x0 }, > - { 0x00009010, 0x0000009C, 0x0 }, > - { 0x00000018, 0x000000A9, 0x0 }, > - { 0x00006013, 0x000000A2, 0x0 }, > - { 0x00007011, 0x000000A6, 0x0 }, > - { 0x00002016, 0x000000AB, 0x0 }, > - { 0x00005013, 0x0000009F, 0x0 }, > - { 0x00000018, 0x000000DF, 0x0 }, > +static const union intel_ddi_buf_trans_entry skl_u_ddi_translations_edp[] = { > + { .hsw = { 0x00000018, 0x000000A8, 0x0 } }, > + { .hsw = { 0x00004013, 0x000000A9, 0x0 } }, > + { .hsw = { 0x00007011, 0x000000A2, 0x0 } }, > + { .hsw = { 0x00009010, 0x0000009C, 0x0 } }, > + { .hsw = { 0x00000018, 0x000000A9, 0x0 } }, > + { .hsw = { 0x00006013, 0x000000A2, 0x0 } }, > + { .hsw = { 0x00007011, 0x000000A6, 0x0 } }, > + { .hsw = { 0x00002016, 0x000000AB, 0x0 } }, > + { .hsw = { 0x00005013, 0x0000009F, 0x0 } }, > + { .hsw = { 0x00000018, 0x000000DF, 0x0 } }, > }; > > /* > * Skylake/Kabylake Y > * eDP 1.4 low vswing translation parameters > */ > -static const struct hsw_ddi_buf_trans skl_y_ddi_translations_edp[] = { > - { 0x00000018, 0x000000A8, 0x0 }, > - { 0x00004013, 0x000000AB, 0x0 }, > - { 0x00007011, 0x000000A4, 0x0 }, > - { 0x00009010, 0x000000DF, 0x0 }, > - { 0x00000018, 0x000000AA, 0x0 }, > - { 0x00006013, 0x000000A4, 0x0 }, > - { 0x00007011, 0x0000009D, 0x0 }, > - { 0x00000018, 0x000000A0, 0x0 }, > - { 0x00006012, 0x000000DF, 0x0 }, > - { 0x00000018, 0x0000008A, 0x0 }, > +static const union intel_ddi_buf_trans_entry skl_y_ddi_translations_edp[] = { > + { .hsw = { 0x00000018, 0x000000A8, 0x0 } }, > + { .hsw = { 0x00004013, 0x000000AB, 0x0 } }, > + { .hsw = { 0x00007011, 0x000000A4, 0x0 } }, > + { .hsw = { 0x00009010, 0x000000DF, 0x0 } }, > + { .hsw = { 0x00000018, 0x000000AA, 0x0 } }, > + { .hsw = { 0x00006013, 0x000000A4, 0x0 } }, > + { .hsw = { 0x00007011, 0x0000009D, 0x0 } }, > + { .hsw = { 0x00000018, 0x000000A0, 0x0 } }, > + { .hsw = { 0x00006012, 0x000000DF, 0x0 } }, > + { .hsw = { 0x00000018, 0x0000008A, 0x0 } }, > }; > > /* Skylake/Kabylake U, H and S */ > -static const struct hsw_ddi_buf_trans skl_ddi_translations_hdmi[] = { > - { 0x00000018, 0x000000AC, 0x0 }, > - { 0x00005012, 0x0000009D, 0x0 }, > - { 0x00007011, 0x00000088, 0x0 }, > - { 0x00000018, 0x000000A1, 0x0 }, > - { 0x00000018, 0x00000098, 0x0 }, > - { 0x00004013, 0x00000088, 0x0 }, > - { 0x80006012, 0x000000CD, 0x1 }, > - { 0x00000018, 0x000000DF, 0x0 }, > - { 0x80003015, 0x000000CD, 0x1 }, /* Default */ > - { 0x80003015, 0x000000C0, 0x1 }, > - { 0x80000018, 0x000000C0, 0x1 }, > +static const union intel_ddi_buf_trans_entry skl_ddi_translations_hdmi[] = { > + { .hsw = { 0x00000018, 0x000000AC, 0x0 } }, > + { .hsw = { 0x00005012, 0x0000009D, 0x0 } }, > + { .hsw = { 0x00007011, 0x00000088, 0x0 } }, > + { .hsw = { 0x00000018, 0x000000A1, 0x0 } }, > + { .hsw = { 0x00000018, 0x00000098, 0x0 } }, > + { .hsw = { 0x00004013, 0x00000088, 0x0 } }, > + { .hsw = { 0x80006012, 0x000000CD, 0x1 } }, > + { .hsw = { 0x00000018, 0x000000DF, 0x0 } }, > + { .hsw = { 0x80003015, 0x000000CD, 0x1 } }, /* Default */ > + { .hsw = { 0x80003015, 0x000000C0, 0x1 } }, > + { .hsw = { 0x80000018, 0x000000C0, 0x1 } }, > }; > > /* Skylake/Kabylake Y */ > -static const struct hsw_ddi_buf_trans skl_y_ddi_translations_hdmi[] = { > - { 0x00000018, 0x000000A1, 0x0 }, > - { 0x00005012, 0x000000DF, 0x0 }, > - { 0x80007011, 0x000000CB, 0x3 }, > - { 0x00000018, 0x000000A4, 0x0 }, > - { 0x00000018, 0x0000009D, 0x0 }, > - { 0x00004013, 0x00000080, 0x0 }, > - { 0x80006013, 0x000000C0, 0x3 }, > - { 0x00000018, 0x0000008A, 0x0 }, > - { 0x80003015, 0x000000C0, 0x3 }, /* Default */ > - { 0x80003015, 0x000000C0, 0x3 }, > - { 0x80000018, 0x000000C0, 0x3 }, > +static const union intel_ddi_buf_trans_entry skl_y_ddi_translations_hdmi[] = { > + { .hsw = { 0x00000018, 0x000000A1, 0x0 } }, > + { .hsw = { 0x00005012, 0x000000DF, 0x0 } }, > + { .hsw = { 0x80007011, 0x000000CB, 0x3 } }, > + { .hsw = { 0x00000018, 0x000000A4, 0x0 } }, > + { .hsw = { 0x00000018, 0x0000009D, 0x0 } }, > + { .hsw = { 0x00004013, 0x00000080, 0x0 } }, > + { .hsw = { 0x80006013, 0x000000C0, 0x3 } }, > + { .hsw = { 0x00000018, 0x0000008A, 0x0 } }, > + { .hsw = { 0x80003015, 0x000000C0, 0x3 } }, /* Default */ > + { .hsw = { 0x80003015, 0x000000C0, 0x3 } }, > + { .hsw = { 0x80000018, 0x000000C0, 0x3 } }, > }; > > -static const struct bxt_ddi_buf_trans bxt_ddi_translations_dp[] = { > - /* Idx NT mV diff db */ > - { 52, 0x9A, 0, 128, }, /* 0: 400 0 */ > - { 78, 0x9A, 0, 85, }, /* 1: 400 3.5 */ > - { 104, 0x9A, 0, 64, }, /* 2: 400 6 */ > - { 154, 0x9A, 0, 43, }, /* 3: 400 9.5 */ > - { 77, 0x9A, 0, 128, }, /* 4: 600 0 */ > - { 116, 0x9A, 0, 85, }, /* 5: 600 3.5 */ > - { 154, 0x9A, 0, 64, }, /* 6: 600 6 */ > - { 102, 0x9A, 0, 128, }, /* 7: 800 0 */ > - { 154, 0x9A, 0, 85, }, /* 8: 800 3.5 */ > - { 154, 0x9A, 1, 128, }, /* 9: 1200 0 */ > +static const union intel_ddi_buf_trans_entry bxt_ddi_translations_dp[] = { > + /* Idx NT mV diff db */ > + { .bxt = { 52, 0x9A, 0, 128, } }, /* 0: 400 0 */ > + { .bxt = { 78, 0x9A, 0, 85, } }, /* 1: 400 3.5 */ > + { .bxt = { 104, 0x9A, 0, 64, } }, /* 2: 400 6 */ > + { .bxt = { 154, 0x9A, 0, 43, } }, /* 3: 400 9.5 */ > + { .bxt = { 77, 0x9A, 0, 128, } }, /* 4: 600 0 */ > + { .bxt = { 116, 0x9A, 0, 85, } }, /* 5: 600 3.5 */ > + { .bxt = { 154, 0x9A, 0, 64, } }, /* 6: 600 6 */ > + { .bxt = { 102, 0x9A, 0, 128, } }, /* 7: 800 0 */ > + { .bxt = { 154, 0x9A, 0, 85, } }, /* 8: 800 3.5 */ > + { .bxt = { 154, 0x9A, 1, 128, } }, /* 9: 1200 0 */ > }; > > -static const struct bxt_ddi_buf_trans bxt_ddi_translations_edp[] = { > +static const union intel_ddi_buf_trans_entry bxt_ddi_translations_edp[] = { > /* Idx NT mV diff db */ > - { 26, 0, 0, 128, }, /* 0: 200 0 */ > - { 38, 0, 0, 112, }, /* 1: 200 1.5 */ > - { 48, 0, 0, 96, }, /* 2: 200 4 */ > - { 54, 0, 0, 69, }, /* 3: 200 6 */ > - { 32, 0, 0, 128, }, /* 4: 250 0 */ > - { 48, 0, 0, 104, }, /* 5: 250 1.5 */ > - { 54, 0, 0, 85, }, /* 6: 250 4 */ > - { 43, 0, 0, 128, }, /* 7: 300 0 */ > - { 54, 0, 0, 101, }, /* 8: 300 1.5 */ > - { 48, 0, 0, 128, }, /* 9: 300 0 */ > + { .bxt = { 26, 0, 0, 128, } }, /* 0: 200 0 */ > + { .bxt = { 38, 0, 0, 112, } }, /* 1: 200 1.5 */ > + { .bxt = { 48, 0, 0, 96, } }, /* 2: 200 4 */ > + { .bxt = { 54, 0, 0, 69, } }, /* 3: 200 6 */ > + { .bxt = { 32, 0, 0, 128, } }, /* 4: 250 0 */ > + { .bxt = { 48, 0, 0, 104, } }, /* 5: 250 1.5 */ > + { .bxt = { 54, 0, 0, 85, } }, /* 6: 250 4 */ > + { .bxt = { 43, 0, 0, 128, } }, /* 7: 300 0 */ > + { .bxt = { 54, 0, 0, 101, } }, /* 8: 300 1.5 */ > + { .bxt = { 48, 0, 0, 128, } }, /* 9: 300 0 */ > }; > > /* BSpec has 2 recommended values - entries 0 and 8. > * Using the entry with higher vswing. > */ > -static const struct bxt_ddi_buf_trans bxt_ddi_translations_hdmi[] = { > - /* Idx NT mV diff db */ > - { 52, 0x9A, 0, 128, }, /* 0: 400 0 */ > - { 52, 0x9A, 0, 85, }, /* 1: 400 3.5 */ > - { 52, 0x9A, 0, 64, }, /* 2: 400 6 */ > - { 42, 0x9A, 0, 43, }, /* 3: 400 9.5 */ > - { 77, 0x9A, 0, 128, }, /* 4: 600 0 */ > - { 77, 0x9A, 0, 85, }, /* 5: 600 3.5 */ > - { 77, 0x9A, 0, 64, }, /* 6: 600 6 */ > - { 102, 0x9A, 0, 128, }, /* 7: 800 0 */ > - { 102, 0x9A, 0, 85, }, /* 8: 800 3.5 */ > - { 154, 0x9A, 1, 128, }, /* 9: 1200 0 */ > +static const union intel_ddi_buf_trans_entry bxt_ddi_translations_hdmi[] = { > + /* Idx NT mV diff db */ > + { .bxt = { 52, 0x9A, 0, 128, } }, /* 0: 400 0 */ > + { .bxt = { 52, 0x9A, 0, 85, } }, /* 1: 400 3.5 */ > + { .bxt = { 52, 0x9A, 0, 64, } }, /* 2: 400 6 */ > + { .bxt = { 42, 0x9A, 0, 43, } }, /* 3: 400 9.5 */ > + { .bxt = { 77, 0x9A, 0, 128, } }, /* 4: 600 0 */ > + { .bxt = { 77, 0x9A, 0, 85, } }, /* 5: 600 3.5 */ > + { .bxt = { 77, 0x9A, 0, 64, } }, /* 6: 600 6 */ > + { .bxt = { 102, 0x9A, 0, 128, } }, /* 7: 800 0 */ > + { .bxt = { 102, 0x9A, 0, 85, } }, /* 8: 800 3.5 */ > + { .bxt = { 154, 0x9A, 1, 128, } }, /* 9: 1200 0 */ > }; > > /* Voltage Swing Programming for VccIO 0.85V for DP */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_dp_0_85V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x5D, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x6A, 0x38, 0x00, 0x07 }, /* 350 500 3.1 */ > - { 0xB, 0x7A, 0x32, 0x00, 0x0D }, /* 350 700 6.0 */ > - { 0x6, 0x7C, 0x2D, 0x00, 0x12 }, /* 350 900 8.2 */ > - { 0xA, 0x69, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xB, 0x7A, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ > - { 0x6, 0x7C, 0x30, 0x00, 0x0F }, /* 500 900 5.1 */ > - { 0xB, 0x7D, 0x3C, 0x00, 0x03 }, /* 650 725 0.9 */ > - { 0x6, 0x7C, 0x34, 0x00, 0x0B }, /* 600 900 3.5 */ > - { 0x6, 0x7B, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_dp_0_85V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x5D, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x6A, 0x38, 0x00, 0x07 } }, /* 350 500 3.1 */ > + { .cnl = { 0xB, 0x7A, 0x32, 0x00, 0x0D } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7C, 0x2D, 0x00, 0x12 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x69, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xB, 0x7A, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7C, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ > + { .cnl = { 0xB, 0x7D, 0x3C, 0x00, 0x03 } }, /* 650 725 0.9 */ > + { .cnl = { 0x6, 0x7C, 0x34, 0x00, 0x0B } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7B, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > }; > > /* Voltage Swing Programming for VccIO 0.85V for HDMI */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_hdmi_0_85V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x60, 0x3F, 0x00, 0x00 }, /* 450 450 0.0 */ > - { 0xB, 0x73, 0x36, 0x00, 0x09 }, /* 450 650 3.2 */ > - { 0x6, 0x7F, 0x31, 0x00, 0x0E }, /* 450 850 5.5 */ > - { 0xB, 0x73, 0x3F, 0x00, 0x00 }, /* 650 650 0.0 */ > - { 0x6, 0x7F, 0x37, 0x00, 0x08 }, /* 650 850 2.3 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 850 850 0.0 */ > - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_hdmi_0_85V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x60, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ > + { .cnl = { 0xB, 0x73, 0x36, 0x00, 0x09 } }, /* 450 650 3.2 */ > + { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } }, /* 450 850 5.5 */ > + { .cnl = { 0xB, 0x73, 0x3F, 0x00, 0x00 } }, /* 650 650 0.0 */ > + { .cnl = { 0x6, 0x7F, 0x37, 0x00, 0x08 } }, /* 650 850 2.3 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 850 850 0.0 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ > }; > > /* Voltage Swing Programming for VccIO 0.85V for eDP */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_edp_0_85V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x66, 0x3A, 0x00, 0x05 }, /* 384 500 2.3 */ > - { 0x0, 0x7F, 0x38, 0x00, 0x07 }, /* 153 200 2.3 */ > - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 192 250 2.3 */ > - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 230 300 2.3 */ > - { 0x9, 0x7F, 0x38, 0x00, 0x07 }, /* 269 350 2.3 */ > - { 0xA, 0x66, 0x3C, 0x00, 0x03 }, /* 446 500 1.0 */ > - { 0xB, 0x70, 0x3C, 0x00, 0x03 }, /* 460 600 2.3 */ > - { 0xC, 0x75, 0x3C, 0x00, 0x03 }, /* 537 700 2.3 */ > - { 0x2, 0x7F, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_edp_0_85V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x66, 0x3A, 0x00, 0x05 } }, /* 384 500 2.3 */ > + { .cnl = { 0x0, 0x7F, 0x38, 0x00, 0x07 } }, /* 153 200 2.3 */ > + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 192 250 2.3 */ > + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 230 300 2.3 */ > + { .cnl = { 0x9, 0x7F, 0x38, 0x00, 0x07 } }, /* 269 350 2.3 */ > + { .cnl = { 0xA, 0x66, 0x3C, 0x00, 0x03 } }, /* 446 500 1.0 */ > + { .cnl = { 0xB, 0x70, 0x3C, 0x00, 0x03 } }, /* 460 600 2.3 */ > + { .cnl = { 0xC, 0x75, 0x3C, 0x00, 0x03 } }, /* 537 700 2.3 */ > + { .cnl = { 0x2, 0x7F, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ > }; > > /* Voltage Swing Programming for VccIO 0.95V for DP */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_dp_0_95V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x5D, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x6A, 0x38, 0x00, 0x07 }, /* 350 500 3.1 */ > - { 0xB, 0x7A, 0x32, 0x00, 0x0D }, /* 350 700 6.0 */ > - { 0x6, 0x7C, 0x2D, 0x00, 0x12 }, /* 350 900 8.2 */ > - { 0xA, 0x69, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xB, 0x7A, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ > - { 0x6, 0x7C, 0x30, 0x00, 0x0F }, /* 500 900 5.1 */ > - { 0xB, 0x7D, 0x3C, 0x00, 0x03 }, /* 650 725 0.9 */ > - { 0x6, 0x7C, 0x34, 0x00, 0x0B }, /* 600 900 3.5 */ > - { 0x6, 0x7B, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_dp_0_95V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x5D, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x6A, 0x38, 0x00, 0x07 } }, /* 350 500 3.1 */ > + { .cnl = { 0xB, 0x7A, 0x32, 0x00, 0x0D } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7C, 0x2D, 0x00, 0x12 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x69, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xB, 0x7A, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7C, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ > + { .cnl = { 0xB, 0x7D, 0x3C, 0x00, 0x03 } }, /* 650 725 0.9 */ > + { .cnl = { 0x6, 0x7C, 0x34, 0x00, 0x0B } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7B, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > }; > > /* Voltage Swing Programming for VccIO 0.95V for HDMI */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_hdmi_0_95V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x5C, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ > - { 0xB, 0x69, 0x37, 0x00, 0x08 }, /* 400 600 3.5 */ > - { 0x5, 0x76, 0x31, 0x00, 0x0E }, /* 400 800 6.0 */ > - { 0xA, 0x5E, 0x3F, 0x00, 0x00 }, /* 450 450 0.0 */ > - { 0xB, 0x69, 0x3F, 0x00, 0x00 }, /* 600 600 0.0 */ > - { 0xB, 0x79, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ > - { 0x6, 0x7D, 0x32, 0x00, 0x0D }, /* 600 1000 4.4 */ > - { 0x5, 0x76, 0x3F, 0x00, 0x00 }, /* 800 800 0.0 */ > - { 0x6, 0x7D, 0x39, 0x00, 0x06 }, /* 800 1000 1.9 */ > - { 0x6, 0x7F, 0x39, 0x00, 0x06 }, /* 850 1050 1.8 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1050 1050 0.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_hdmi_0_95V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x5C, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ > + { .cnl = { 0xB, 0x69, 0x37, 0x00, 0x08 } }, /* 400 600 3.5 */ > + { .cnl = { 0x5, 0x76, 0x31, 0x00, 0x0E } }, /* 400 800 6.0 */ > + { .cnl = { 0xA, 0x5E, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ > + { .cnl = { 0xB, 0x69, 0x3F, 0x00, 0x00 } }, /* 600 600 0.0 */ > + { .cnl = { 0xB, 0x79, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ > + { .cnl = { 0x6, 0x7D, 0x32, 0x00, 0x0D } }, /* 600 1000 4.4 */ > + { .cnl = { 0x5, 0x76, 0x3F, 0x00, 0x00 } }, /* 800 800 0.0 */ > + { .cnl = { 0x6, 0x7D, 0x39, 0x00, 0x06 } }, /* 800 1000 1.9 */ > + { .cnl = { 0x6, 0x7F, 0x39, 0x00, 0x06 } }, /* 850 1050 1.8 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1050 1050 0.0 */ > }; > > /* Voltage Swing Programming for VccIO 0.95V for eDP */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_edp_0_95V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x61, 0x3A, 0x00, 0x05 }, /* 384 500 2.3 */ > - { 0x0, 0x7F, 0x38, 0x00, 0x07 }, /* 153 200 2.3 */ > - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 192 250 2.3 */ > - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 230 300 2.3 */ > - { 0x9, 0x7F, 0x38, 0x00, 0x07 }, /* 269 350 2.3 */ > - { 0xA, 0x61, 0x3C, 0x00, 0x03 }, /* 446 500 1.0 */ > - { 0xB, 0x68, 0x39, 0x00, 0x06 }, /* 460 600 2.3 */ > - { 0xC, 0x6E, 0x39, 0x00, 0x06 }, /* 537 700 2.3 */ > - { 0x4, 0x7F, 0x3A, 0x00, 0x05 }, /* 460 600 2.3 */ > - { 0x2, 0x7F, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_edp_0_95V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x61, 0x3A, 0x00, 0x05 } }, /* 384 500 2.3 */ > + { .cnl = { 0x0, 0x7F, 0x38, 0x00, 0x07 } }, /* 153 200 2.3 */ > + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 192 250 2.3 */ > + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 230 300 2.3 */ > + { .cnl = { 0x9, 0x7F, 0x38, 0x00, 0x07 } }, /* 269 350 2.3 */ > + { .cnl = { 0xA, 0x61, 0x3C, 0x00, 0x03 } }, /* 446 500 1.0 */ > + { .cnl = { 0xB, 0x68, 0x39, 0x00, 0x06 } }, /* 460 600 2.3 */ > + { .cnl = { 0xC, 0x6E, 0x39, 0x00, 0x06 } }, /* 537 700 2.3 */ > + { .cnl = { 0x4, 0x7F, 0x3A, 0x00, 0x05 } }, /* 460 600 2.3 */ > + { .cnl = { 0x2, 0x7F, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ > }; > > /* Voltage Swing Programming for VccIO 1.05V for DP */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_dp_1_05V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x58, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ > - { 0xB, 0x64, 0x37, 0x00, 0x08 }, /* 400 600 3.5 */ > - { 0x5, 0x70, 0x31, 0x00, 0x0E }, /* 400 800 6.0 */ > - { 0x6, 0x7F, 0x2C, 0x00, 0x13 }, /* 400 1050 8.4 */ > - { 0xB, 0x64, 0x3F, 0x00, 0x00 }, /* 600 600 0.0 */ > - { 0x5, 0x73, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ > - { 0x6, 0x7F, 0x30, 0x00, 0x0F }, /* 550 1050 5.6 */ > - { 0x5, 0x76, 0x3E, 0x00, 0x01 }, /* 850 900 0.5 */ > - { 0x6, 0x7F, 0x36, 0x00, 0x09 }, /* 750 1050 2.9 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1050 1050 0.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_dp_1_05V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x58, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ > + { .cnl = { 0xB, 0x64, 0x37, 0x00, 0x08 } }, /* 400 600 3.5 */ > + { .cnl = { 0x5, 0x70, 0x31, 0x00, 0x0E } }, /* 400 800 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 400 1050 8.4 */ > + { .cnl = { 0xB, 0x64, 0x3F, 0x00, 0x00 } }, /* 600 600 0.0 */ > + { .cnl = { 0x5, 0x73, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ > + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 550 1050 5.6 */ > + { .cnl = { 0x5, 0x76, 0x3E, 0x00, 0x01 } }, /* 850 900 0.5 */ > + { .cnl = { 0x6, 0x7F, 0x36, 0x00, 0x09 } }, /* 750 1050 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1050 1050 0.0 */ > }; > > /* Voltage Swing Programming for VccIO 1.05V for HDMI */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_hdmi_1_05V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x58, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ > - { 0xB, 0x64, 0x37, 0x00, 0x08 }, /* 400 600 3.5 */ > - { 0x5, 0x70, 0x31, 0x00, 0x0E }, /* 400 800 6.0 */ > - { 0xA, 0x5B, 0x3F, 0x00, 0x00 }, /* 450 450 0.0 */ > - { 0xB, 0x64, 0x3F, 0x00, 0x00 }, /* 600 600 0.0 */ > - { 0x5, 0x73, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ > - { 0x6, 0x7C, 0x32, 0x00, 0x0D }, /* 600 1000 4.4 */ > - { 0x5, 0x70, 0x3F, 0x00, 0x00 }, /* 800 800 0.0 */ > - { 0x6, 0x7C, 0x39, 0x00, 0x06 }, /* 800 1000 1.9 */ > - { 0x6, 0x7F, 0x39, 0x00, 0x06 }, /* 850 1050 1.8 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1050 1050 0.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_hdmi_1_05V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x58, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ > + { .cnl = { 0xB, 0x64, 0x37, 0x00, 0x08 } }, /* 400 600 3.5 */ > + { .cnl = { 0x5, 0x70, 0x31, 0x00, 0x0E } }, /* 400 800 6.0 */ > + { .cnl = { 0xA, 0x5B, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ > + { .cnl = { 0xB, 0x64, 0x3F, 0x00, 0x00 } }, /* 600 600 0.0 */ > + { .cnl = { 0x5, 0x73, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ > + { .cnl = { 0x6, 0x7C, 0x32, 0x00, 0x0D } }, /* 600 1000 4.4 */ > + { .cnl = { 0x5, 0x70, 0x3F, 0x00, 0x00 } }, /* 800 800 0.0 */ > + { .cnl = { 0x6, 0x7C, 0x39, 0x00, 0x06 } }, /* 800 1000 1.9 */ > + { .cnl = { 0x6, 0x7F, 0x39, 0x00, 0x06 } }, /* 850 1050 1.8 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1050 1050 0.0 */ > }; > > /* Voltage Swing Programming for VccIO 1.05V for eDP */ > -static const struct cnl_ddi_buf_trans cnl_ddi_translations_edp_1_05V[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x5E, 0x3A, 0x00, 0x05 }, /* 384 500 2.3 */ > - { 0x0, 0x7F, 0x38, 0x00, 0x07 }, /* 153 200 2.3 */ > - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 192 250 2.3 */ > - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 230 300 2.3 */ > - { 0x9, 0x7F, 0x38, 0x00, 0x07 }, /* 269 350 2.3 */ > - { 0xA, 0x5E, 0x3C, 0x00, 0x03 }, /* 446 500 1.0 */ > - { 0xB, 0x64, 0x39, 0x00, 0x06 }, /* 460 600 2.3 */ > - { 0xE, 0x6A, 0x39, 0x00, 0x06 }, /* 537 700 2.3 */ > - { 0x2, 0x7F, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ > +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_edp_1_05V[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x5E, 0x3A, 0x00, 0x05 } }, /* 384 500 2.3 */ > + { .cnl = { 0x0, 0x7F, 0x38, 0x00, 0x07 } }, /* 153 200 2.3 */ > + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 192 250 2.3 */ > + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 230 300 2.3 */ > + { .cnl = { 0x9, 0x7F, 0x38, 0x00, 0x07 } }, /* 269 350 2.3 */ > + { .cnl = { 0xA, 0x5E, 0x3C, 0x00, 0x03 } }, /* 446 500 1.0 */ > + { .cnl = { 0xB, 0x64, 0x39, 0x00, 0x06 } }, /* 460 600 2.3 */ > + { .cnl = { 0xE, 0x6A, 0x39, 0x00, 0x06 } }, /* 537 700 2.3 */ > + { .cnl = { 0x2, 0x7F, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ > }; > > /* icl_combo_phy_ddi_translations */ > -static const struct cnl_ddi_buf_trans icl_combo_phy_ddi_translations_dp_hbr2[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ > - { 0xC, 0x71, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ > - { 0x6, 0x7F, 0x2B, 0x00, 0x14 }, /* 350 900 8.2 */ > - { 0xA, 0x4C, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x73, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ > - { 0xC, 0x6C, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ > - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans icl_combo_phy_ddi_translations_edp_hbr2[] = { > - /* NT mV Trans mV db */ > - { 0x0, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ > - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 200 250 1.9 */ > - { 0x1, 0x7F, 0x33, 0x00, 0x0C }, /* 200 300 3.5 */ > - { 0x9, 0x7F, 0x31, 0x00, 0x0E }, /* 200 350 4.9 */ > - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ > - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 250 300 1.6 */ > - { 0x9, 0x7F, 0x35, 0x00, 0x0A }, /* 250 350 2.9 */ > - { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ > - { 0x9, 0x7F, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ > - { 0x9, 0x7F, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans icl_combo_phy_ddi_translations_edp_hbr3[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ > - { 0xC, 0x71, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ > - { 0x6, 0x7F, 0x2B, 0x00, 0x14 }, /* 350 900 8.2 */ > - { 0xA, 0x4C, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x73, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ > - { 0xC, 0x6C, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ > - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans icl_combo_phy_ddi_translations_hdmi[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x60, 0x3F, 0x00, 0x00 }, /* 450 450 0.0 */ > - { 0xB, 0x73, 0x36, 0x00, 0x09 }, /* 450 650 3.2 */ > - { 0x6, 0x7F, 0x31, 0x00, 0x0E }, /* 450 850 5.5 */ > - { 0xB, 0x73, 0x3F, 0x00, 0x00 }, /* 650 650 0.0 ALS */ > - { 0x6, 0x7F, 0x37, 0x00, 0x08 }, /* 650 850 2.3 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 850 850 0.0 */ > - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans ehl_combo_phy_ddi_translations_dp[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x33, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x47, 0x36, 0x00, 0x09 }, /* 350 500 3.1 */ > - { 0xC, 0x64, 0x34, 0x00, 0x0B }, /* 350 700 6.0 */ > - { 0x6, 0x7F, 0x30, 0x00, 0x0F }, /* 350 900 8.2 */ > - { 0xA, 0x46, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x64, 0x38, 0x00, 0x07 }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x32, 0x00, 0x0D }, /* 500 900 5.1 */ > - { 0xC, 0x61, 0x3F, 0x00, 0x00 }, /* 650 700 0.6 */ > - { 0x6, 0x7F, 0x38, 0x00, 0x07 }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr[] = { > - /* NT mV Trans mV db */ > - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ > - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 200 250 1.9 */ > - { 0x1, 0x7F, 0x33, 0x00, 0x0C }, /* 200 300 3.5 */ > - { 0xA, 0x35, 0x36, 0x00, 0x09 }, /* 200 350 4.9 */ > - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ > - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 250 300 1.6 */ > - { 0xA, 0x35, 0x35, 0x00, 0x0A }, /* 250 350 2.9 */ > - { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ > - { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ > - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr2[] = { > - /* NT mV Trans mV db */ > - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ > - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 250 1.9 */ > - { 0x1, 0x7F, 0x3D, 0x00, 0x02 }, /* 200 300 3.5 */ > - { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 200 350 4.9 */ > - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ > - { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 300 1.6 */ > - { 0xA, 0x35, 0x3A, 0x00, 0x05 }, /* 250 350 2.9 */ > - { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ > - { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ > - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans dg1_combo_phy_ddi_translations_dp_rbr_hbr[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x32, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x48, 0x35, 0x00, 0x0A }, /* 350 500 3.1 */ > - { 0xC, 0x63, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ > - { 0x6, 0x7F, 0x2C, 0x00, 0x13 }, /* 350 900 8.2 */ > - { 0xA, 0x43, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x60, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x30, 0x00, 0x0F }, /* 500 900 5.1 */ > - { 0xC, 0x60, 0x3F, 0x00, 0x00 }, /* 650 700 0.6 */ > - { 0x6, 0x7F, 0x37, 0x00, 0x08 }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans dg1_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x32, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x48, 0x35, 0x00, 0x0A }, /* 350 500 3.1 */ > - { 0xC, 0x63, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ > - { 0x6, 0x7F, 0x2C, 0x00, 0x13 }, /* 350 900 8.2 */ > - { 0xA, 0x43, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x60, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x30, 0x00, 0x0F }, /* 500 900 5.1 */ > - { 0xC, 0x58, 0x3F, 0x00, 0x00 }, /* 650 700 0.6 */ > - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > -}; > - > -static const struct icl_mg_phy_ddi_buf_trans icl_mg_phy_ddi_translations_rbr_hbr[] = { > - /* Voltage swing pre-emphasis */ > - { 0x18, 0x00, 0x00 }, /* 0 0 */ > - { 0x1D, 0x00, 0x05 }, /* 0 1 */ > - { 0x24, 0x00, 0x0C }, /* 0 2 */ > - { 0x2B, 0x00, 0x14 }, /* 0 3 */ > - { 0x21, 0x00, 0x00 }, /* 1 0 */ > - { 0x2B, 0x00, 0x08 }, /* 1 1 */ > - { 0x30, 0x00, 0x0F }, /* 1 2 */ > - { 0x31, 0x00, 0x03 }, /* 2 0 */ > - { 0x34, 0x00, 0x0B }, /* 2 1 */ > - { 0x3F, 0x00, 0x00 }, /* 3 0 */ > -}; > - > -static const struct icl_mg_phy_ddi_buf_trans icl_mg_phy_ddi_translations_hbr2_hbr3[] = { > - /* Voltage swing pre-emphasis */ > - { 0x18, 0x00, 0x00 }, /* 0 0 */ > - { 0x1D, 0x00, 0x05 }, /* 0 1 */ > - { 0x24, 0x00, 0x0C }, /* 0 2 */ > - { 0x2B, 0x00, 0x14 }, /* 0 3 */ > - { 0x26, 0x00, 0x00 }, /* 1 0 */ > - { 0x2C, 0x00, 0x07 }, /* 1 1 */ > - { 0x33, 0x00, 0x0C }, /* 1 2 */ > - { 0x2E, 0x00, 0x00 }, /* 2 0 */ > - { 0x36, 0x00, 0x09 }, /* 2 1 */ > - { 0x3F, 0x00, 0x00 }, /* 3 0 */ > -}; > - > -static const struct icl_mg_phy_ddi_buf_trans icl_mg_phy_ddi_translations_hdmi[] = { > - /* HDMI Preset VS Pre-emph */ > - { 0x1A, 0x0, 0x0 }, /* 1 400mV 0dB */ > - { 0x20, 0x0, 0x0 }, /* 2 500mV 0dB */ > - { 0x29, 0x0, 0x0 }, /* 3 650mV 0dB */ > - { 0x32, 0x0, 0x0 }, /* 4 800mV 0dB */ > - { 0x3F, 0x0, 0x0 }, /* 5 1000mV 0dB */ > - { 0x3A, 0x0, 0x5 }, /* 6 Full -1.5 dB */ > - { 0x39, 0x0, 0x6 }, /* 7 Full -1.8 dB */ > - { 0x38, 0x0, 0x7 }, /* 8 Full -2 dB */ > - { 0x37, 0x0, 0x8 }, /* 9 Full -2.5 dB */ > - { 0x36, 0x0, 0x9 }, /* 10 Full -3 dB */ > -}; > - > -static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_dp_ddi_trans[] = { > - /* VS pre-emp Non-trans mV Pre-emph dB */ > - { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */ > - { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 dB */ > - { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */ > - { 0x0, 0x0, 0x18 }, /* 0 3 400mV 9.5 dB */ > - { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ > - { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */ > - { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ > - { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ > - { 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 dB */ > - { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB HDMI default */ > -}; > - > -static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_dp_ddi_trans_hbr2[] = { > - /* VS pre-emp Non-trans mV Pre-emph dB */ > - { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */ > - { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 dB */ > - { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */ > - { 0x0, 0x0, 0x19 }, /* 0 3 400mV 9.5 dB */ > - { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ > - { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */ > - { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ > - { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ > - { 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 dB */ > - { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB HDMI default */ > -}; > - > -static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_hdmi_ddi_trans[] = { > - /* HDMI Preset VS Pre-emph */ > - { 0x7, 0x0, 0x0 }, /* 1 400mV 0dB */ > - { 0x6, 0x0, 0x0 }, /* 2 500mV 0dB */ > - { 0x4, 0x0, 0x0 }, /* 3 650mV 0dB */ > - { 0x2, 0x0, 0x0 }, /* 4 800mV 0dB */ > - { 0x0, 0x0, 0x0 }, /* 5 1000mV 0dB */ > - { 0x0, 0x0, 0x5 }, /* 6 Full -1.5 dB */ > - { 0x0, 0x0, 0x6 }, /* 7 Full -1.8 dB */ > - { 0x0, 0x0, 0x7 }, /* 8 Full -2 dB */ > - { 0x0, 0x0, 0x8 }, /* 9 Full -2.5 dB */ > - { 0x0, 0x0, 0xA }, /* 10 Full -3 dB */ > -}; > - > -static const struct cnl_ddi_buf_trans tgl_combo_phy_ddi_translations_dp_hbr[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x32, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ > - { 0xC, 0x71, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ > - { 0x6, 0x7D, 0x2B, 0x00, 0x14 }, /* 350 900 8.2 */ > - { 0xA, 0x4C, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x73, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ > - { 0xC, 0x6C, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ > - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans tgl_combo_phy_ddi_translations_dp_hbr2[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ > - { 0xC, 0x63, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ > - { 0x6, 0x7F, 0x2B, 0x00, 0x14 }, /* 350 900 8.2 */ > - { 0xA, 0x47, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x63, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ > - { 0xC, 0x61, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ > - { 0x6, 0x7B, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > -}; > - > -static const struct cnl_ddi_buf_trans tgl_uy_combo_phy_ddi_translations_dp_hbr2[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x4F, 0x36, 0x00, 0x09 }, /* 350 500 3.1 */ > - { 0xC, 0x60, 0x32, 0x00, 0x0D }, /* 350 700 6.0 */ > - { 0xC, 0x7F, 0x2D, 0x00, 0x12 }, /* 350 900 8.2 */ > - { 0xC, 0x47, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x6F, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ > - { 0x6, 0x7D, 0x32, 0x00, 0x0D }, /* 500 900 5.1 */ > - { 0x6, 0x60, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ > - { 0x6, 0x7F, 0x34, 0x00, 0x0B }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > +static const union intel_ddi_buf_trans_entry icl_combo_phy_ddi_translations_dp_hbr2[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry icl_combo_phy_ddi_translations_edp_hbr2[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0x0, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 200 0.0 */ > + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 200 250 1.9 */ > + { .cnl = { 0x1, 0x7F, 0x33, 0x00, 0x0C } }, /* 200 300 3.5 */ > + { .cnl = { 0x9, 0x7F, 0x31, 0x00, 0x0E } }, /* 200 350 4.9 */ > + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 250 0.0 */ > + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 250 300 1.6 */ > + { .cnl = { 0x9, 0x7F, 0x35, 0x00, 0x0A } }, /* 250 350 2.9 */ > + { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 300 300 0.0 */ > + { .cnl = { 0x9, 0x7F, 0x38, 0x00, 0x07 } }, /* 300 350 1.3 */ > + { .cnl = { 0x9, 0x7F, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry icl_combo_phy_ddi_translations_edp_hbr3[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry icl_combo_phy_ddi_translations_hdmi[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x60, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ > + { .cnl = { 0xB, 0x73, 0x36, 0x00, 0x09 } }, /* 450 650 3.2 */ > + { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } }, /* 450 850 5.5 */ > + { .cnl = { 0xB, 0x73, 0x3F, 0x00, 0x00 } }, /* 650 650 0.0 ALS */ > + { .cnl = { 0x6, 0x7F, 0x37, 0x00, 0x08 } }, /* 650 850 2.3 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 850 850 0.0 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry ehl_combo_phy_ddi_translations_dp[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x33, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x47, 0x36, 0x00, 0x09 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x64, 0x34, 0x00, 0x0B } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x46, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x64, 0x38, 0x00, 0x07 } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x32, 0x00, 0x0D } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x61, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x38, 0x00, 0x07 } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry jsl_combo_phy_ddi_translations_edp_hbr[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 200 0.0 */ > + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 200 250 1.9 */ > + { .cnl = { 0x1, 0x7F, 0x33, 0x00, 0x0C } }, /* 200 300 3.5 */ > + { .cnl = { 0xA, 0x35, 0x36, 0x00, 0x09 } }, /* 200 350 4.9 */ > + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 250 0.0 */ > + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 250 300 1.6 */ > + { .cnl = { 0xA, 0x35, 0x35, 0x00, 0x0A } }, /* 250 350 2.9 */ > + { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 300 300 0.0 */ > + { .cnl = { 0xA, 0x35, 0x38, 0x00, 0x07 } }, /* 300 350 1.3 */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry jsl_combo_phy_ddi_translations_edp_hbr2[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 200 0.0 */ > + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 250 1.9 */ > + { .cnl = { 0x1, 0x7F, 0x3D, 0x00, 0x02 } }, /* 200 300 3.5 */ > + { .cnl = { 0xA, 0x35, 0x38, 0x00, 0x07 } }, /* 200 350 4.9 */ > + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 250 0.0 */ > + { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 300 1.6 */ > + { .cnl = { 0xA, 0x35, 0x3A, 0x00, 0x05 } }, /* 250 350 2.9 */ > + { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 300 300 0.0 */ > + { .cnl = { 0xA, 0x35, 0x38, 0x00, 0x07 } }, /* 300 350 1.3 */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry dg1_combo_phy_ddi_translations_dp_rbr_hbr[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x32, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x48, 0x35, 0x00, 0x0A } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x63, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x43, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x60, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x60, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x37, 0x00, 0x08 } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry dg1_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x32, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x48, 0x35, 0x00, 0x0A } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x63, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x43, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x60, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x58, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry icl_mg_phy_ddi_translations_rbr_hbr[] = { > + /* Voltage swing pre-emphasis */ > + { .mg = { 0x18, 0x00, 0x00 } }, /* 0 0 */ > + { .mg = { 0x1D, 0x00, 0x05 } }, /* 0 1 */ > + { .mg = { 0x24, 0x00, 0x0C } }, /* 0 2 */ > + { .mg = { 0x2B, 0x00, 0x14 } }, /* 0 3 */ > + { .mg = { 0x21, 0x00, 0x00 } }, /* 1 0 */ > + { .mg = { 0x2B, 0x00, 0x08 } }, /* 1 1 */ > + { .mg = { 0x30, 0x00, 0x0F } }, /* 1 2 */ > + { .mg = { 0x31, 0x00, 0x03 } }, /* 2 0 */ > + { .mg = { 0x34, 0x00, 0x0B } }, /* 2 1 */ > + { .mg = { 0x3F, 0x00, 0x00 } }, /* 3 0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry icl_mg_phy_ddi_translations_hbr2_hbr3[] = { > + /* Voltage swing pre-emphasis */ > + { .mg = { 0x18, 0x00, 0x00 } }, /* 0 0 */ > + { .mg = { 0x1D, 0x00, 0x05 } }, /* 0 1 */ > + { .mg = { 0x24, 0x00, 0x0C } }, /* 0 2 */ > + { .mg = { 0x2B, 0x00, 0x14 } }, /* 0 3 */ > + { .mg = { 0x26, 0x00, 0x00 } }, /* 1 0 */ > + { .mg = { 0x2C, 0x00, 0x07 } }, /* 1 1 */ > + { .mg = { 0x33, 0x00, 0x0C } }, /* 1 2 */ > + { .mg = { 0x2E, 0x00, 0x00 } }, /* 2 0 */ > + { .mg = { 0x36, 0x00, 0x09 } }, /* 2 1 */ > + { .mg = { 0x3F, 0x00, 0x00 } }, /* 3 0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry icl_mg_phy_ddi_translations_hdmi[] = { > + /* HDMI Preset VS Pre-emph */ > + { .mg = { 0x1A, 0x0, 0x0 } }, /* 1 400mV 0dB */ > + { .mg = { 0x20, 0x0, 0x0 } }, /* 2 500mV 0dB */ > + { .mg = { 0x29, 0x0, 0x0 } }, /* 3 650mV 0dB */ > + { .mg = { 0x32, 0x0, 0x0 } }, /* 4 800mV 0dB */ > + { .mg = { 0x3F, 0x0, 0x0 } }, /* 5 1000mV 0dB */ > + { .mg = { 0x3A, 0x0, 0x5 } }, /* 6 Full -1.5 dB */ > + { .mg = { 0x39, 0x0, 0x6 } }, /* 7 Full -1.8 dB */ > + { .mg = { 0x38, 0x0, 0x7 } }, /* 8 Full -2 dB */ > + { .mg = { 0x37, 0x0, 0x8 } }, /* 9 Full -2.5 dB */ > + { .mg = { 0x36, 0x0, 0x9 } }, /* 10 Full -3 dB */ > +}; > + > +static const union intel_ddi_buf_trans_entry tgl_dkl_phy_dp_ddi_trans[] = { > + /* VS pre-emp Non-trans mV Pre-emph dB */ > + { .dkl = { 0x7, 0x0, 0x00 } }, /* 0 0 400mV 0 dB */ > + { .dkl = { 0x5, 0x0, 0x05 } }, /* 0 1 400mV 3.5 dB */ > + { .dkl = { 0x2, 0x0, 0x0B } }, /* 0 2 400mV 6 dB */ > + { .dkl = { 0x0, 0x0, 0x18 } }, /* 0 3 400mV 9.5 dB */ > + { .dkl = { 0x5, 0x0, 0x00 } }, /* 1 0 600mV 0 dB */ > + { .dkl = { 0x2, 0x0, 0x08 } }, /* 1 1 600mV 3.5 dB */ > + { .dkl = { 0x0, 0x0, 0x14 } }, /* 1 2 600mV 6 dB */ > + { .dkl = { 0x2, 0x0, 0x00 } }, /* 2 0 800mV 0 dB */ > + { .dkl = { 0x0, 0x0, 0x0B } }, /* 2 1 800mV 3.5 dB */ > + { .dkl = { 0x0, 0x0, 0x00 } }, /* 3 0 1200mV 0 dB HDMI default */ > +}; > + > +static const union intel_ddi_buf_trans_entry tgl_dkl_phy_dp_ddi_trans_hbr2[] = { > + /* VS pre-emp Non-trans mV Pre-emph dB */ > + { .dkl = { 0x7, 0x0, 0x00 } }, /* 0 0 400mV 0 dB */ > + { .dkl = { 0x5, 0x0, 0x05 } }, /* 0 1 400mV 3.5 dB */ > + { .dkl = { 0x2, 0x0, 0x0B } }, /* 0 2 400mV 6 dB */ > + { .dkl = { 0x0, 0x0, 0x19 } }, /* 0 3 400mV 9.5 dB */ > + { .dkl = { 0x5, 0x0, 0x00 } }, /* 1 0 600mV 0 dB */ > + { .dkl = { 0x2, 0x0, 0x08 } }, /* 1 1 600mV 3.5 dB */ > + { .dkl = { 0x0, 0x0, 0x14 } }, /* 1 2 600mV 6 dB */ > + { .dkl = { 0x2, 0x0, 0x00 } }, /* 2 0 800mV 0 dB */ > + { .dkl = { 0x0, 0x0, 0x0B } }, /* 2 1 800mV 3.5 dB */ > + { .dkl = { 0x0, 0x0, 0x00 } }, /* 3 0 1200mV 0 dB HDMI default */ > +}; > + > +static const union intel_ddi_buf_trans_entry tgl_dkl_phy_hdmi_ddi_trans[] = { > + /* HDMI Preset VS Pre-emph */ > + { .dkl = { 0x7, 0x0, 0x0 } }, /* 1 400mV 0dB */ > + { .dkl = { 0x6, 0x0, 0x0 } }, /* 2 500mV 0dB */ > + { .dkl = { 0x4, 0x0, 0x0 } }, /* 3 650mV 0dB */ > + { .dkl = { 0x2, 0x0, 0x0 } }, /* 4 800mV 0dB */ > + { .dkl = { 0x0, 0x0, 0x0 } }, /* 5 1000mV 0dB */ > + { .dkl = { 0x0, 0x0, 0x5 } }, /* 6 Full -1.5 dB */ > + { .dkl = { 0x0, 0x0, 0x6 } }, /* 7 Full -1.8 dB */ > + { .dkl = { 0x0, 0x0, 0x7 } }, /* 8 Full -2 dB */ > + { .dkl = { 0x0, 0x0, 0x8 } }, /* 9 Full -2.5 dB */ > + { .dkl = { 0x0, 0x0, 0xA } }, /* 10 Full -3 dB */ > +}; > + > +static const union intel_ddi_buf_trans_entry tgl_combo_phy_ddi_translations_dp_hbr[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x32, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7D, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry tgl_combo_phy_ddi_translations_dp_hbr2[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x63, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x63, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x61, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7B, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > +}; > + > +static const union intel_ddi_buf_trans_entry tgl_uy_combo_phy_ddi_translations_dp_hbr2[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x36, 0x00, 0x09 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x60, 0x32, 0x00, 0x0D } }, /* 350 700 6.0 */ > + { .cnl = { 0xC, 0x7F, 0x2D, 0x00, 0x12 } }, /* 350 900 8.2 */ > + { .cnl = { 0xC, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x6F, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7D, 0x32, 0x00, 0x0D } }, /* 500 900 5.1 */ > + { .cnl = { 0x6, 0x60, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x34, 0x00, 0x0B } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > }; > > /* > * Cloned the HOBL entry to comply with the voltage and pre-emphasis entries > * that DisplayPort specification requires > */ > -static const struct cnl_ddi_buf_trans tgl_combo_phy_ddi_translations_edp_hbr2_hobl[] = { > - /* VS pre-emp */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 0 0 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 0 1 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 0 2 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 0 3 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1 0 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1 1 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1 2 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 2 0 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 2 1 */ > +static const union intel_ddi_buf_trans_entry tgl_combo_phy_ddi_translations_edp_hbr2_hobl[] = { > + /* VS pre-emp */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 0 0 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 0 1 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 0 2 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 0 3 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1 0 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1 1 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1 2 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 2 0 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 2 1 */ > }; > > -static const struct cnl_ddi_buf_trans rkl_combo_phy_ddi_translations_dp_hbr[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x2F, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ > - { 0xC, 0x63, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ > - { 0x6, 0x7D, 0x2A, 0x00, 0x15 }, /* 350 900 8.2 */ > - { 0xA, 0x4C, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x73, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ > - { 0xC, 0x6E, 0x3E, 0x00, 0x01 }, /* 650 700 0.6 */ > - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > +static const union intel_ddi_buf_trans_entry rkl_combo_phy_ddi_translations_dp_hbr[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x2F, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x63, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7D, 0x2A, 0x00, 0x15 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x6E, 0x3E, 0x00, 0x01 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > }; > > -static const struct cnl_ddi_buf_trans rkl_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { > - /* NT mV Trans mV db */ > - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > - { 0xA, 0x50, 0x38, 0x00, 0x07 }, /* 350 500 3.1 */ > - { 0xC, 0x61, 0x33, 0x00, 0x0C }, /* 350 700 6.0 */ > - { 0x6, 0x7F, 0x2E, 0x00, 0x11 }, /* 350 900 8.2 */ > - { 0xA, 0x47, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ > - { 0xC, 0x5F, 0x38, 0x00, 0x07 }, /* 500 700 2.9 */ > - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ > - { 0xC, 0x5F, 0x3F, 0x00, 0x00 }, /* 650 700 0.6 */ > - { 0x6, 0x7E, 0x36, 0x00, 0x09 }, /* 600 900 3.5 */ > - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > +static const union intel_ddi_buf_trans_entry rkl_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { > + /* NT mV Trans mV db */ > + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ > + { .cnl = { 0xA, 0x50, 0x38, 0x00, 0x07 } }, /* 350 500 3.1 */ > + { .cnl = { 0xC, 0x61, 0x33, 0x00, 0x0C } }, /* 350 700 6.0 */ > + { .cnl = { 0x6, 0x7F, 0x2E, 0x00, 0x11 } }, /* 350 900 8.2 */ > + { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ > + { .cnl = { 0xC, 0x5F, 0x38, 0x00, 0x07 } }, /* 500 700 2.9 */ > + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ > + { .cnl = { 0xC, 0x5F, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ > + { .cnl = { 0x6, 0x7E, 0x36, 0x00, 0x09 } }, /* 600 900 3.5 */ > + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ > }; > > -static const struct tgl_dkl_phy_ddi_buf_trans adlp_dkl_phy_dp_ddi_trans_hbr[] = { > - /* VS pre-emp Non-trans mV Pre-emph dB */ > - { 0x7, 0x0, 0x01 }, /* 0 0 400mV 0 dB */ > - { 0x5, 0x0, 0x06 }, /* 0 1 400mV 3.5 dB */ > - { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */ > - { 0x0, 0x0, 0x17 }, /* 0 3 400mV 9.5 dB */ > - { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ > - { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */ > - { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ > - { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ > - { 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 dB */ > - { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB */ > +static const union intel_ddi_buf_trans_entry adlp_dkl_phy_dp_ddi_trans_hbr[] = { > + /* VS pre-emp Non-trans mV Pre-emph dB */ > + { .dkl = { 0x7, 0x0, 0x01 } }, /* 0 0 400mV 0 dB */ > + { .dkl = { 0x5, 0x0, 0x06 } }, /* 0 1 400mV 3.5 dB */ > + { .dkl = { 0x2, 0x0, 0x0B } }, /* 0 2 400mV 6 dB */ > + { .dkl = { 0x0, 0x0, 0x17 } }, /* 0 3 400mV 9.5 dB */ > + { .dkl = { 0x5, 0x0, 0x00 } }, /* 1 0 600mV 0 dB */ > + { .dkl = { 0x2, 0x0, 0x08 } }, /* 1 1 600mV 3.5 dB */ > + { .dkl = { 0x0, 0x0, 0x14 } }, /* 1 2 600mV 6 dB */ > + { .dkl = { 0x2, 0x0, 0x00 } }, /* 2 0 800mV 0 dB */ > + { .dkl = { 0x0, 0x0, 0x0B } }, /* 2 1 800mV 3.5 dB */ > + { .dkl = { 0x0, 0x0, 0x00 } }, /* 3 0 1200mV 0 dB */ > }; > > -static const struct tgl_dkl_phy_ddi_buf_trans adlp_dkl_phy_dp_ddi_trans_hbr2_hbr3[] = { > - /* VS pre-emp Non-trans mV Pre-emph dB */ > - { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */ > - { 0x5, 0x0, 0x04 }, /* 0 1 400mV 3.5 dB */ > - { 0x2, 0x0, 0x0A }, /* 0 2 400mV 6 dB */ > - { 0x0, 0x0, 0x18 }, /* 0 3 400mV 9.5 dB */ > - { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ > - { 0x2, 0x0, 0x06 }, /* 1 1 600mV 3.5 dB */ > - { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ > - { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ > - { 0x0, 0x0, 0x09 }, /* 2 1 800mV 3.5 dB */ > - { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB */ > +static const union intel_ddi_buf_trans_entry adlp_dkl_phy_dp_ddi_trans_hbr2_hbr3[] = { > + /* VS pre-emp Non-trans mV Pre-emph dB */ > + { .dkl = { 0x7, 0x0, 0x00 } }, /* 0 0 400mV 0 dB */ > + { .dkl = { 0x5, 0x0, 0x04 } }, /* 0 1 400mV 3.5 dB */ > + { .dkl = { 0x2, 0x0, 0x0A } }, /* 0 2 400mV 6 dB */ > + { .dkl = { 0x0, 0x0, 0x18 } }, /* 0 3 400mV 9.5 dB */ > + { .dkl = { 0x5, 0x0, 0x00 } }, /* 1 0 600mV 0 dB */ > + { .dkl = { 0x2, 0x0, 0x06 } }, /* 1 1 600mV 3.5 dB */ > + { .dkl = { 0x0, 0x0, 0x14 } }, /* 1 2 600mV 6 dB */ > + { .dkl = { 0x2, 0x0, 0x00 } }, /* 2 0 800mV 0 dB */ > + { .dkl = { 0x0, 0x0, 0x09 } }, /* 2 1 800mV 3.5 dB */ > + { .dkl = { 0x0, 0x0, 0x00 } }, /* 3 0 1200mV 0 dB */ > }; > > -bool is_hobl_buf_trans(const struct cnl_ddi_buf_trans *table) > +bool is_hobl_buf_trans(const union intel_ddi_buf_trans_entry *table) > { > return table == tgl_combo_phy_ddi_translations_edp_hbr2_hobl; > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > bdw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -781,7 +781,7 @@ bdw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > } > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > skl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -798,7 +798,7 @@ skl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > } > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > kbl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -819,7 +819,7 @@ kbl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > } > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > skl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -851,7 +851,7 @@ skl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > return skl_get_buf_trans_dp(encoder, n_entries); > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int *n_entries) > { > if (IS_SKL_ULX(dev_priv) || > @@ -875,7 +875,7 @@ static int skl_buf_trans_num_entries(enum port port, int n_entries) > return min(n_entries, 9); > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -883,12 +883,12 @@ hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > if (IS_KABYLAKE(dev_priv) || > IS_COFFEELAKE(dev_priv) || > IS_COMETLAKE(dev_priv)) { > - const struct hsw_ddi_buf_trans *ddi_translations = > + const union intel_ddi_buf_trans_entry *ddi_translations = > kbl_get_buf_trans_dp(encoder, n_entries); > *n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries); > return ddi_translations; > } else if (IS_SKYLAKE(dev_priv)) { > - const struct hsw_ddi_buf_trans *ddi_translations = > + const union intel_ddi_buf_trans_entry *ddi_translations = > skl_get_buf_trans_dp(encoder, n_entries); > *n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries); > return ddi_translations; > @@ -904,13 +904,13 @@ hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > return NULL; > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > hsw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv)) { > - const struct hsw_ddi_buf_trans *ddi_translations = > + const union intel_ddi_buf_trans_entry *ddi_translations = > skl_get_buf_trans_edp(encoder, n_entries); > *n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries); > return ddi_translations; > @@ -925,7 +925,7 @@ hsw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > return NULL; > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > hsw_get_buf_trans_fdi(struct intel_encoder *encoder, > int *n_entries) > { > @@ -943,7 +943,7 @@ hsw_get_buf_trans_fdi(struct intel_encoder *encoder, > return NULL; > } > > -static const struct hsw_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > hsw_get_buf_trans_hdmi(struct intel_encoder *encoder, > int *n_entries) > { > @@ -963,7 +963,7 @@ hsw_get_buf_trans_hdmi(struct intel_encoder *encoder, > return NULL; > } > > -const struct hsw_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > hsw_get_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -978,14 +978,14 @@ hsw_get_buf_trans(struct intel_encoder *encoder, > return hsw_get_buf_trans_dp(encoder, n_entries); > } > > -static const struct bxt_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > bxt_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > { > *n_entries = ARRAY_SIZE(bxt_ddi_translations_dp); > return bxt_ddi_translations_dp; > } > > -static const struct bxt_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > bxt_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -998,14 +998,14 @@ bxt_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > return bxt_get_buf_trans_dp(encoder, n_entries); > } > > -static const struct bxt_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > bxt_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries) > { > *n_entries = ARRAY_SIZE(bxt_ddi_translations_hdmi); > return bxt_ddi_translations_hdmi; > } > > -const struct bxt_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > bxt_get_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1017,7 +1017,7 @@ bxt_get_buf_trans(struct intel_encoder *encoder, > return bxt_get_buf_trans_dp(encoder, n_entries); > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > cnl_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -1039,7 +1039,7 @@ cnl_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries) > return NULL; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > cnl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -1061,7 +1061,7 @@ cnl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) > return NULL; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > cnl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > @@ -1087,7 +1087,7 @@ cnl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) > } > } > > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > cnl_get_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1099,7 +1099,7 @@ cnl_get_buf_trans(struct intel_encoder *encoder, > return cnl_get_buf_trans_dp(encoder, n_entries); > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > icl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1108,7 +1108,7 @@ icl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > return icl_combo_phy_ddi_translations_hdmi; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > icl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1117,7 +1117,7 @@ icl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > return icl_combo_phy_ddi_translations_dp_hbr2; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > icl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1141,7 +1141,7 @@ icl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > return icl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > icl_get_combo_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1154,7 +1154,7 @@ icl_get_combo_buf_trans(struct intel_encoder *encoder, > return icl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -static const struct icl_mg_phy_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > icl_get_mg_buf_trans_hdmi(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1163,7 +1163,7 @@ icl_get_mg_buf_trans_hdmi(struct intel_encoder *encoder, > return icl_mg_phy_ddi_translations_hdmi; > } > > -static const struct icl_mg_phy_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > icl_get_mg_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1177,7 +1177,7 @@ icl_get_mg_buf_trans_dp(struct intel_encoder *encoder, > } > } > > -const struct icl_mg_phy_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > icl_get_mg_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1188,7 +1188,7 @@ icl_get_mg_buf_trans(struct intel_encoder *encoder, > return icl_get_mg_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > ehl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1197,7 +1197,7 @@ ehl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > return icl_combo_phy_ddi_translations_hdmi; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > ehl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1206,7 +1206,7 @@ ehl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > return ehl_combo_phy_ddi_translations_dp; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1221,7 +1221,7 @@ ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > ehl_get_combo_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1234,7 +1234,7 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, > return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1243,7 +1243,7 @@ jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > return icl_combo_phy_ddi_translations_hdmi; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1252,7 +1252,7 @@ jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > return icl_combo_phy_ddi_translations_dp_hbr2; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1272,7 +1272,7 @@ jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > jsl_get_combo_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1285,7 +1285,7 @@ jsl_get_combo_buf_trans(struct intel_encoder *encoder, > return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1294,7 +1294,7 @@ tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > return icl_combo_phy_ddi_translations_hdmi; > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1323,7 +1323,7 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > } > } > > -static const struct cnl_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > tgl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1345,7 +1345,7 @@ tgl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > return tgl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > tgl_get_combo_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1358,7 +1358,7 @@ tgl_get_combo_buf_trans(struct intel_encoder *encoder, > return tgl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -static const struct tgl_dkl_phy_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > tgl_get_dkl_buf_trans_hdmi(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1367,7 +1367,7 @@ tgl_get_dkl_buf_trans_hdmi(struct intel_encoder *encoder, > return tgl_dkl_phy_hdmi_ddi_trans; > } > > -static const struct tgl_dkl_phy_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1381,7 +1381,7 @@ tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder, > } > } > > -const struct tgl_dkl_phy_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > tgl_get_dkl_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1392,7 +1392,7 @@ tgl_get_dkl_buf_trans(struct intel_encoder *encoder, > return tgl_get_dkl_buf_trans_dp(encoder, crtc_state, n_entries); > } > > -static const struct tgl_dkl_phy_ddi_buf_trans * > +static const union intel_ddi_buf_trans_entry * > adlp_get_dkl_buf_trans_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > @@ -1406,7 +1406,7 @@ adlp_get_dkl_buf_trans_dp(struct intel_encoder *encoder, > return adlp_dkl_phy_dp_ddi_trans_hbr; > } > > -const struct tgl_dkl_phy_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > adlp_get_dkl_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries) > diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > index 428f1f343341..487a4f815470 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h > @@ -45,52 +45,60 @@ struct tgl_dkl_phy_ddi_buf_trans { > u32 dkl_de_emphasis_control; > }; > > -bool is_hobl_buf_trans(const struct cnl_ddi_buf_trans *table); > +union intel_ddi_buf_trans_entry { > + struct hsw_ddi_buf_trans hsw; > + struct bxt_ddi_buf_trans bxt; > + struct cnl_ddi_buf_trans cnl; > + struct icl_mg_phy_ddi_buf_trans mg; > + struct tgl_dkl_phy_ddi_buf_trans dkl; > +}; > + > +bool is_hobl_buf_trans(const union intel_ddi_buf_trans_entry *table); > > int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *default_entry); > > -const struct hsw_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > hsw_get_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > > -const struct bxt_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > bxt_get_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > > -const struct tgl_dkl_phy_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > adlp_get_dkl_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > tgl_get_combo_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > -const struct tgl_dkl_phy_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > tgl_get_dkl_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > jsl_get_combo_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > ehl_get_combo_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > icl_get_combo_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > -const struct icl_mg_phy_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > icl_get_mg_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries); > > -const struct cnl_ddi_buf_trans * > +const union intel_ddi_buf_trans_entry * > cnl_get_buf_trans(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > int *n_entries);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 33e94030090f..f3fba535812c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -102,7 +102,7 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, u32 iboost_bit = 0; int i, n_entries; enum port port = encoder->port; - const struct hsw_ddi_buf_trans *ddi_translations; + const union intel_ddi_buf_trans_entry *ddi_translations; ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries); @@ -116,9 +116,9 @@ void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, for (i = 0; i < n_entries; i++) { intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, i), - ddi_translations[i].trans1 | iboost_bit); + ddi_translations[i].hsw.trans1 | iboost_bit); intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, i), - ddi_translations[i].trans2); + ddi_translations[i].hsw.trans2); } } @@ -135,7 +135,7 @@ static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder, u32 iboost_bit = 0; int n_entries; enum port port = encoder->port; - const struct hsw_ddi_buf_trans *ddi_translations; + const union intel_ddi_buf_trans_entry *ddi_translations; ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries); @@ -151,9 +151,9 @@ static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder, /* Entry 9 is for HDMI: */ intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, 9), - ddi_translations[level].trans1 | iboost_bit); + ddi_translations[level].hsw.trans1 | iboost_bit); intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, 9), - ddi_translations[level].trans2); + ddi_translations[level].hsw.trans2); } void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, @@ -944,7 +944,7 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder, iboost = intel_bios_encoder_dp_boost_level(encoder->devdata); if (iboost == 0) { - const struct hsw_ddi_buf_trans *ddi_translations; + const union intel_ddi_buf_trans_entry *ddi_translations; int n_entries; ddi_translations = hsw_get_buf_trans(encoder, crtc_state, &n_entries); @@ -954,7 +954,7 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder, if (drm_WARN_ON_ONCE(&dev_priv->drm, level >= n_entries)) level = n_entries - 1; - iboost = ddi_translations[level].i_boost; + iboost = ddi_translations[level].hsw.i_boost; } /* Make sure that the requested I_boost is valid */ @@ -974,7 +974,7 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder *encoder, int level) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - const struct bxt_ddi_buf_trans *ddi_translations; + const union intel_ddi_buf_trans_entry *ddi_translations; enum port port = encoder->port; int n_entries; @@ -985,10 +985,10 @@ static void bxt_ddi_vswing_sequence(struct intel_encoder *encoder, level = n_entries - 1; bxt_ddi_phy_set_signal_level(dev_priv, port, - ddi_translations[level].margin, - ddi_translations[level].scale, - ddi_translations[level].enable, - ddi_translations[level].deemphasis); + ddi_translations[level].bxt.margin, + ddi_translations[level].bxt.scale, + ddi_translations[level].bxt.enable, + ddi_translations[level].bxt.deemphasis); } static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp, @@ -1049,7 +1049,7 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder, int level) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - const struct cnl_ddi_buf_trans *ddi_translations; + const union intel_ddi_buf_trans_entry *ddi_translations; enum port port = encoder->port; int n_entries, ln; u32 val; @@ -1071,8 +1071,8 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder, val = intel_de_read(dev_priv, CNL_PORT_TX_DW2_LN0(port)); val &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK | RCOMP_SCALAR_MASK); - val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_sel); - val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_sel); + val |= SWING_SEL_UPPER(ddi_translations[level].cnl.dw2_swing_sel); + val |= SWING_SEL_LOWER(ddi_translations[level].cnl.dw2_swing_sel); /* Rcomp scalar is fixed as 0x98 for every table entry */ val |= RCOMP_SCALAR(0x98); intel_de_write(dev_priv, CNL_PORT_TX_DW2_GRP(port), val); @@ -1083,9 +1083,9 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder, val = intel_de_read(dev_priv, CNL_PORT_TX_DW4_LN(ln, port)); val &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK | CURSOR_COEFF_MASK); - val |= POST_CURSOR_1(ddi_translations[level].dw4_post_cursor_1); - val |= POST_CURSOR_2(ddi_translations[level].dw4_post_cursor_2); - val |= CURSOR_COEFF(ddi_translations[level].dw4_cursor_coeff); + val |= POST_CURSOR_1(ddi_translations[level].cnl.dw4_post_cursor_1); + val |= POST_CURSOR_2(ddi_translations[level].cnl.dw4_post_cursor_2); + val |= CURSOR_COEFF(ddi_translations[level].cnl.dw4_cursor_coeff); intel_de_write(dev_priv, CNL_PORT_TX_DW4_LN(ln, port), val); } @@ -1100,7 +1100,7 @@ static void cnl_ddi_vswing_program(struct intel_encoder *encoder, /* Program PORT_TX_DW7 */ val = intel_de_read(dev_priv, CNL_PORT_TX_DW7_LN0(port)); val &= ~N_SCALAR_MASK; - val |= N_SCALAR(ddi_translations[level].dw7_n_scalar); + val |= N_SCALAR(ddi_translations[level].cnl.dw7_n_scalar); intel_de_write(dev_priv, CNL_PORT_TX_DW7_GRP(port), val); } @@ -1170,7 +1170,7 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, int level) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - const struct cnl_ddi_buf_trans *ddi_translations; + const union intel_ddi_buf_trans_entry *ddi_translations; enum phy phy = intel_port_to_phy(dev_priv, encoder->port); int n_entries, ln; u32 val; @@ -1211,8 +1211,8 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, val = intel_de_read(dev_priv, ICL_PORT_TX_DW2_LN0(phy)); val &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK | RCOMP_SCALAR_MASK); - val |= SWING_SEL_UPPER(ddi_translations[level].dw2_swing_sel); - val |= SWING_SEL_LOWER(ddi_translations[level].dw2_swing_sel); + val |= SWING_SEL_UPPER(ddi_translations[level].cnl.dw2_swing_sel); + val |= SWING_SEL_LOWER(ddi_translations[level].cnl.dw2_swing_sel); /* Program Rcomp scalar for every table entry */ val |= RCOMP_SCALAR(0x98); intel_de_write(dev_priv, ICL_PORT_TX_DW2_GRP(phy), val); @@ -1223,16 +1223,16 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, val = intel_de_read(dev_priv, ICL_PORT_TX_DW4_LN(ln, phy)); val &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK | CURSOR_COEFF_MASK); - val |= POST_CURSOR_1(ddi_translations[level].dw4_post_cursor_1); - val |= POST_CURSOR_2(ddi_translations[level].dw4_post_cursor_2); - val |= CURSOR_COEFF(ddi_translations[level].dw4_cursor_coeff); + val |= POST_CURSOR_1(ddi_translations[level].cnl.dw4_post_cursor_1); + val |= POST_CURSOR_2(ddi_translations[level].cnl.dw4_post_cursor_2); + val |= CURSOR_COEFF(ddi_translations[level].cnl.dw4_cursor_coeff); intel_de_write(dev_priv, ICL_PORT_TX_DW4_LN(ln, phy), val); } /* Program PORT_TX_DW7 */ val = intel_de_read(dev_priv, ICL_PORT_TX_DW7_LN0(phy)); val &= ~N_SCALAR_MASK; - val |= N_SCALAR(ddi_translations[level].dw7_n_scalar); + val |= N_SCALAR(ddi_translations[level].cnl.dw7_n_scalar); intel_de_write(dev_priv, ICL_PORT_TX_DW7_GRP(phy), val); } @@ -1303,7 +1303,7 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port); - const struct icl_mg_phy_ddi_buf_trans *ddi_translations; + const union intel_ddi_buf_trans_entry *ddi_translations; int n_entries, ln; u32 val; @@ -1333,13 +1333,13 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, val = intel_de_read(dev_priv, MG_TX1_SWINGCTRL(ln, tc_port)); val &= ~CRI_TXDEEMPH_OVERRIDE_17_12_MASK; val |= CRI_TXDEEMPH_OVERRIDE_17_12( - ddi_translations[level].cri_txdeemph_override_17_12); + ddi_translations[level].mg.cri_txdeemph_override_17_12); intel_de_write(dev_priv, MG_TX1_SWINGCTRL(ln, tc_port), val); val = intel_de_read(dev_priv, MG_TX2_SWINGCTRL(ln, tc_port)); val &= ~CRI_TXDEEMPH_OVERRIDE_17_12_MASK; val |= CRI_TXDEEMPH_OVERRIDE_17_12( - ddi_translations[level].cri_txdeemph_override_17_12); + ddi_translations[level].mg.cri_txdeemph_override_17_12); intel_de_write(dev_priv, MG_TX2_SWINGCTRL(ln, tc_port), val); } @@ -1349,9 +1349,9 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, val &= ~(CRI_TXDEEMPH_OVERRIDE_11_6_MASK | CRI_TXDEEMPH_OVERRIDE_5_0_MASK); val |= CRI_TXDEEMPH_OVERRIDE_5_0( - ddi_translations[level].cri_txdeemph_override_5_0) | + ddi_translations[level].mg.cri_txdeemph_override_5_0) | CRI_TXDEEMPH_OVERRIDE_11_6( - ddi_translations[level].cri_txdeemph_override_11_6) | + ddi_translations[level].mg.cri_txdeemph_override_11_6) | CRI_TXDEEMPH_OVERRIDE_EN; intel_de_write(dev_priv, MG_TX1_DRVCTRL(ln, tc_port), val); @@ -1359,9 +1359,9 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, val &= ~(CRI_TXDEEMPH_OVERRIDE_11_6_MASK | CRI_TXDEEMPH_OVERRIDE_5_0_MASK); val |= CRI_TXDEEMPH_OVERRIDE_5_0( - ddi_translations[level].cri_txdeemph_override_5_0) | + ddi_translations[level].mg.cri_txdeemph_override_5_0) | CRI_TXDEEMPH_OVERRIDE_11_6( - ddi_translations[level].cri_txdeemph_override_11_6) | + ddi_translations[level].mg.cri_txdeemph_override_11_6) | CRI_TXDEEMPH_OVERRIDE_EN; intel_de_write(dev_priv, MG_TX2_DRVCTRL(ln, tc_port), val); @@ -1441,7 +1441,7 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port); - const struct tgl_dkl_phy_ddi_buf_trans *ddi_translations; + const union intel_ddi_buf_trans_entry *ddi_translations; u32 val, dpcnt_mask, dpcnt_val; int n_entries, ln; @@ -1461,9 +1461,9 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, dpcnt_mask = (DKL_TX_PRESHOOT_COEFF_MASK | DKL_TX_DE_EMPAHSIS_COEFF_MASK | DKL_TX_VSWING_CONTROL_MASK); - dpcnt_val = DKL_TX_VSWING_CONTROL(ddi_translations[level].dkl_vswing_control); - dpcnt_val |= DKL_TX_DE_EMPHASIS_COEFF(ddi_translations[level].dkl_de_emphasis_control); - dpcnt_val |= DKL_TX_PRESHOOT_COEFF(ddi_translations[level].dkl_preshoot_control); + dpcnt_val = DKL_TX_VSWING_CONTROL(ddi_translations[level].dkl.dkl_vswing_control); + dpcnt_val |= DKL_TX_DE_EMPHASIS_COEFF(ddi_translations[level].dkl.dkl_de_emphasis_control); + dpcnt_val |= DKL_TX_PRESHOOT_COEFF(ddi_translations[level].dkl.dkl_preshoot_control); for (ln = 0; ln < 2; ln++) { intel_de_write(dev_priv, HIP_INDEX_REG(tc_port), diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c index f7b7178363e8..3f38267b7dd6 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c @@ -13,761 +13,761 @@ * them for both DP and FDI transports, allowing those ports to * automatically adapt to HDMI connections as well */ -static const struct hsw_ddi_buf_trans hsw_ddi_translations_dp[] = { - { 0x00FFFFFF, 0x0006000E, 0x0 }, - { 0x00D75FFF, 0x0005000A, 0x0 }, - { 0x00C30FFF, 0x00040006, 0x0 }, - { 0x80AAAFFF, 0x000B0000, 0x0 }, - { 0x00FFFFFF, 0x0005000A, 0x0 }, - { 0x00D75FFF, 0x000C0004, 0x0 }, - { 0x80C30FFF, 0x000B0000, 0x0 }, - { 0x00FFFFFF, 0x00040006, 0x0 }, - { 0x80D75FFF, 0x000B0000, 0x0 }, +static const union intel_ddi_buf_trans_entry hsw_ddi_translations_dp[] = { + { .hsw = { 0x00FFFFFF, 0x0006000E, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x0005000A, 0x0 } }, + { .hsw = { 0x00C30FFF, 0x00040006, 0x0 } }, + { .hsw = { 0x80AAAFFF, 0x000B0000, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x0005000A, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x000C0004, 0x0 } }, + { .hsw = { 0x80C30FFF, 0x000B0000, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x00040006, 0x0 } }, + { .hsw = { 0x80D75FFF, 0x000B0000, 0x0 } }, }; -static const struct hsw_ddi_buf_trans hsw_ddi_translations_fdi[] = { - { 0x00FFFFFF, 0x0007000E, 0x0 }, - { 0x00D75FFF, 0x000F000A, 0x0 }, - { 0x00C30FFF, 0x00060006, 0x0 }, - { 0x00AAAFFF, 0x001E0000, 0x0 }, - { 0x00FFFFFF, 0x000F000A, 0x0 }, - { 0x00D75FFF, 0x00160004, 0x0 }, - { 0x00C30FFF, 0x001E0000, 0x0 }, - { 0x00FFFFFF, 0x00060006, 0x0 }, - { 0x00D75FFF, 0x001E0000, 0x0 }, +static const union intel_ddi_buf_trans_entry hsw_ddi_translations_fdi[] = { + { .hsw = { 0x00FFFFFF, 0x0007000E, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x000F000A, 0x0 } }, + { .hsw = { 0x00C30FFF, 0x00060006, 0x0 } }, + { .hsw = { 0x00AAAFFF, 0x001E0000, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x000F000A, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x00160004, 0x0 } }, + { .hsw = { 0x00C30FFF, 0x001E0000, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x00060006, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x001E0000, 0x0 } }, }; -static const struct hsw_ddi_buf_trans hsw_ddi_translations_hdmi[] = { - /* Idx NT mV d T mV d db */ - { 0x00FFFFFF, 0x0006000E, 0x0 },/* 0: 400 400 0 */ - { 0x00E79FFF, 0x000E000C, 0x0 },/* 1: 400 500 2 */ - { 0x00D75FFF, 0x0005000A, 0x0 },/* 2: 400 600 3.5 */ - { 0x00FFFFFF, 0x0005000A, 0x0 },/* 3: 600 600 0 */ - { 0x00E79FFF, 0x001D0007, 0x0 },/* 4: 600 750 2 */ - { 0x00D75FFF, 0x000C0004, 0x0 },/* 5: 600 900 3.5 */ - { 0x00FFFFFF, 0x00040006, 0x0 },/* 6: 800 800 0 */ - { 0x80E79FFF, 0x00030002, 0x0 },/* 7: 800 1000 2 */ - { 0x00FFFFFF, 0x00140005, 0x0 },/* 8: 850 850 0 */ - { 0x00FFFFFF, 0x000C0004, 0x0 },/* 9: 900 900 0 */ - { 0x00FFFFFF, 0x001C0003, 0x0 },/* 10: 950 950 0 */ - { 0x80FFFFFF, 0x00030002, 0x0 },/* 11: 1000 1000 0 */ +static const union intel_ddi_buf_trans_entry hsw_ddi_translations_hdmi[] = { + /* Idx NT mV d T mV d db */ + { .hsw = { 0x00FFFFFF, 0x0006000E, 0x0 } }, /* 0: 400 400 0 */ + { .hsw = { 0x00E79FFF, 0x000E000C, 0x0 } }, /* 1: 400 500 2 */ + { .hsw = { 0x00D75FFF, 0x0005000A, 0x0 } }, /* 2: 400 600 3.5 */ + { .hsw = { 0x00FFFFFF, 0x0005000A, 0x0 } }, /* 3: 600 600 0 */ + { .hsw = { 0x00E79FFF, 0x001D0007, 0x0 } }, /* 4: 600 750 2 */ + { .hsw = { 0x00D75FFF, 0x000C0004, 0x0 } }, /* 5: 600 900 3.5 */ + { .hsw = { 0x00FFFFFF, 0x00040006, 0x0 } }, /* 6: 800 800 0 */ + { .hsw = { 0x80E79FFF, 0x00030002, 0x0 } }, /* 7: 800 1000 2 */ + { .hsw = { 0x00FFFFFF, 0x00140005, 0x0 } }, /* 8: 850 850 0 */ + { .hsw = { 0x00FFFFFF, 0x000C0004, 0x0 } }, /* 9: 900 900 0 */ + { .hsw = { 0x00FFFFFF, 0x001C0003, 0x0 } }, /* 10: 950 950 0 */ + { .hsw = { 0x80FFFFFF, 0x00030002, 0x0 } }, /* 11: 1000 1000 0 */ }; -static const struct hsw_ddi_buf_trans bdw_ddi_translations_edp[] = { - { 0x00FFFFFF, 0x00000012, 0x0 }, - { 0x00EBAFFF, 0x00020011, 0x0 }, - { 0x00C71FFF, 0x0006000F, 0x0 }, - { 0x00AAAFFF, 0x000E000A, 0x0 }, - { 0x00FFFFFF, 0x00020011, 0x0 }, - { 0x00DB6FFF, 0x0005000F, 0x0 }, - { 0x00BEEFFF, 0x000A000C, 0x0 }, - { 0x00FFFFFF, 0x0005000F, 0x0 }, - { 0x00DB6FFF, 0x000A000C, 0x0 }, +static const union intel_ddi_buf_trans_entry bdw_ddi_translations_edp[] = { + { .hsw = { 0x00FFFFFF, 0x00000012, 0x0 } }, + { .hsw = { 0x00EBAFFF, 0x00020011, 0x0 } }, + { .hsw = { 0x00C71FFF, 0x0006000F, 0x0 } }, + { .hsw = { 0x00AAAFFF, 0x000E000A, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x00020011, 0x0 } }, + { .hsw = { 0x00DB6FFF, 0x0005000F, 0x0 } }, + { .hsw = { 0x00BEEFFF, 0x000A000C, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x0005000F, 0x0 } }, + { .hsw = { 0x00DB6FFF, 0x000A000C, 0x0 } }, }; -static const struct hsw_ddi_buf_trans bdw_ddi_translations_dp[] = { - { 0x00FFFFFF, 0x0007000E, 0x0 }, - { 0x00D75FFF, 0x000E000A, 0x0 }, - { 0x00BEFFFF, 0x00140006, 0x0 }, - { 0x80B2CFFF, 0x001B0002, 0x0 }, - { 0x00FFFFFF, 0x000E000A, 0x0 }, - { 0x00DB6FFF, 0x00160005, 0x0 }, - { 0x80C71FFF, 0x001A0002, 0x0 }, - { 0x00F7DFFF, 0x00180004, 0x0 }, - { 0x80D75FFF, 0x001B0002, 0x0 }, +static const union intel_ddi_buf_trans_entry bdw_ddi_translations_dp[] = { + { .hsw = { 0x00FFFFFF, 0x0007000E, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x000E000A, 0x0 } }, + { .hsw = { 0x00BEFFFF, 0x00140006, 0x0 } }, + { .hsw = { 0x80B2CFFF, 0x001B0002, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x000E000A, 0x0 } }, + { .hsw = { 0x00DB6FFF, 0x00160005, 0x0 } }, + { .hsw = { 0x80C71FFF, 0x001A0002, 0x0 } }, + { .hsw = { 0x00F7DFFF, 0x00180004, 0x0 } }, + { .hsw = { 0x80D75FFF, 0x001B0002, 0x0 } }, }; -static const struct hsw_ddi_buf_trans bdw_ddi_translations_fdi[] = { - { 0x00FFFFFF, 0x0001000E, 0x0 }, - { 0x00D75FFF, 0x0004000A, 0x0 }, - { 0x00C30FFF, 0x00070006, 0x0 }, - { 0x00AAAFFF, 0x000C0000, 0x0 }, - { 0x00FFFFFF, 0x0004000A, 0x0 }, - { 0x00D75FFF, 0x00090004, 0x0 }, - { 0x00C30FFF, 0x000C0000, 0x0 }, - { 0x00FFFFFF, 0x00070006, 0x0 }, - { 0x00D75FFF, 0x000C0000, 0x0 }, +static const union intel_ddi_buf_trans_entry bdw_ddi_translations_fdi[] = { + { .hsw = { 0x00FFFFFF, 0x0001000E, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x0004000A, 0x0 } }, + { .hsw = { 0x00C30FFF, 0x00070006, 0x0 } }, + { .hsw = { 0x00AAAFFF, 0x000C0000, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x0004000A, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x00090004, 0x0 } }, + { .hsw = { 0x00C30FFF, 0x000C0000, 0x0 } }, + { .hsw = { 0x00FFFFFF, 0x00070006, 0x0 } }, + { .hsw = { 0x00D75FFF, 0x000C0000, 0x0 } }, }; -static const struct hsw_ddi_buf_trans bdw_ddi_translations_hdmi[] = { - /* Idx NT mV d T mV df db */ - { 0x00FFFFFF, 0x0007000E, 0x0 },/* 0: 400 400 0 */ - { 0x00D75FFF, 0x000E000A, 0x0 },/* 1: 400 600 3.5 */ - { 0x00BEFFFF, 0x00140006, 0x0 },/* 2: 400 800 6 */ - { 0x00FFFFFF, 0x0009000D, 0x0 },/* 3: 450 450 0 */ - { 0x00FFFFFF, 0x000E000A, 0x0 },/* 4: 600 600 0 */ - { 0x00D7FFFF, 0x00140006, 0x0 },/* 5: 600 800 2.5 */ - { 0x80CB2FFF, 0x001B0002, 0x0 },/* 6: 600 1000 4.5 */ - { 0x00FFFFFF, 0x00140006, 0x0 },/* 7: 800 800 0 */ - { 0x80E79FFF, 0x001B0002, 0x0 },/* 8: 800 1000 2 */ - { 0x80FFFFFF, 0x001B0002, 0x0 },/* 9: 1000 1000 0 */ +static const union intel_ddi_buf_trans_entry bdw_ddi_translations_hdmi[] = { + /* Idx NT mV d T mV df db */ + { .hsw = { 0x00FFFFFF, 0x0007000E, 0x0 } }, /* 0: 400 400 0 */ + { .hsw = { 0x00D75FFF, 0x000E000A, 0x0 } }, /* 1: 400 600 3.5 */ + { .hsw = { 0x00BEFFFF, 0x00140006, 0x0 } }, /* 2: 400 800 6 */ + { .hsw = { 0x00FFFFFF, 0x0009000D, 0x0 } }, /* 3: 450 450 0 */ + { .hsw = { 0x00FFFFFF, 0x000E000A, 0x0 } }, /* 4: 600 600 0 */ + { .hsw = { 0x00D7FFFF, 0x00140006, 0x0 } }, /* 5: 600 800 2.5 */ + { .hsw = { 0x80CB2FFF, 0x001B0002, 0x0 } }, /* 6: 600 1000 4.5 */ + { .hsw = { 0x00FFFFFF, 0x00140006, 0x0 } }, /* 7: 800 800 0 */ + { .hsw = { 0x80E79FFF, 0x001B0002, 0x0 } }, /* 8: 800 1000 2 */ + { .hsw = { 0x80FFFFFF, 0x001B0002, 0x0 } }, /* 9: 1000 1000 0 */ }; /* Skylake H and S */ -static const struct hsw_ddi_buf_trans skl_ddi_translations_dp[] = { - { 0x00002016, 0x000000A0, 0x0 }, - { 0x00005012, 0x0000009B, 0x0 }, - { 0x00007011, 0x00000088, 0x0 }, - { 0x80009010, 0x000000C0, 0x1 }, - { 0x00002016, 0x0000009B, 0x0 }, - { 0x00005012, 0x00000088, 0x0 }, - { 0x80007011, 0x000000C0, 0x1 }, - { 0x00002016, 0x000000DF, 0x0 }, - { 0x80005012, 0x000000C0, 0x1 }, +static const union intel_ddi_buf_trans_entry skl_ddi_translations_dp[] = { + { .hsw = { 0x00002016, 0x000000A0, 0x0 } }, + { .hsw = { 0x00005012, 0x0000009B, 0x0 } }, + { .hsw = { 0x00007011, 0x00000088, 0x0 } }, + { .hsw = { 0x80009010, 0x000000C0, 0x1 } }, + { .hsw = { 0x00002016, 0x0000009B, 0x0 } }, + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, + { .hsw = { 0x80007011, 0x000000C0, 0x1 } }, + { .hsw = { 0x00002016, 0x000000DF, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x1 } }, }; /* Skylake U */ -static const struct hsw_ddi_buf_trans skl_u_ddi_translations_dp[] = { - { 0x0000201B, 0x000000A2, 0x0 }, - { 0x00005012, 0x00000088, 0x0 }, - { 0x80007011, 0x000000CD, 0x1 }, - { 0x80009010, 0x000000C0, 0x1 }, - { 0x0000201B, 0x0000009D, 0x0 }, - { 0x80005012, 0x000000C0, 0x1 }, - { 0x80007011, 0x000000C0, 0x1 }, - { 0x00002016, 0x00000088, 0x0 }, - { 0x80005012, 0x000000C0, 0x1 }, +static const union intel_ddi_buf_trans_entry skl_u_ddi_translations_dp[] = { + { .hsw = { 0x0000201B, 0x000000A2, 0x0 } }, + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, + { .hsw = { 0x80007011, 0x000000CD, 0x1 } }, + { .hsw = { 0x80009010, 0x000000C0, 0x1 } }, + { .hsw = { 0x0000201B, 0x0000009D, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x1 } }, + { .hsw = { 0x80007011, 0x000000C0, 0x1 } }, + { .hsw = { 0x00002016, 0x00000088, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x1 } }, }; /* Skylake Y */ -static const struct hsw_ddi_buf_trans skl_y_ddi_translations_dp[] = { - { 0x00000018, 0x000000A2, 0x0 }, - { 0x00005012, 0x00000088, 0x0 }, - { 0x80007011, 0x000000CD, 0x3 }, - { 0x80009010, 0x000000C0, 0x3 }, - { 0x00000018, 0x0000009D, 0x0 }, - { 0x80005012, 0x000000C0, 0x3 }, - { 0x80007011, 0x000000C0, 0x3 }, - { 0x00000018, 0x00000088, 0x0 }, - { 0x80005012, 0x000000C0, 0x3 }, +static const union intel_ddi_buf_trans_entry skl_y_ddi_translations_dp[] = { + { .hsw = { 0x00000018, 0x000000A2, 0x0 } }, + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, + { .hsw = { 0x80007011, 0x000000CD, 0x3 } }, + { .hsw = { 0x80009010, 0x000000C0, 0x3 } }, + { .hsw = { 0x00000018, 0x0000009D, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, + { .hsw = { 0x80007011, 0x000000C0, 0x3 } }, + { .hsw = { 0x00000018, 0x00000088, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, }; /* Kabylake H and S */ -static const struct hsw_ddi_buf_trans kbl_ddi_translations_dp[] = { - { 0x00002016, 0x000000A0, 0x0 }, - { 0x00005012, 0x0000009B, 0x0 }, - { 0x00007011, 0x00000088, 0x0 }, - { 0x80009010, 0x000000C0, 0x1 }, - { 0x00002016, 0x0000009B, 0x0 }, - { 0x00005012, 0x00000088, 0x0 }, - { 0x80007011, 0x000000C0, 0x1 }, - { 0x00002016, 0x00000097, 0x0 }, - { 0x80005012, 0x000000C0, 0x1 }, +static const union intel_ddi_buf_trans_entry kbl_ddi_translations_dp[] = { + { .hsw = { 0x00002016, 0x000000A0, 0x0 } }, + { .hsw = { 0x00005012, 0x0000009B, 0x0 } }, + { .hsw = { 0x00007011, 0x00000088, 0x0 } }, + { .hsw = { 0x80009010, 0x000000C0, 0x1 } }, + { .hsw = { 0x00002016, 0x0000009B, 0x0 } }, + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, + { .hsw = { 0x80007011, 0x000000C0, 0x1 } }, + { .hsw = { 0x00002016, 0x00000097, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x1 } }, }; /* Kabylake U */ -static const struct hsw_ddi_buf_trans kbl_u_ddi_translations_dp[] = { - { 0x0000201B, 0x000000A1, 0x0 }, - { 0x00005012, 0x00000088, 0x0 }, - { 0x80007011, 0x000000CD, 0x3 }, - { 0x80009010, 0x000000C0, 0x3 }, - { 0x0000201B, 0x0000009D, 0x0 }, - { 0x80005012, 0x000000C0, 0x3 }, - { 0x80007011, 0x000000C0, 0x3 }, - { 0x00002016, 0x0000004F, 0x0 }, - { 0x80005012, 0x000000C0, 0x3 }, +static const union intel_ddi_buf_trans_entry kbl_u_ddi_translations_dp[] = { + { .hsw = { 0x0000201B, 0x000000A1, 0x0 } }, + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, + { .hsw = { 0x80007011, 0x000000CD, 0x3 } }, + { .hsw = { 0x80009010, 0x000000C0, 0x3 } }, + { .hsw = { 0x0000201B, 0x0000009D, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, + { .hsw = { 0x80007011, 0x000000C0, 0x3 } }, + { .hsw = { 0x00002016, 0x0000004F, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, }; /* Kabylake Y */ -static const struct hsw_ddi_buf_trans kbl_y_ddi_translations_dp[] = { - { 0x00001017, 0x000000A1, 0x0 }, - { 0x00005012, 0x00000088, 0x0 }, - { 0x80007011, 0x000000CD, 0x3 }, - { 0x8000800F, 0x000000C0, 0x3 }, - { 0x00001017, 0x0000009D, 0x0 }, - { 0x80005012, 0x000000C0, 0x3 }, - { 0x80007011, 0x000000C0, 0x3 }, - { 0x00001017, 0x0000004C, 0x0 }, - { 0x80005012, 0x000000C0, 0x3 }, +static const union intel_ddi_buf_trans_entry kbl_y_ddi_translations_dp[] = { + { .hsw = { 0x00001017, 0x000000A1, 0x0 } }, + { .hsw = { 0x00005012, 0x00000088, 0x0 } }, + { .hsw = { 0x80007011, 0x000000CD, 0x3 } }, + { .hsw = { 0x8000800F, 0x000000C0, 0x3 } }, + { .hsw = { 0x00001017, 0x0000009D, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, + { .hsw = { 0x80007011, 0x000000C0, 0x3 } }, + { .hsw = { 0x00001017, 0x0000004C, 0x0 } }, + { .hsw = { 0x80005012, 0x000000C0, 0x3 } }, }; /* * Skylake/Kabylake H and S * eDP 1.4 low vswing translation parameters */ -static const struct hsw_ddi_buf_trans skl_ddi_translations_edp[] = { - { 0x00000018, 0x000000A8, 0x0 }, - { 0x00004013, 0x000000A9, 0x0 }, - { 0x00007011, 0x000000A2, 0x0 }, - { 0x00009010, 0x0000009C, 0x0 }, - { 0x00000018, 0x000000A9, 0x0 }, - { 0x00006013, 0x000000A2, 0x0 }, - { 0x00007011, 0x000000A6, 0x0 }, - { 0x00000018, 0x000000AB, 0x0 }, - { 0x00007013, 0x0000009F, 0x0 }, - { 0x00000018, 0x000000DF, 0x0 }, +static const union intel_ddi_buf_trans_entry skl_ddi_translations_edp[] = { + { .hsw = { 0x00000018, 0x000000A8, 0x0 } }, + { .hsw = { 0x00004013, 0x000000A9, 0x0 } }, + { .hsw = { 0x00007011, 0x000000A2, 0x0 } }, + { .hsw = { 0x00009010, 0x0000009C, 0x0 } }, + { .hsw = { 0x00000018, 0x000000A9, 0x0 } }, + { .hsw = { 0x00006013, 0x000000A2, 0x0 } }, + { .hsw = { 0x00007011, 0x000000A6, 0x0 } }, + { .hsw = { 0x00000018, 0x000000AB, 0x0 } }, + { .hsw = { 0x00007013, 0x0000009F, 0x0 } }, + { .hsw = { 0x00000018, 0x000000DF, 0x0 } }, }; /* * Skylake/Kabylake U * eDP 1.4 low vswing translation parameters */ -static const struct hsw_ddi_buf_trans skl_u_ddi_translations_edp[] = { - { 0x00000018, 0x000000A8, 0x0 }, - { 0x00004013, 0x000000A9, 0x0 }, - { 0x00007011, 0x000000A2, 0x0 }, - { 0x00009010, 0x0000009C, 0x0 }, - { 0x00000018, 0x000000A9, 0x0 }, - { 0x00006013, 0x000000A2, 0x0 }, - { 0x00007011, 0x000000A6, 0x0 }, - { 0x00002016, 0x000000AB, 0x0 }, - { 0x00005013, 0x0000009F, 0x0 }, - { 0x00000018, 0x000000DF, 0x0 }, +static const union intel_ddi_buf_trans_entry skl_u_ddi_translations_edp[] = { + { .hsw = { 0x00000018, 0x000000A8, 0x0 } }, + { .hsw = { 0x00004013, 0x000000A9, 0x0 } }, + { .hsw = { 0x00007011, 0x000000A2, 0x0 } }, + { .hsw = { 0x00009010, 0x0000009C, 0x0 } }, + { .hsw = { 0x00000018, 0x000000A9, 0x0 } }, + { .hsw = { 0x00006013, 0x000000A2, 0x0 } }, + { .hsw = { 0x00007011, 0x000000A6, 0x0 } }, + { .hsw = { 0x00002016, 0x000000AB, 0x0 } }, + { .hsw = { 0x00005013, 0x0000009F, 0x0 } }, + { .hsw = { 0x00000018, 0x000000DF, 0x0 } }, }; /* * Skylake/Kabylake Y * eDP 1.4 low vswing translation parameters */ -static const struct hsw_ddi_buf_trans skl_y_ddi_translations_edp[] = { - { 0x00000018, 0x000000A8, 0x0 }, - { 0x00004013, 0x000000AB, 0x0 }, - { 0x00007011, 0x000000A4, 0x0 }, - { 0x00009010, 0x000000DF, 0x0 }, - { 0x00000018, 0x000000AA, 0x0 }, - { 0x00006013, 0x000000A4, 0x0 }, - { 0x00007011, 0x0000009D, 0x0 }, - { 0x00000018, 0x000000A0, 0x0 }, - { 0x00006012, 0x000000DF, 0x0 }, - { 0x00000018, 0x0000008A, 0x0 }, +static const union intel_ddi_buf_trans_entry skl_y_ddi_translations_edp[] = { + { .hsw = { 0x00000018, 0x000000A8, 0x0 } }, + { .hsw = { 0x00004013, 0x000000AB, 0x0 } }, + { .hsw = { 0x00007011, 0x000000A4, 0x0 } }, + { .hsw = { 0x00009010, 0x000000DF, 0x0 } }, + { .hsw = { 0x00000018, 0x000000AA, 0x0 } }, + { .hsw = { 0x00006013, 0x000000A4, 0x0 } }, + { .hsw = { 0x00007011, 0x0000009D, 0x0 } }, + { .hsw = { 0x00000018, 0x000000A0, 0x0 } }, + { .hsw = { 0x00006012, 0x000000DF, 0x0 } }, + { .hsw = { 0x00000018, 0x0000008A, 0x0 } }, }; /* Skylake/Kabylake U, H and S */ -static const struct hsw_ddi_buf_trans skl_ddi_translations_hdmi[] = { - { 0x00000018, 0x000000AC, 0x0 }, - { 0x00005012, 0x0000009D, 0x0 }, - { 0x00007011, 0x00000088, 0x0 }, - { 0x00000018, 0x000000A1, 0x0 }, - { 0x00000018, 0x00000098, 0x0 }, - { 0x00004013, 0x00000088, 0x0 }, - { 0x80006012, 0x000000CD, 0x1 }, - { 0x00000018, 0x000000DF, 0x0 }, - { 0x80003015, 0x000000CD, 0x1 }, /* Default */ - { 0x80003015, 0x000000C0, 0x1 }, - { 0x80000018, 0x000000C0, 0x1 }, +static const union intel_ddi_buf_trans_entry skl_ddi_translations_hdmi[] = { + { .hsw = { 0x00000018, 0x000000AC, 0x0 } }, + { .hsw = { 0x00005012, 0x0000009D, 0x0 } }, + { .hsw = { 0x00007011, 0x00000088, 0x0 } }, + { .hsw = { 0x00000018, 0x000000A1, 0x0 } }, + { .hsw = { 0x00000018, 0x00000098, 0x0 } }, + { .hsw = { 0x00004013, 0x00000088, 0x0 } }, + { .hsw = { 0x80006012, 0x000000CD, 0x1 } }, + { .hsw = { 0x00000018, 0x000000DF, 0x0 } }, + { .hsw = { 0x80003015, 0x000000CD, 0x1 } }, /* Default */ + { .hsw = { 0x80003015, 0x000000C0, 0x1 } }, + { .hsw = { 0x80000018, 0x000000C0, 0x1 } }, }; /* Skylake/Kabylake Y */ -static const struct hsw_ddi_buf_trans skl_y_ddi_translations_hdmi[] = { - { 0x00000018, 0x000000A1, 0x0 }, - { 0x00005012, 0x000000DF, 0x0 }, - { 0x80007011, 0x000000CB, 0x3 }, - { 0x00000018, 0x000000A4, 0x0 }, - { 0x00000018, 0x0000009D, 0x0 }, - { 0x00004013, 0x00000080, 0x0 }, - { 0x80006013, 0x000000C0, 0x3 }, - { 0x00000018, 0x0000008A, 0x0 }, - { 0x80003015, 0x000000C0, 0x3 }, /* Default */ - { 0x80003015, 0x000000C0, 0x3 }, - { 0x80000018, 0x000000C0, 0x3 }, +static const union intel_ddi_buf_trans_entry skl_y_ddi_translations_hdmi[] = { + { .hsw = { 0x00000018, 0x000000A1, 0x0 } }, + { .hsw = { 0x00005012, 0x000000DF, 0x0 } }, + { .hsw = { 0x80007011, 0x000000CB, 0x3 } }, + { .hsw = { 0x00000018, 0x000000A4, 0x0 } }, + { .hsw = { 0x00000018, 0x0000009D, 0x0 } }, + { .hsw = { 0x00004013, 0x00000080, 0x0 } }, + { .hsw = { 0x80006013, 0x000000C0, 0x3 } }, + { .hsw = { 0x00000018, 0x0000008A, 0x0 } }, + { .hsw = { 0x80003015, 0x000000C0, 0x3 } }, /* Default */ + { .hsw = { 0x80003015, 0x000000C0, 0x3 } }, + { .hsw = { 0x80000018, 0x000000C0, 0x3 } }, }; -static const struct bxt_ddi_buf_trans bxt_ddi_translations_dp[] = { - /* Idx NT mV diff db */ - { 52, 0x9A, 0, 128, }, /* 0: 400 0 */ - { 78, 0x9A, 0, 85, }, /* 1: 400 3.5 */ - { 104, 0x9A, 0, 64, }, /* 2: 400 6 */ - { 154, 0x9A, 0, 43, }, /* 3: 400 9.5 */ - { 77, 0x9A, 0, 128, }, /* 4: 600 0 */ - { 116, 0x9A, 0, 85, }, /* 5: 600 3.5 */ - { 154, 0x9A, 0, 64, }, /* 6: 600 6 */ - { 102, 0x9A, 0, 128, }, /* 7: 800 0 */ - { 154, 0x9A, 0, 85, }, /* 8: 800 3.5 */ - { 154, 0x9A, 1, 128, }, /* 9: 1200 0 */ +static const union intel_ddi_buf_trans_entry bxt_ddi_translations_dp[] = { + /* Idx NT mV diff db */ + { .bxt = { 52, 0x9A, 0, 128, } }, /* 0: 400 0 */ + { .bxt = { 78, 0x9A, 0, 85, } }, /* 1: 400 3.5 */ + { .bxt = { 104, 0x9A, 0, 64, } }, /* 2: 400 6 */ + { .bxt = { 154, 0x9A, 0, 43, } }, /* 3: 400 9.5 */ + { .bxt = { 77, 0x9A, 0, 128, } }, /* 4: 600 0 */ + { .bxt = { 116, 0x9A, 0, 85, } }, /* 5: 600 3.5 */ + { .bxt = { 154, 0x9A, 0, 64, } }, /* 6: 600 6 */ + { .bxt = { 102, 0x9A, 0, 128, } }, /* 7: 800 0 */ + { .bxt = { 154, 0x9A, 0, 85, } }, /* 8: 800 3.5 */ + { .bxt = { 154, 0x9A, 1, 128, } }, /* 9: 1200 0 */ }; -static const struct bxt_ddi_buf_trans bxt_ddi_translations_edp[] = { +static const union intel_ddi_buf_trans_entry bxt_ddi_translations_edp[] = { /* Idx NT mV diff db */ - { 26, 0, 0, 128, }, /* 0: 200 0 */ - { 38, 0, 0, 112, }, /* 1: 200 1.5 */ - { 48, 0, 0, 96, }, /* 2: 200 4 */ - { 54, 0, 0, 69, }, /* 3: 200 6 */ - { 32, 0, 0, 128, }, /* 4: 250 0 */ - { 48, 0, 0, 104, }, /* 5: 250 1.5 */ - { 54, 0, 0, 85, }, /* 6: 250 4 */ - { 43, 0, 0, 128, }, /* 7: 300 0 */ - { 54, 0, 0, 101, }, /* 8: 300 1.5 */ - { 48, 0, 0, 128, }, /* 9: 300 0 */ + { .bxt = { 26, 0, 0, 128, } }, /* 0: 200 0 */ + { .bxt = { 38, 0, 0, 112, } }, /* 1: 200 1.5 */ + { .bxt = { 48, 0, 0, 96, } }, /* 2: 200 4 */ + { .bxt = { 54, 0, 0, 69, } }, /* 3: 200 6 */ + { .bxt = { 32, 0, 0, 128, } }, /* 4: 250 0 */ + { .bxt = { 48, 0, 0, 104, } }, /* 5: 250 1.5 */ + { .bxt = { 54, 0, 0, 85, } }, /* 6: 250 4 */ + { .bxt = { 43, 0, 0, 128, } }, /* 7: 300 0 */ + { .bxt = { 54, 0, 0, 101, } }, /* 8: 300 1.5 */ + { .bxt = { 48, 0, 0, 128, } }, /* 9: 300 0 */ }; /* BSpec has 2 recommended values - entries 0 and 8. * Using the entry with higher vswing. */ -static const struct bxt_ddi_buf_trans bxt_ddi_translations_hdmi[] = { - /* Idx NT mV diff db */ - { 52, 0x9A, 0, 128, }, /* 0: 400 0 */ - { 52, 0x9A, 0, 85, }, /* 1: 400 3.5 */ - { 52, 0x9A, 0, 64, }, /* 2: 400 6 */ - { 42, 0x9A, 0, 43, }, /* 3: 400 9.5 */ - { 77, 0x9A, 0, 128, }, /* 4: 600 0 */ - { 77, 0x9A, 0, 85, }, /* 5: 600 3.5 */ - { 77, 0x9A, 0, 64, }, /* 6: 600 6 */ - { 102, 0x9A, 0, 128, }, /* 7: 800 0 */ - { 102, 0x9A, 0, 85, }, /* 8: 800 3.5 */ - { 154, 0x9A, 1, 128, }, /* 9: 1200 0 */ +static const union intel_ddi_buf_trans_entry bxt_ddi_translations_hdmi[] = { + /* Idx NT mV diff db */ + { .bxt = { 52, 0x9A, 0, 128, } }, /* 0: 400 0 */ + { .bxt = { 52, 0x9A, 0, 85, } }, /* 1: 400 3.5 */ + { .bxt = { 52, 0x9A, 0, 64, } }, /* 2: 400 6 */ + { .bxt = { 42, 0x9A, 0, 43, } }, /* 3: 400 9.5 */ + { .bxt = { 77, 0x9A, 0, 128, } }, /* 4: 600 0 */ + { .bxt = { 77, 0x9A, 0, 85, } }, /* 5: 600 3.5 */ + { .bxt = { 77, 0x9A, 0, 64, } }, /* 6: 600 6 */ + { .bxt = { 102, 0x9A, 0, 128, } }, /* 7: 800 0 */ + { .bxt = { 102, 0x9A, 0, 85, } }, /* 8: 800 3.5 */ + { .bxt = { 154, 0x9A, 1, 128, } }, /* 9: 1200 0 */ }; /* Voltage Swing Programming for VccIO 0.85V for DP */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_dp_0_85V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x5D, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x6A, 0x38, 0x00, 0x07 }, /* 350 500 3.1 */ - { 0xB, 0x7A, 0x32, 0x00, 0x0D }, /* 350 700 6.0 */ - { 0x6, 0x7C, 0x2D, 0x00, 0x12 }, /* 350 900 8.2 */ - { 0xA, 0x69, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xB, 0x7A, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ - { 0x6, 0x7C, 0x30, 0x00, 0x0F }, /* 500 900 5.1 */ - { 0xB, 0x7D, 0x3C, 0x00, 0x03 }, /* 650 725 0.9 */ - { 0x6, 0x7C, 0x34, 0x00, 0x0B }, /* 600 900 3.5 */ - { 0x6, 0x7B, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_dp_0_85V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x5D, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x6A, 0x38, 0x00, 0x07 } }, /* 350 500 3.1 */ + { .cnl = { 0xB, 0x7A, 0x32, 0x00, 0x0D } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7C, 0x2D, 0x00, 0x12 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x69, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xB, 0x7A, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7C, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ + { .cnl = { 0xB, 0x7D, 0x3C, 0x00, 0x03 } }, /* 650 725 0.9 */ + { .cnl = { 0x6, 0x7C, 0x34, 0x00, 0x0B } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7B, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ }; /* Voltage Swing Programming for VccIO 0.85V for HDMI */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_hdmi_0_85V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x60, 0x3F, 0x00, 0x00 }, /* 450 450 0.0 */ - { 0xB, 0x73, 0x36, 0x00, 0x09 }, /* 450 650 3.2 */ - { 0x6, 0x7F, 0x31, 0x00, 0x0E }, /* 450 850 5.5 */ - { 0xB, 0x73, 0x3F, 0x00, 0x00 }, /* 650 650 0.0 */ - { 0x6, 0x7F, 0x37, 0x00, 0x08 }, /* 650 850 2.3 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 850 850 0.0 */ - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_hdmi_0_85V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x60, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ + { .cnl = { 0xB, 0x73, 0x36, 0x00, 0x09 } }, /* 450 650 3.2 */ + { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } }, /* 450 850 5.5 */ + { .cnl = { 0xB, 0x73, 0x3F, 0x00, 0x00 } }, /* 650 650 0.0 */ + { .cnl = { 0x6, 0x7F, 0x37, 0x00, 0x08 } }, /* 650 850 2.3 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 850 850 0.0 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ }; /* Voltage Swing Programming for VccIO 0.85V for eDP */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_edp_0_85V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x66, 0x3A, 0x00, 0x05 }, /* 384 500 2.3 */ - { 0x0, 0x7F, 0x38, 0x00, 0x07 }, /* 153 200 2.3 */ - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 192 250 2.3 */ - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 230 300 2.3 */ - { 0x9, 0x7F, 0x38, 0x00, 0x07 }, /* 269 350 2.3 */ - { 0xA, 0x66, 0x3C, 0x00, 0x03 }, /* 446 500 1.0 */ - { 0xB, 0x70, 0x3C, 0x00, 0x03 }, /* 460 600 2.3 */ - { 0xC, 0x75, 0x3C, 0x00, 0x03 }, /* 537 700 2.3 */ - { 0x2, 0x7F, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_edp_0_85V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x66, 0x3A, 0x00, 0x05 } }, /* 384 500 2.3 */ + { .cnl = { 0x0, 0x7F, 0x38, 0x00, 0x07 } }, /* 153 200 2.3 */ + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 192 250 2.3 */ + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 230 300 2.3 */ + { .cnl = { 0x9, 0x7F, 0x38, 0x00, 0x07 } }, /* 269 350 2.3 */ + { .cnl = { 0xA, 0x66, 0x3C, 0x00, 0x03 } }, /* 446 500 1.0 */ + { .cnl = { 0xB, 0x70, 0x3C, 0x00, 0x03 } }, /* 460 600 2.3 */ + { .cnl = { 0xC, 0x75, 0x3C, 0x00, 0x03 } }, /* 537 700 2.3 */ + { .cnl = { 0x2, 0x7F, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ }; /* Voltage Swing Programming for VccIO 0.95V for DP */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_dp_0_95V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x5D, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x6A, 0x38, 0x00, 0x07 }, /* 350 500 3.1 */ - { 0xB, 0x7A, 0x32, 0x00, 0x0D }, /* 350 700 6.0 */ - { 0x6, 0x7C, 0x2D, 0x00, 0x12 }, /* 350 900 8.2 */ - { 0xA, 0x69, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xB, 0x7A, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ - { 0x6, 0x7C, 0x30, 0x00, 0x0F }, /* 500 900 5.1 */ - { 0xB, 0x7D, 0x3C, 0x00, 0x03 }, /* 650 725 0.9 */ - { 0x6, 0x7C, 0x34, 0x00, 0x0B }, /* 600 900 3.5 */ - { 0x6, 0x7B, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_dp_0_95V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x5D, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x6A, 0x38, 0x00, 0x07 } }, /* 350 500 3.1 */ + { .cnl = { 0xB, 0x7A, 0x32, 0x00, 0x0D } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7C, 0x2D, 0x00, 0x12 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x69, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xB, 0x7A, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7C, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ + { .cnl = { 0xB, 0x7D, 0x3C, 0x00, 0x03 } }, /* 650 725 0.9 */ + { .cnl = { 0x6, 0x7C, 0x34, 0x00, 0x0B } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7B, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ }; /* Voltage Swing Programming for VccIO 0.95V for HDMI */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_hdmi_0_95V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x5C, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ - { 0xB, 0x69, 0x37, 0x00, 0x08 }, /* 400 600 3.5 */ - { 0x5, 0x76, 0x31, 0x00, 0x0E }, /* 400 800 6.0 */ - { 0xA, 0x5E, 0x3F, 0x00, 0x00 }, /* 450 450 0.0 */ - { 0xB, 0x69, 0x3F, 0x00, 0x00 }, /* 600 600 0.0 */ - { 0xB, 0x79, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ - { 0x6, 0x7D, 0x32, 0x00, 0x0D }, /* 600 1000 4.4 */ - { 0x5, 0x76, 0x3F, 0x00, 0x00 }, /* 800 800 0.0 */ - { 0x6, 0x7D, 0x39, 0x00, 0x06 }, /* 800 1000 1.9 */ - { 0x6, 0x7F, 0x39, 0x00, 0x06 }, /* 850 1050 1.8 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1050 1050 0.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_hdmi_0_95V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x5C, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ + { .cnl = { 0xB, 0x69, 0x37, 0x00, 0x08 } }, /* 400 600 3.5 */ + { .cnl = { 0x5, 0x76, 0x31, 0x00, 0x0E } }, /* 400 800 6.0 */ + { .cnl = { 0xA, 0x5E, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ + { .cnl = { 0xB, 0x69, 0x3F, 0x00, 0x00 } }, /* 600 600 0.0 */ + { .cnl = { 0xB, 0x79, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ + { .cnl = { 0x6, 0x7D, 0x32, 0x00, 0x0D } }, /* 600 1000 4.4 */ + { .cnl = { 0x5, 0x76, 0x3F, 0x00, 0x00 } }, /* 800 800 0.0 */ + { .cnl = { 0x6, 0x7D, 0x39, 0x00, 0x06 } }, /* 800 1000 1.9 */ + { .cnl = { 0x6, 0x7F, 0x39, 0x00, 0x06 } }, /* 850 1050 1.8 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1050 1050 0.0 */ }; /* Voltage Swing Programming for VccIO 0.95V for eDP */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_edp_0_95V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x61, 0x3A, 0x00, 0x05 }, /* 384 500 2.3 */ - { 0x0, 0x7F, 0x38, 0x00, 0x07 }, /* 153 200 2.3 */ - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 192 250 2.3 */ - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 230 300 2.3 */ - { 0x9, 0x7F, 0x38, 0x00, 0x07 }, /* 269 350 2.3 */ - { 0xA, 0x61, 0x3C, 0x00, 0x03 }, /* 446 500 1.0 */ - { 0xB, 0x68, 0x39, 0x00, 0x06 }, /* 460 600 2.3 */ - { 0xC, 0x6E, 0x39, 0x00, 0x06 }, /* 537 700 2.3 */ - { 0x4, 0x7F, 0x3A, 0x00, 0x05 }, /* 460 600 2.3 */ - { 0x2, 0x7F, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_edp_0_95V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x61, 0x3A, 0x00, 0x05 } }, /* 384 500 2.3 */ + { .cnl = { 0x0, 0x7F, 0x38, 0x00, 0x07 } }, /* 153 200 2.3 */ + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 192 250 2.3 */ + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 230 300 2.3 */ + { .cnl = { 0x9, 0x7F, 0x38, 0x00, 0x07 } }, /* 269 350 2.3 */ + { .cnl = { 0xA, 0x61, 0x3C, 0x00, 0x03 } }, /* 446 500 1.0 */ + { .cnl = { 0xB, 0x68, 0x39, 0x00, 0x06 } }, /* 460 600 2.3 */ + { .cnl = { 0xC, 0x6E, 0x39, 0x00, 0x06 } }, /* 537 700 2.3 */ + { .cnl = { 0x4, 0x7F, 0x3A, 0x00, 0x05 } }, /* 460 600 2.3 */ + { .cnl = { 0x2, 0x7F, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ }; /* Voltage Swing Programming for VccIO 1.05V for DP */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_dp_1_05V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x58, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ - { 0xB, 0x64, 0x37, 0x00, 0x08 }, /* 400 600 3.5 */ - { 0x5, 0x70, 0x31, 0x00, 0x0E }, /* 400 800 6.0 */ - { 0x6, 0x7F, 0x2C, 0x00, 0x13 }, /* 400 1050 8.4 */ - { 0xB, 0x64, 0x3F, 0x00, 0x00 }, /* 600 600 0.0 */ - { 0x5, 0x73, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ - { 0x6, 0x7F, 0x30, 0x00, 0x0F }, /* 550 1050 5.6 */ - { 0x5, 0x76, 0x3E, 0x00, 0x01 }, /* 850 900 0.5 */ - { 0x6, 0x7F, 0x36, 0x00, 0x09 }, /* 750 1050 2.9 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1050 1050 0.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_dp_1_05V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x58, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ + { .cnl = { 0xB, 0x64, 0x37, 0x00, 0x08 } }, /* 400 600 3.5 */ + { .cnl = { 0x5, 0x70, 0x31, 0x00, 0x0E } }, /* 400 800 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 400 1050 8.4 */ + { .cnl = { 0xB, 0x64, 0x3F, 0x00, 0x00 } }, /* 600 600 0.0 */ + { .cnl = { 0x5, 0x73, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 550 1050 5.6 */ + { .cnl = { 0x5, 0x76, 0x3E, 0x00, 0x01 } }, /* 850 900 0.5 */ + { .cnl = { 0x6, 0x7F, 0x36, 0x00, 0x09 } }, /* 750 1050 2.9 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1050 1050 0.0 */ }; /* Voltage Swing Programming for VccIO 1.05V for HDMI */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_hdmi_1_05V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x58, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ - { 0xB, 0x64, 0x37, 0x00, 0x08 }, /* 400 600 3.5 */ - { 0x5, 0x70, 0x31, 0x00, 0x0E }, /* 400 800 6.0 */ - { 0xA, 0x5B, 0x3F, 0x00, 0x00 }, /* 450 450 0.0 */ - { 0xB, 0x64, 0x3F, 0x00, 0x00 }, /* 600 600 0.0 */ - { 0x5, 0x73, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ - { 0x6, 0x7C, 0x32, 0x00, 0x0D }, /* 600 1000 4.4 */ - { 0x5, 0x70, 0x3F, 0x00, 0x00 }, /* 800 800 0.0 */ - { 0x6, 0x7C, 0x39, 0x00, 0x06 }, /* 800 1000 1.9 */ - { 0x6, 0x7F, 0x39, 0x00, 0x06 }, /* 850 1050 1.8 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1050 1050 0.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_hdmi_1_05V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x58, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ + { .cnl = { 0xB, 0x64, 0x37, 0x00, 0x08 } }, /* 400 600 3.5 */ + { .cnl = { 0x5, 0x70, 0x31, 0x00, 0x0E } }, /* 400 800 6.0 */ + { .cnl = { 0xA, 0x5B, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ + { .cnl = { 0xB, 0x64, 0x3F, 0x00, 0x00 } }, /* 600 600 0.0 */ + { .cnl = { 0x5, 0x73, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ + { .cnl = { 0x6, 0x7C, 0x32, 0x00, 0x0D } }, /* 600 1000 4.4 */ + { .cnl = { 0x5, 0x70, 0x3F, 0x00, 0x00 } }, /* 800 800 0.0 */ + { .cnl = { 0x6, 0x7C, 0x39, 0x00, 0x06 } }, /* 800 1000 1.9 */ + { .cnl = { 0x6, 0x7F, 0x39, 0x00, 0x06 } }, /* 850 1050 1.8 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1050 1050 0.0 */ }; /* Voltage Swing Programming for VccIO 1.05V for eDP */ -static const struct cnl_ddi_buf_trans cnl_ddi_translations_edp_1_05V[] = { - /* NT mV Trans mV db */ - { 0xA, 0x5E, 0x3A, 0x00, 0x05 }, /* 384 500 2.3 */ - { 0x0, 0x7F, 0x38, 0x00, 0x07 }, /* 153 200 2.3 */ - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 192 250 2.3 */ - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 230 300 2.3 */ - { 0x9, 0x7F, 0x38, 0x00, 0x07 }, /* 269 350 2.3 */ - { 0xA, 0x5E, 0x3C, 0x00, 0x03 }, /* 446 500 1.0 */ - { 0xB, 0x64, 0x39, 0x00, 0x06 }, /* 460 600 2.3 */ - { 0xE, 0x6A, 0x39, 0x00, 0x06 }, /* 537 700 2.3 */ - { 0x2, 0x7F, 0x3F, 0x00, 0x00 }, /* 400 400 0.0 */ +static const union intel_ddi_buf_trans_entry cnl_ddi_translations_edp_1_05V[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x5E, 0x3A, 0x00, 0x05 } }, /* 384 500 2.3 */ + { .cnl = { 0x0, 0x7F, 0x38, 0x00, 0x07 } }, /* 153 200 2.3 */ + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 192 250 2.3 */ + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 230 300 2.3 */ + { .cnl = { 0x9, 0x7F, 0x38, 0x00, 0x07 } }, /* 269 350 2.3 */ + { .cnl = { 0xA, 0x5E, 0x3C, 0x00, 0x03 } }, /* 446 500 1.0 */ + { .cnl = { 0xB, 0x64, 0x39, 0x00, 0x06 } }, /* 460 600 2.3 */ + { .cnl = { 0xE, 0x6A, 0x39, 0x00, 0x06 } }, /* 537 700 2.3 */ + { .cnl = { 0x2, 0x7F, 0x3F, 0x00, 0x00 } }, /* 400 400 0.0 */ }; /* icl_combo_phy_ddi_translations */ -static const struct cnl_ddi_buf_trans icl_combo_phy_ddi_translations_dp_hbr2[] = { - /* NT mV Trans mV db */ - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ - { 0xC, 0x71, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ - { 0x6, 0x7F, 0x2B, 0x00, 0x14 }, /* 350 900 8.2 */ - { 0xA, 0x4C, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x73, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ - { 0xC, 0x6C, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ -}; - -static const struct cnl_ddi_buf_trans icl_combo_phy_ddi_translations_edp_hbr2[] = { - /* NT mV Trans mV db */ - { 0x0, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 200 250 1.9 */ - { 0x1, 0x7F, 0x33, 0x00, 0x0C }, /* 200 300 3.5 */ - { 0x9, 0x7F, 0x31, 0x00, 0x0E }, /* 200 350 4.9 */ - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 250 300 1.6 */ - { 0x9, 0x7F, 0x35, 0x00, 0x0A }, /* 250 350 2.9 */ - { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ - { 0x9, 0x7F, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ - { 0x9, 0x7F, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ -}; - -static const struct cnl_ddi_buf_trans icl_combo_phy_ddi_translations_edp_hbr3[] = { - /* NT mV Trans mV db */ - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ - { 0xC, 0x71, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ - { 0x6, 0x7F, 0x2B, 0x00, 0x14 }, /* 350 900 8.2 */ - { 0xA, 0x4C, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x73, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ - { 0xC, 0x6C, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ -}; - -static const struct cnl_ddi_buf_trans icl_combo_phy_ddi_translations_hdmi[] = { - /* NT mV Trans mV db */ - { 0xA, 0x60, 0x3F, 0x00, 0x00 }, /* 450 450 0.0 */ - { 0xB, 0x73, 0x36, 0x00, 0x09 }, /* 450 650 3.2 */ - { 0x6, 0x7F, 0x31, 0x00, 0x0E }, /* 450 850 5.5 */ - { 0xB, 0x73, 0x3F, 0x00, 0x00 }, /* 650 650 0.0 ALS */ - { 0x6, 0x7F, 0x37, 0x00, 0x08 }, /* 650 850 2.3 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 850 850 0.0 */ - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 850 3.0 */ -}; - -static const struct cnl_ddi_buf_trans ehl_combo_phy_ddi_translations_dp[] = { - /* NT mV Trans mV db */ - { 0xA, 0x33, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x47, 0x36, 0x00, 0x09 }, /* 350 500 3.1 */ - { 0xC, 0x64, 0x34, 0x00, 0x0B }, /* 350 700 6.0 */ - { 0x6, 0x7F, 0x30, 0x00, 0x0F }, /* 350 900 8.2 */ - { 0xA, 0x46, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x64, 0x38, 0x00, 0x07 }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x32, 0x00, 0x0D }, /* 500 900 5.1 */ - { 0xC, 0x61, 0x3F, 0x00, 0x00 }, /* 650 700 0.6 */ - { 0x6, 0x7F, 0x38, 0x00, 0x07 }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ -}; - -static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr[] = { - /* NT mV Trans mV db */ - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ - { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 200 250 1.9 */ - { 0x1, 0x7F, 0x33, 0x00, 0x0C }, /* 200 300 3.5 */ - { 0xA, 0x35, 0x36, 0x00, 0x09 }, /* 200 350 4.9 */ - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ - { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 250 300 1.6 */ - { 0xA, 0x35, 0x35, 0x00, 0x0A }, /* 250 350 2.9 */ - { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ - { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ -}; - -static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr2[] = { - /* NT mV Trans mV db */ - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 250 1.9 */ - { 0x1, 0x7F, 0x3D, 0x00, 0x02 }, /* 200 300 3.5 */ - { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 200 350 4.9 */ - { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ - { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 300 1.6 */ - { 0xA, 0x35, 0x3A, 0x00, 0x05 }, /* 250 350 2.9 */ - { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ - { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ -}; - -static const struct cnl_ddi_buf_trans dg1_combo_phy_ddi_translations_dp_rbr_hbr[] = { - /* NT mV Trans mV db */ - { 0xA, 0x32, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x48, 0x35, 0x00, 0x0A }, /* 350 500 3.1 */ - { 0xC, 0x63, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ - { 0x6, 0x7F, 0x2C, 0x00, 0x13 }, /* 350 900 8.2 */ - { 0xA, 0x43, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x60, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x30, 0x00, 0x0F }, /* 500 900 5.1 */ - { 0xC, 0x60, 0x3F, 0x00, 0x00 }, /* 650 700 0.6 */ - { 0x6, 0x7F, 0x37, 0x00, 0x08 }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ -}; - -static const struct cnl_ddi_buf_trans dg1_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { - /* NT mV Trans mV db */ - { 0xA, 0x32, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x48, 0x35, 0x00, 0x0A }, /* 350 500 3.1 */ - { 0xC, 0x63, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ - { 0x6, 0x7F, 0x2C, 0x00, 0x13 }, /* 350 900 8.2 */ - { 0xA, 0x43, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x60, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x30, 0x00, 0x0F }, /* 500 900 5.1 */ - { 0xC, 0x58, 0x3F, 0x00, 0x00 }, /* 650 700 0.6 */ - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ -}; - -static const struct icl_mg_phy_ddi_buf_trans icl_mg_phy_ddi_translations_rbr_hbr[] = { - /* Voltage swing pre-emphasis */ - { 0x18, 0x00, 0x00 }, /* 0 0 */ - { 0x1D, 0x00, 0x05 }, /* 0 1 */ - { 0x24, 0x00, 0x0C }, /* 0 2 */ - { 0x2B, 0x00, 0x14 }, /* 0 3 */ - { 0x21, 0x00, 0x00 }, /* 1 0 */ - { 0x2B, 0x00, 0x08 }, /* 1 1 */ - { 0x30, 0x00, 0x0F }, /* 1 2 */ - { 0x31, 0x00, 0x03 }, /* 2 0 */ - { 0x34, 0x00, 0x0B }, /* 2 1 */ - { 0x3F, 0x00, 0x00 }, /* 3 0 */ -}; - -static const struct icl_mg_phy_ddi_buf_trans icl_mg_phy_ddi_translations_hbr2_hbr3[] = { - /* Voltage swing pre-emphasis */ - { 0x18, 0x00, 0x00 }, /* 0 0 */ - { 0x1D, 0x00, 0x05 }, /* 0 1 */ - { 0x24, 0x00, 0x0C }, /* 0 2 */ - { 0x2B, 0x00, 0x14 }, /* 0 3 */ - { 0x26, 0x00, 0x00 }, /* 1 0 */ - { 0x2C, 0x00, 0x07 }, /* 1 1 */ - { 0x33, 0x00, 0x0C }, /* 1 2 */ - { 0x2E, 0x00, 0x00 }, /* 2 0 */ - { 0x36, 0x00, 0x09 }, /* 2 1 */ - { 0x3F, 0x00, 0x00 }, /* 3 0 */ -}; - -static const struct icl_mg_phy_ddi_buf_trans icl_mg_phy_ddi_translations_hdmi[] = { - /* HDMI Preset VS Pre-emph */ - { 0x1A, 0x0, 0x0 }, /* 1 400mV 0dB */ - { 0x20, 0x0, 0x0 }, /* 2 500mV 0dB */ - { 0x29, 0x0, 0x0 }, /* 3 650mV 0dB */ - { 0x32, 0x0, 0x0 }, /* 4 800mV 0dB */ - { 0x3F, 0x0, 0x0 }, /* 5 1000mV 0dB */ - { 0x3A, 0x0, 0x5 }, /* 6 Full -1.5 dB */ - { 0x39, 0x0, 0x6 }, /* 7 Full -1.8 dB */ - { 0x38, 0x0, 0x7 }, /* 8 Full -2 dB */ - { 0x37, 0x0, 0x8 }, /* 9 Full -2.5 dB */ - { 0x36, 0x0, 0x9 }, /* 10 Full -3 dB */ -}; - -static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_dp_ddi_trans[] = { - /* VS pre-emp Non-trans mV Pre-emph dB */ - { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */ - { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 dB */ - { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */ - { 0x0, 0x0, 0x18 }, /* 0 3 400mV 9.5 dB */ - { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ - { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */ - { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ - { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ - { 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 dB */ - { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB HDMI default */ -}; - -static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_dp_ddi_trans_hbr2[] = { - /* VS pre-emp Non-trans mV Pre-emph dB */ - { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */ - { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 dB */ - { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */ - { 0x0, 0x0, 0x19 }, /* 0 3 400mV 9.5 dB */ - { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ - { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */ - { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ - { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ - { 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 dB */ - { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB HDMI default */ -}; - -static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_hdmi_ddi_trans[] = { - /* HDMI Preset VS Pre-emph */ - { 0x7, 0x0, 0x0 }, /* 1 400mV 0dB */ - { 0x6, 0x0, 0x0 }, /* 2 500mV 0dB */ - { 0x4, 0x0, 0x0 }, /* 3 650mV 0dB */ - { 0x2, 0x0, 0x0 }, /* 4 800mV 0dB */ - { 0x0, 0x0, 0x0 }, /* 5 1000mV 0dB */ - { 0x0, 0x0, 0x5 }, /* 6 Full -1.5 dB */ - { 0x0, 0x0, 0x6 }, /* 7 Full -1.8 dB */ - { 0x0, 0x0, 0x7 }, /* 8 Full -2 dB */ - { 0x0, 0x0, 0x8 }, /* 9 Full -2.5 dB */ - { 0x0, 0x0, 0xA }, /* 10 Full -3 dB */ -}; - -static const struct cnl_ddi_buf_trans tgl_combo_phy_ddi_translations_dp_hbr[] = { - /* NT mV Trans mV db */ - { 0xA, 0x32, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ - { 0xC, 0x71, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ - { 0x6, 0x7D, 0x2B, 0x00, 0x14 }, /* 350 900 8.2 */ - { 0xA, 0x4C, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x73, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ - { 0xC, 0x6C, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ -}; - -static const struct cnl_ddi_buf_trans tgl_combo_phy_ddi_translations_dp_hbr2[] = { - /* NT mV Trans mV db */ - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ - { 0xC, 0x63, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ - { 0x6, 0x7F, 0x2B, 0x00, 0x14 }, /* 350 900 8.2 */ - { 0xA, 0x47, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x63, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ - { 0xC, 0x61, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ - { 0x6, 0x7B, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ -}; - -static const struct cnl_ddi_buf_trans tgl_uy_combo_phy_ddi_translations_dp_hbr2[] = { - /* NT mV Trans mV db */ - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x4F, 0x36, 0x00, 0x09 }, /* 350 500 3.1 */ - { 0xC, 0x60, 0x32, 0x00, 0x0D }, /* 350 700 6.0 */ - { 0xC, 0x7F, 0x2D, 0x00, 0x12 }, /* 350 900 8.2 */ - { 0xC, 0x47, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x6F, 0x36, 0x00, 0x09 }, /* 500 700 2.9 */ - { 0x6, 0x7D, 0x32, 0x00, 0x0D }, /* 500 900 5.1 */ - { 0x6, 0x60, 0x3C, 0x00, 0x03 }, /* 650 700 0.6 */ - { 0x6, 0x7F, 0x34, 0x00, 0x0B }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ +static const union intel_ddi_buf_trans_entry icl_combo_phy_ddi_translations_dp_hbr2[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry icl_combo_phy_ddi_translations_edp_hbr2[] = { + /* NT mV Trans mV db */ + { .cnl = { 0x0, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 200 0.0 */ + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 200 250 1.9 */ + { .cnl = { 0x1, 0x7F, 0x33, 0x00, 0x0C } }, /* 200 300 3.5 */ + { .cnl = { 0x9, 0x7F, 0x31, 0x00, 0x0E } }, /* 200 350 4.9 */ + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 250 0.0 */ + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 250 300 1.6 */ + { .cnl = { 0x9, 0x7F, 0x35, 0x00, 0x0A } }, /* 250 350 2.9 */ + { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 300 300 0.0 */ + { .cnl = { 0x9, 0x7F, 0x38, 0x00, 0x07 } }, /* 300 350 1.3 */ + { .cnl = { 0x9, 0x7F, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry icl_combo_phy_ddi_translations_edp_hbr3[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry icl_combo_phy_ddi_translations_hdmi[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x60, 0x3F, 0x00, 0x00 } }, /* 450 450 0.0 */ + { .cnl = { 0xB, 0x73, 0x36, 0x00, 0x09 } }, /* 450 650 3.2 */ + { .cnl = { 0x6, 0x7F, 0x31, 0x00, 0x0E } }, /* 450 850 5.5 */ + { .cnl = { 0xB, 0x73, 0x3F, 0x00, 0x00 } }, /* 650 650 0.0 ALS */ + { .cnl = { 0x6, 0x7F, 0x37, 0x00, 0x08 } }, /* 650 850 2.3 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 850 850 0.0 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 850 3.0 */ +}; + +static const union intel_ddi_buf_trans_entry ehl_combo_phy_ddi_translations_dp[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x33, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x47, 0x36, 0x00, 0x09 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x64, 0x34, 0x00, 0x0B } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x46, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x64, 0x38, 0x00, 0x07 } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x32, 0x00, 0x0D } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x61, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x38, 0x00, 0x07 } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry jsl_combo_phy_ddi_translations_edp_hbr[] = { + /* NT mV Trans mV db */ + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 200 0.0 */ + { .cnl = { 0x8, 0x7F, 0x38, 0x00, 0x07 } }, /* 200 250 1.9 */ + { .cnl = { 0x1, 0x7F, 0x33, 0x00, 0x0C } }, /* 200 300 3.5 */ + { .cnl = { 0xA, 0x35, 0x36, 0x00, 0x09 } }, /* 200 350 4.9 */ + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 250 0.0 */ + { .cnl = { 0x1, 0x7F, 0x38, 0x00, 0x07 } }, /* 250 300 1.6 */ + { .cnl = { 0xA, 0x35, 0x35, 0x00, 0x0A } }, /* 250 350 2.9 */ + { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 300 300 0.0 */ + { .cnl = { 0xA, 0x35, 0x38, 0x00, 0x07 } }, /* 300 350 1.3 */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry jsl_combo_phy_ddi_translations_edp_hbr2[] = { + /* NT mV Trans mV db */ + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 200 0.0 */ + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 200 250 1.9 */ + { .cnl = { 0x1, 0x7F, 0x3D, 0x00, 0x02 } }, /* 200 300 3.5 */ + { .cnl = { 0xA, 0x35, 0x38, 0x00, 0x07 } }, /* 200 350 4.9 */ + { .cnl = { 0x8, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 250 0.0 */ + { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 250 300 1.6 */ + { .cnl = { 0xA, 0x35, 0x3A, 0x00, 0x05 } }, /* 250 350 2.9 */ + { .cnl = { 0x1, 0x7F, 0x3F, 0x00, 0x00 } }, /* 300 300 0.0 */ + { .cnl = { 0xA, 0x35, 0x38, 0x00, 0x07 } }, /* 300 350 1.3 */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry dg1_combo_phy_ddi_translations_dp_rbr_hbr[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x32, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x48, 0x35, 0x00, 0x0A } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x63, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x43, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x60, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x60, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x37, 0x00, 0x08 } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry dg1_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x32, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x48, 0x35, 0x00, 0x0A } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x63, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2C, 0x00, 0x13 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x43, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x60, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x58, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry icl_mg_phy_ddi_translations_rbr_hbr[] = { + /* Voltage swing pre-emphasis */ + { .mg = { 0x18, 0x00, 0x00 } }, /* 0 0 */ + { .mg = { 0x1D, 0x00, 0x05 } }, /* 0 1 */ + { .mg = { 0x24, 0x00, 0x0C } }, /* 0 2 */ + { .mg = { 0x2B, 0x00, 0x14 } }, /* 0 3 */ + { .mg = { 0x21, 0x00, 0x00 } }, /* 1 0 */ + { .mg = { 0x2B, 0x00, 0x08 } }, /* 1 1 */ + { .mg = { 0x30, 0x00, 0x0F } }, /* 1 2 */ + { .mg = { 0x31, 0x00, 0x03 } }, /* 2 0 */ + { .mg = { 0x34, 0x00, 0x0B } }, /* 2 1 */ + { .mg = { 0x3F, 0x00, 0x00 } }, /* 3 0 */ +}; + +static const union intel_ddi_buf_trans_entry icl_mg_phy_ddi_translations_hbr2_hbr3[] = { + /* Voltage swing pre-emphasis */ + { .mg = { 0x18, 0x00, 0x00 } }, /* 0 0 */ + { .mg = { 0x1D, 0x00, 0x05 } }, /* 0 1 */ + { .mg = { 0x24, 0x00, 0x0C } }, /* 0 2 */ + { .mg = { 0x2B, 0x00, 0x14 } }, /* 0 3 */ + { .mg = { 0x26, 0x00, 0x00 } }, /* 1 0 */ + { .mg = { 0x2C, 0x00, 0x07 } }, /* 1 1 */ + { .mg = { 0x33, 0x00, 0x0C } }, /* 1 2 */ + { .mg = { 0x2E, 0x00, 0x00 } }, /* 2 0 */ + { .mg = { 0x36, 0x00, 0x09 } }, /* 2 1 */ + { .mg = { 0x3F, 0x00, 0x00 } }, /* 3 0 */ +}; + +static const union intel_ddi_buf_trans_entry icl_mg_phy_ddi_translations_hdmi[] = { + /* HDMI Preset VS Pre-emph */ + { .mg = { 0x1A, 0x0, 0x0 } }, /* 1 400mV 0dB */ + { .mg = { 0x20, 0x0, 0x0 } }, /* 2 500mV 0dB */ + { .mg = { 0x29, 0x0, 0x0 } }, /* 3 650mV 0dB */ + { .mg = { 0x32, 0x0, 0x0 } }, /* 4 800mV 0dB */ + { .mg = { 0x3F, 0x0, 0x0 } }, /* 5 1000mV 0dB */ + { .mg = { 0x3A, 0x0, 0x5 } }, /* 6 Full -1.5 dB */ + { .mg = { 0x39, 0x0, 0x6 } }, /* 7 Full -1.8 dB */ + { .mg = { 0x38, 0x0, 0x7 } }, /* 8 Full -2 dB */ + { .mg = { 0x37, 0x0, 0x8 } }, /* 9 Full -2.5 dB */ + { .mg = { 0x36, 0x0, 0x9 } }, /* 10 Full -3 dB */ +}; + +static const union intel_ddi_buf_trans_entry tgl_dkl_phy_dp_ddi_trans[] = { + /* VS pre-emp Non-trans mV Pre-emph dB */ + { .dkl = { 0x7, 0x0, 0x00 } }, /* 0 0 400mV 0 dB */ + { .dkl = { 0x5, 0x0, 0x05 } }, /* 0 1 400mV 3.5 dB */ + { .dkl = { 0x2, 0x0, 0x0B } }, /* 0 2 400mV 6 dB */ + { .dkl = { 0x0, 0x0, 0x18 } }, /* 0 3 400mV 9.5 dB */ + { .dkl = { 0x5, 0x0, 0x00 } }, /* 1 0 600mV 0 dB */ + { .dkl = { 0x2, 0x0, 0x08 } }, /* 1 1 600mV 3.5 dB */ + { .dkl = { 0x0, 0x0, 0x14 } }, /* 1 2 600mV 6 dB */ + { .dkl = { 0x2, 0x0, 0x00 } }, /* 2 0 800mV 0 dB */ + { .dkl = { 0x0, 0x0, 0x0B } }, /* 2 1 800mV 3.5 dB */ + { .dkl = { 0x0, 0x0, 0x00 } }, /* 3 0 1200mV 0 dB HDMI default */ +}; + +static const union intel_ddi_buf_trans_entry tgl_dkl_phy_dp_ddi_trans_hbr2[] = { + /* VS pre-emp Non-trans mV Pre-emph dB */ + { .dkl = { 0x7, 0x0, 0x00 } }, /* 0 0 400mV 0 dB */ + { .dkl = { 0x5, 0x0, 0x05 } }, /* 0 1 400mV 3.5 dB */ + { .dkl = { 0x2, 0x0, 0x0B } }, /* 0 2 400mV 6 dB */ + { .dkl = { 0x0, 0x0, 0x19 } }, /* 0 3 400mV 9.5 dB */ + { .dkl = { 0x5, 0x0, 0x00 } }, /* 1 0 600mV 0 dB */ + { .dkl = { 0x2, 0x0, 0x08 } }, /* 1 1 600mV 3.5 dB */ + { .dkl = { 0x0, 0x0, 0x14 } }, /* 1 2 600mV 6 dB */ + { .dkl = { 0x2, 0x0, 0x00 } }, /* 2 0 800mV 0 dB */ + { .dkl = { 0x0, 0x0, 0x0B } }, /* 2 1 800mV 3.5 dB */ + { .dkl = { 0x0, 0x0, 0x00 } }, /* 3 0 1200mV 0 dB HDMI default */ +}; + +static const union intel_ddi_buf_trans_entry tgl_dkl_phy_hdmi_ddi_trans[] = { + /* HDMI Preset VS Pre-emph */ + { .dkl = { 0x7, 0x0, 0x0 } }, /* 1 400mV 0dB */ + { .dkl = { 0x6, 0x0, 0x0 } }, /* 2 500mV 0dB */ + { .dkl = { 0x4, 0x0, 0x0 } }, /* 3 650mV 0dB */ + { .dkl = { 0x2, 0x0, 0x0 } }, /* 4 800mV 0dB */ + { .dkl = { 0x0, 0x0, 0x0 } }, /* 5 1000mV 0dB */ + { .dkl = { 0x0, 0x0, 0x5 } }, /* 6 Full -1.5 dB */ + { .dkl = { 0x0, 0x0, 0x6 } }, /* 7 Full -1.8 dB */ + { .dkl = { 0x0, 0x0, 0x7 } }, /* 8 Full -2 dB */ + { .dkl = { 0x0, 0x0, 0x8 } }, /* 9 Full -2.5 dB */ + { .dkl = { 0x0, 0x0, 0xA } }, /* 10 Full -3 dB */ +}; + +static const union intel_ddi_buf_trans_entry tgl_combo_phy_ddi_translations_dp_hbr[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x32, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x71, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7D, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x6C, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry tgl_combo_phy_ddi_translations_dp_hbr2[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x63, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2B, 0x00, 0x14 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x63, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x61, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7B, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ +}; + +static const union intel_ddi_buf_trans_entry tgl_uy_combo_phy_ddi_translations_dp_hbr2[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x36, 0x00, 0x09 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x60, 0x32, 0x00, 0x0D } }, /* 350 700 6.0 */ + { .cnl = { 0xC, 0x7F, 0x2D, 0x00, 0x12 } }, /* 350 900 8.2 */ + { .cnl = { 0xC, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x6F, 0x36, 0x00, 0x09 } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7D, 0x32, 0x00, 0x0D } }, /* 500 900 5.1 */ + { .cnl = { 0x6, 0x60, 0x3C, 0x00, 0x03 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x34, 0x00, 0x0B } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ }; /* * Cloned the HOBL entry to comply with the voltage and pre-emphasis entries * that DisplayPort specification requires */ -static const struct cnl_ddi_buf_trans tgl_combo_phy_ddi_translations_edp_hbr2_hobl[] = { - /* VS pre-emp */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 0 0 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 0 1 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 0 2 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 0 3 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1 0 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1 1 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 1 2 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 2 0 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 2 1 */ +static const union intel_ddi_buf_trans_entry tgl_combo_phy_ddi_translations_edp_hbr2_hobl[] = { + /* VS pre-emp */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 0 0 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 0 1 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 0 2 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 0 3 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1 0 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1 1 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 1 2 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 2 0 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 2 1 */ }; -static const struct cnl_ddi_buf_trans rkl_combo_phy_ddi_translations_dp_hbr[] = { - /* NT mV Trans mV db */ - { 0xA, 0x2F, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x4F, 0x37, 0x00, 0x08 }, /* 350 500 3.1 */ - { 0xC, 0x63, 0x2F, 0x00, 0x10 }, /* 350 700 6.0 */ - { 0x6, 0x7D, 0x2A, 0x00, 0x15 }, /* 350 900 8.2 */ - { 0xA, 0x4C, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x73, 0x34, 0x00, 0x0B }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ - { 0xC, 0x6E, 0x3E, 0x00, 0x01 }, /* 650 700 0.6 */ - { 0x6, 0x7F, 0x35, 0x00, 0x0A }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ +static const union intel_ddi_buf_trans_entry rkl_combo_phy_ddi_translations_dp_hbr[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x2F, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x4F, 0x37, 0x00, 0x08 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x63, 0x2F, 0x00, 0x10 } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7D, 0x2A, 0x00, 0x15 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x4C, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x73, 0x34, 0x00, 0x0B } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x6E, 0x3E, 0x00, 0x01 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7F, 0x35, 0x00, 0x0A } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ }; -static const struct cnl_ddi_buf_trans rkl_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { - /* NT mV Trans mV db */ - { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ - { 0xA, 0x50, 0x38, 0x00, 0x07 }, /* 350 500 3.1 */ - { 0xC, 0x61, 0x33, 0x00, 0x0C }, /* 350 700 6.0 */ - { 0x6, 0x7F, 0x2E, 0x00, 0x11 }, /* 350 900 8.2 */ - { 0xA, 0x47, 0x3F, 0x00, 0x00 }, /* 500 500 0.0 */ - { 0xC, 0x5F, 0x38, 0x00, 0x07 }, /* 500 700 2.9 */ - { 0x6, 0x7F, 0x2F, 0x00, 0x10 }, /* 500 900 5.1 */ - { 0xC, 0x5F, 0x3F, 0x00, 0x00 }, /* 650 700 0.6 */ - { 0x6, 0x7E, 0x36, 0x00, 0x09 }, /* 600 900 3.5 */ - { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ +static const union intel_ddi_buf_trans_entry rkl_combo_phy_ddi_translations_dp_hbr2_hbr3[] = { + /* NT mV Trans mV db */ + { .cnl = { 0xA, 0x35, 0x3F, 0x00, 0x00 } }, /* 350 350 0.0 */ + { .cnl = { 0xA, 0x50, 0x38, 0x00, 0x07 } }, /* 350 500 3.1 */ + { .cnl = { 0xC, 0x61, 0x33, 0x00, 0x0C } }, /* 350 700 6.0 */ + { .cnl = { 0x6, 0x7F, 0x2E, 0x00, 0x11 } }, /* 350 900 8.2 */ + { .cnl = { 0xA, 0x47, 0x3F, 0x00, 0x00 } }, /* 500 500 0.0 */ + { .cnl = { 0xC, 0x5F, 0x38, 0x00, 0x07 } }, /* 500 700 2.9 */ + { .cnl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } }, /* 500 900 5.1 */ + { .cnl = { 0xC, 0x5F, 0x3F, 0x00, 0x00 } }, /* 650 700 0.6 */ + { .cnl = { 0x6, 0x7E, 0x36, 0x00, 0x09 } }, /* 600 900 3.5 */ + { .cnl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } }, /* 900 900 0.0 */ }; -static const struct tgl_dkl_phy_ddi_buf_trans adlp_dkl_phy_dp_ddi_trans_hbr[] = { - /* VS pre-emp Non-trans mV Pre-emph dB */ - { 0x7, 0x0, 0x01 }, /* 0 0 400mV 0 dB */ - { 0x5, 0x0, 0x06 }, /* 0 1 400mV 3.5 dB */ - { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */ - { 0x0, 0x0, 0x17 }, /* 0 3 400mV 9.5 dB */ - { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ - { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */ - { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ - { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ - { 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 dB */ - { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB */ +static const union intel_ddi_buf_trans_entry adlp_dkl_phy_dp_ddi_trans_hbr[] = { + /* VS pre-emp Non-trans mV Pre-emph dB */ + { .dkl = { 0x7, 0x0, 0x01 } }, /* 0 0 400mV 0 dB */ + { .dkl = { 0x5, 0x0, 0x06 } }, /* 0 1 400mV 3.5 dB */ + { .dkl = { 0x2, 0x0, 0x0B } }, /* 0 2 400mV 6 dB */ + { .dkl = { 0x0, 0x0, 0x17 } }, /* 0 3 400mV 9.5 dB */ + { .dkl = { 0x5, 0x0, 0x00 } }, /* 1 0 600mV 0 dB */ + { .dkl = { 0x2, 0x0, 0x08 } }, /* 1 1 600mV 3.5 dB */ + { .dkl = { 0x0, 0x0, 0x14 } }, /* 1 2 600mV 6 dB */ + { .dkl = { 0x2, 0x0, 0x00 } }, /* 2 0 800mV 0 dB */ + { .dkl = { 0x0, 0x0, 0x0B } }, /* 2 1 800mV 3.5 dB */ + { .dkl = { 0x0, 0x0, 0x00 } }, /* 3 0 1200mV 0 dB */ }; -static const struct tgl_dkl_phy_ddi_buf_trans adlp_dkl_phy_dp_ddi_trans_hbr2_hbr3[] = { - /* VS pre-emp Non-trans mV Pre-emph dB */ - { 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */ - { 0x5, 0x0, 0x04 }, /* 0 1 400mV 3.5 dB */ - { 0x2, 0x0, 0x0A }, /* 0 2 400mV 6 dB */ - { 0x0, 0x0, 0x18 }, /* 0 3 400mV 9.5 dB */ - { 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */ - { 0x2, 0x0, 0x06 }, /* 1 1 600mV 3.5 dB */ - { 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */ - { 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */ - { 0x0, 0x0, 0x09 }, /* 2 1 800mV 3.5 dB */ - { 0x0, 0x0, 0x00 }, /* 3 0 1200mV 0 dB */ +static const union intel_ddi_buf_trans_entry adlp_dkl_phy_dp_ddi_trans_hbr2_hbr3[] = { + /* VS pre-emp Non-trans mV Pre-emph dB */ + { .dkl = { 0x7, 0x0, 0x00 } }, /* 0 0 400mV 0 dB */ + { .dkl = { 0x5, 0x0, 0x04 } }, /* 0 1 400mV 3.5 dB */ + { .dkl = { 0x2, 0x0, 0x0A } }, /* 0 2 400mV 6 dB */ + { .dkl = { 0x0, 0x0, 0x18 } }, /* 0 3 400mV 9.5 dB */ + { .dkl = { 0x5, 0x0, 0x00 } }, /* 1 0 600mV 0 dB */ + { .dkl = { 0x2, 0x0, 0x06 } }, /* 1 1 600mV 3.5 dB */ + { .dkl = { 0x0, 0x0, 0x14 } }, /* 1 2 600mV 6 dB */ + { .dkl = { 0x2, 0x0, 0x00 } }, /* 2 0 800mV 0 dB */ + { .dkl = { 0x0, 0x0, 0x09 } }, /* 2 1 800mV 3.5 dB */ + { .dkl = { 0x0, 0x0, 0x00 } }, /* 3 0 1200mV 0 dB */ }; -bool is_hobl_buf_trans(const struct cnl_ddi_buf_trans *table) +bool is_hobl_buf_trans(const union intel_ddi_buf_trans_entry *table) { return table == tgl_combo_phy_ddi_translations_edp_hbr2_hobl; } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * bdw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -781,7 +781,7 @@ bdw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) } } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * skl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -798,7 +798,7 @@ skl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) } } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * kbl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -819,7 +819,7 @@ kbl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) } } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * skl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -851,7 +851,7 @@ skl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) return skl_get_buf_trans_dp(encoder, n_entries); } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * skl_get_buf_trans_hdmi(struct drm_i915_private *dev_priv, int *n_entries) { if (IS_SKL_ULX(dev_priv) || @@ -875,7 +875,7 @@ static int skl_buf_trans_num_entries(enum port port, int n_entries) return min(n_entries, 9); } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -883,12 +883,12 @@ hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv)) { - const struct hsw_ddi_buf_trans *ddi_translations = + const union intel_ddi_buf_trans_entry *ddi_translations = kbl_get_buf_trans_dp(encoder, n_entries); *n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries); return ddi_translations; } else if (IS_SKYLAKE(dev_priv)) { - const struct hsw_ddi_buf_trans *ddi_translations = + const union intel_ddi_buf_trans_entry *ddi_translations = skl_get_buf_trans_dp(encoder, n_entries); *n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries); return ddi_translations; @@ -904,13 +904,13 @@ hsw_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) return NULL; } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * hsw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv)) { - const struct hsw_ddi_buf_trans *ddi_translations = + const union intel_ddi_buf_trans_entry *ddi_translations = skl_get_buf_trans_edp(encoder, n_entries); *n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries); return ddi_translations; @@ -925,7 +925,7 @@ hsw_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) return NULL; } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * hsw_get_buf_trans_fdi(struct intel_encoder *encoder, int *n_entries) { @@ -943,7 +943,7 @@ hsw_get_buf_trans_fdi(struct intel_encoder *encoder, return NULL; } -static const struct hsw_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * hsw_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries) { @@ -963,7 +963,7 @@ hsw_get_buf_trans_hdmi(struct intel_encoder *encoder, return NULL; } -const struct hsw_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * hsw_get_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -978,14 +978,14 @@ hsw_get_buf_trans(struct intel_encoder *encoder, return hsw_get_buf_trans_dp(encoder, n_entries); } -static const struct bxt_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * bxt_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) { *n_entries = ARRAY_SIZE(bxt_ddi_translations_dp); return bxt_ddi_translations_dp; } -static const struct bxt_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * bxt_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -998,14 +998,14 @@ bxt_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) return bxt_get_buf_trans_dp(encoder, n_entries); } -static const struct bxt_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * bxt_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries) { *n_entries = ARRAY_SIZE(bxt_ddi_translations_hdmi); return bxt_ddi_translations_hdmi; } -const struct bxt_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * bxt_get_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1017,7 +1017,7 @@ bxt_get_buf_trans(struct intel_encoder *encoder, return bxt_get_buf_trans_dp(encoder, n_entries); } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * cnl_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -1039,7 +1039,7 @@ cnl_get_buf_trans_hdmi(struct intel_encoder *encoder, int *n_entries) return NULL; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * cnl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -1061,7 +1061,7 @@ cnl_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries) return NULL; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * cnl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -1087,7 +1087,7 @@ cnl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries) } } -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * cnl_get_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1099,7 +1099,7 @@ cnl_get_buf_trans(struct intel_encoder *encoder, return cnl_get_buf_trans_dp(encoder, n_entries); } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * icl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1108,7 +1108,7 @@ icl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, return icl_combo_phy_ddi_translations_hdmi; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * icl_get_combo_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1117,7 +1117,7 @@ icl_get_combo_buf_trans_dp(struct intel_encoder *encoder, return icl_combo_phy_ddi_translations_dp_hbr2; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * icl_get_combo_buf_trans_edp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1141,7 +1141,7 @@ icl_get_combo_buf_trans_edp(struct intel_encoder *encoder, return icl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * icl_get_combo_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1154,7 +1154,7 @@ icl_get_combo_buf_trans(struct intel_encoder *encoder, return icl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } -static const struct icl_mg_phy_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * icl_get_mg_buf_trans_hdmi(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1163,7 +1163,7 @@ icl_get_mg_buf_trans_hdmi(struct intel_encoder *encoder, return icl_mg_phy_ddi_translations_hdmi; } -static const struct icl_mg_phy_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * icl_get_mg_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1177,7 +1177,7 @@ icl_get_mg_buf_trans_dp(struct intel_encoder *encoder, } } -const struct icl_mg_phy_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * icl_get_mg_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1188,7 +1188,7 @@ icl_get_mg_buf_trans(struct intel_encoder *encoder, return icl_get_mg_buf_trans_dp(encoder, crtc_state, n_entries); } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * ehl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1197,7 +1197,7 @@ ehl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, return icl_combo_phy_ddi_translations_hdmi; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * ehl_get_combo_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1206,7 +1206,7 @@ ehl_get_combo_buf_trans_dp(struct intel_encoder *encoder, return ehl_combo_phy_ddi_translations_dp; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1221,7 +1221,7 @@ ehl_get_combo_buf_trans_edp(struct intel_encoder *encoder, return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * ehl_get_combo_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1234,7 +1234,7 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1243,7 +1243,7 @@ jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, return icl_combo_phy_ddi_translations_hdmi; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1252,7 +1252,7 @@ jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder, return icl_combo_phy_ddi_translations_dp_hbr2; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1272,7 +1272,7 @@ jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder, return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * jsl_get_combo_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1285,7 +1285,7 @@ jsl_get_combo_buf_trans(struct intel_encoder *encoder, return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1294,7 +1294,7 @@ tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, return icl_combo_phy_ddi_translations_hdmi; } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1323,7 +1323,7 @@ tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder, } } -static const struct cnl_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * tgl_get_combo_buf_trans_edp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1345,7 +1345,7 @@ tgl_get_combo_buf_trans_edp(struct intel_encoder *encoder, return tgl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * tgl_get_combo_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1358,7 +1358,7 @@ tgl_get_combo_buf_trans(struct intel_encoder *encoder, return tgl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } -static const struct tgl_dkl_phy_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * tgl_get_dkl_buf_trans_hdmi(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1367,7 +1367,7 @@ tgl_get_dkl_buf_trans_hdmi(struct intel_encoder *encoder, return tgl_dkl_phy_hdmi_ddi_trans; } -static const struct tgl_dkl_phy_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1381,7 +1381,7 @@ tgl_get_dkl_buf_trans_dp(struct intel_encoder *encoder, } } -const struct tgl_dkl_phy_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * tgl_get_dkl_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1392,7 +1392,7 @@ tgl_get_dkl_buf_trans(struct intel_encoder *encoder, return tgl_get_dkl_buf_trans_dp(encoder, crtc_state, n_entries); } -static const struct tgl_dkl_phy_ddi_buf_trans * +static const union intel_ddi_buf_trans_entry * adlp_get_dkl_buf_trans_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) @@ -1406,7 +1406,7 @@ adlp_get_dkl_buf_trans_dp(struct intel_encoder *encoder, return adlp_dkl_phy_dp_ddi_trans_hbr; } -const struct tgl_dkl_phy_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * adlp_get_dkl_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries) diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h index 428f1f343341..487a4f815470 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h @@ -45,52 +45,60 @@ struct tgl_dkl_phy_ddi_buf_trans { u32 dkl_de_emphasis_control; }; -bool is_hobl_buf_trans(const struct cnl_ddi_buf_trans *table); +union intel_ddi_buf_trans_entry { + struct hsw_ddi_buf_trans hsw; + struct bxt_ddi_buf_trans bxt; + struct cnl_ddi_buf_trans cnl; + struct icl_mg_phy_ddi_buf_trans mg; + struct tgl_dkl_phy_ddi_buf_trans dkl; +}; + +bool is_hobl_buf_trans(const union intel_ddi_buf_trans_entry *table); int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *default_entry); -const struct hsw_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * hsw_get_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct bxt_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * bxt_get_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct tgl_dkl_phy_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * adlp_get_dkl_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * tgl_get_combo_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct tgl_dkl_phy_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * tgl_get_dkl_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * jsl_get_combo_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * ehl_get_combo_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * icl_get_combo_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct icl_mg_phy_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * icl_get_mg_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries); -const struct cnl_ddi_buf_trans * +const union intel_ddi_buf_trans_entry * cnl_get_buf_trans(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int *n_entries);