[v1,0/4] Add Alder Lake PCH-S support to PMC core driver

Message ID	cover.1625191274.git.gayatri.kammela@intel.com (mailing list archive)
Headers	show Return-Path: <platform-driver-x86-owner@kernel.org> From: Gayatri Kammela <gayatri.kammela@intel.com> To: platform-driver-x86@vger.kernel.org Cc: mgross@linux.intel.com, hdegoede@redhat.com, irenic.rajneesh@gmail.com, Gayatri Kammela <gayatri.kammela@intel.com>, Srinivas Pandruvada <srinivas.pandruvada@intel.com>, Andy Shevchenko <andriy.shevchenko@linux.intel.com>, David Box <david.e.box@intel.com> Subject: [PATCH v1 0/4] Add Alder Lake PCH-S support to PMC core driver Date: Thu, 1 Jul 2021 19:19:59 -0700 Message-Id: <cover.1625191274.git.gayatri.kammela@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add Alder Lake PCH-S support to PMC core driver \| expand [v1,0/4] Add Alder Lake PCH-S support to PMC core driver [v1,1/4] platform/x86: intel_pmc_core: Add Alderlake support to pmc_core driver [v1,2/4] platform/x86: intel_pmc_core: Add Latency Tolerance Reporting (LTR) support to Alder Lake [v1,3/4] platform/x86: intel_pmc_core: Add Alder Lake low power mode support for pmc_core [v1,4/4] platform/x86: intel_pmc_core: Add GBE Package C10 fix for Alder Lake PCH

Kammela, Gayatri July 2, 2021, 2:19 a.m. UTC

Hi,
The patch series add Alder Lake PCH-S support to PMC core driver.

Patch 1: Add Alderlake support to pmc_core driver
Patch 2: Add Latency Tolerance Reporting (LTR) support to Alder Lake
Patch 3: Add Alder Lake low power mode support for pmc_core
Patch 4: Add GBE Package C10 fix for Alder Lake

David E. Box (1):
  platform/x86: intel_pmc_core: Add GBE Package C10 fix for Alder Lake
    PCH

Gayatri Kammela (3):
  platform/x86: intel_pmc_core: Add Alderlake support to pmc_core driver
  platform/x86: intel_pmc_core: Add Latency Tolerance Reporting (LTR)
    support to Alder Lake
  platform/x86: intel_pmc_core: Add Alder Lake low power mode support
    for pmc_core

 drivers/platform/x86/intel_pmc_core.c | 307 +++++++++++++++++++++++++-
 drivers/platform/x86/intel_pmc_core.h |  17 ++
 2 files changed, 321 insertions(+), 3 deletions(-)

Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David Box <david.e.box@intel.com>

base-commit: 62fb9874f5da54fdb243003b386128037319b219

Andy Shevchenko July 2, 2021, 10:01 a.m. UTC | #1

On Thu, Jul 01, 2021 at 07:19:59PM -0700, Gayatri Kammela wrote:
> Hi,
> The patch series add Alder Lake PCH-S support to PMC core driver.
> 
> Patch 1: Add Alderlake support to pmc_core driver
> Patch 2: Add Latency Tolerance Reporting (LTR) support to Alder Lake
> Patch 3: Add Alder Lake low power mode support for pmc_core
> Patch 4: Add GBE Package C10 fix for Alder Lake

I have seen only three out of four patches. I think to avoid such you better
use --cc parameter to the `git send-email ...` (Or you may utilize the script
I'm using myself:
https://github.com/andy-shev/home-bin-tools/blob/master/ge2maintainer.sh).

Nevertheless, before doing anything on this, can you move the stuff under
drivers/platform/x86/intel/pmc/ first, please?

You-Sheng Yang July 5, 2021, 10:58 a.m. UTC | #2

Hi, this works for me.

Tested-By: You-Sheng Yang <vicamo.yang@canonical.com>

On 7/2/21 10:19 AM, Gayatri Kammela wrote:
> Hi,
> The patch series add Alder Lake PCH-S support to PMC core driver.
> 
> Patch 1: Add Alderlake support to pmc_core driver
> Patch 2: Add Latency Tolerance Reporting (LTR) support to Alder Lake
> Patch 3: Add Alder Lake low power mode support for pmc_core
> Patch 4: Add GBE Package C10 fix for Alder Lake
> 
> David E. Box (1):
>   platform/x86: intel_pmc_core: Add GBE Package C10 fix for Alder Lake
>     PCH
> 
> Gayatri Kammela (3):
>   platform/x86: intel_pmc_core: Add Alderlake support to pmc_core driver
>   platform/x86: intel_pmc_core: Add Latency Tolerance Reporting (LTR)
>     support to Alder Lake
>   platform/x86: intel_pmc_core: Add Alder Lake low power mode support
>     for pmc_core
> 
>  drivers/platform/x86/intel_pmc_core.c | 307 +++++++++++++++++++++++++-
>  drivers/platform/x86/intel_pmc_core.h |  17 ++
>  2 files changed, 321 insertions(+), 3 deletions(-)
> 
> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Cc: David Box <david.e.box@intel.com>
> 
> base-commit: 62fb9874f5da54fdb243003b386128037319b219
>

Hans de Goede July 6, 2021, 11:11 a.m. UTC | #3

Hi,

On 7/2/21 4:19 AM, Gayatri Kammela wrote:
> Hi,
> The patch series add Alder Lake PCH-S support to PMC core driver.
> 
> Patch 1: Add Alderlake support to pmc_core driver
> Patch 2: Add Latency Tolerance Reporting (LTR) support to Alder Lake
> Patch 3: Add Alder Lake low power mode support for pmc_core
> Patch 4: Add GBE Package C10 fix for Alder Lake
> 
> David E. Box (1):
>   platform/x86: intel_pmc_core: Add GBE Package C10 fix for Alder Lake
>     PCH
> 
> Gayatri Kammela (3):
>   platform/x86: intel_pmc_core: Add Alderlake support to pmc_core driver
>   platform/x86: intel_pmc_core: Add Latency Tolerance Reporting (LTR)
>     support to Alder Lake
>   platform/x86: intel_pmc_core: Add Alder Lake low power mode support
>     for pmc_core
> 
>  drivers/platform/x86/intel_pmc_core.c | 307 +++++++++++++++++++++++++-
>  drivers/platform/x86/intel_pmc_core.h |  17 ++
>  2 files changed, 321 insertions(+), 3 deletions(-)
> 
> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Cc: David Box <david.e.box@intel.com>
> 
> base-commit: 62fb9874f5da54fdb243003b386128037319b219

Thanks, the series looks good to me:

Reviewed-by: Hans de Goede <hdegoede@redhat.com>

For the series. As Andy already mentioned we are trying to move all
the Intel files to drivers/platform/x86/intel. Can you please send
a new version with an extra patch which first moves all the

drivers/platform/x86/intel_pmc_*.c files to: drivers/platform/x86/intel/pmc
and then apply the 4 patches from this series on top, see:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=72fbcac2f40e690e1a5584358750e546a2678c2c

For an example of a commit moving files to under drivers/platform/x86/intel/<subdir>

Regards,

Hans

Kammela, Gayatri July 6, 2021, 5:16 p.m. UTC | #4

> -----Original Message-----
> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Sent: Friday, July 2, 2021 3:02 AM
> To: Kammela, Gayatri <gayatri.kammela@intel.com>
> Cc: platform-driver-x86@vger.kernel.org; mgross@linux.intel.com;
> hdegoede@redhat.com; irenic.rajneesh@gmail.com; Pandruvada, Srinivas
> <srinivas.pandruvada@intel.com>; Box, David E <david.e.box@intel.com>
> Subject: Re: [PATCH v1 0/4] Add Alder Lake PCH-S support to PMC core driver
> 
> On Thu, Jul 01, 2021 at 07:19:59PM -0700, Gayatri Kammela wrote:
> > Hi,
> > The patch series add Alder Lake PCH-S support to PMC core driver.
> >
> > Patch 1: Add Alderlake support to pmc_core driver Patch 2: Add Latency
> > Tolerance Reporting (LTR) support to Alder Lake Patch 3: Add Alder
> > Lake low power mode support for pmc_core Patch 4: Add GBE Package C10
> > fix for Alder Lake
> 
> I have seen only three out of four patches. I think to avoid such you better
> use --cc parameter to the `git send-email ...` (Or you may utilize the script I'm
> using myself:
> https://github.com/andy-shev/home-bin-
> tools/blob/master/ge2maintainer.sh).
Hi Andy, my bad, I didn't notice the 4th patch missing the Cc. thanks! I will use the script going forward.
> 
> Nevertheless, before doing anything on this, can you move the stuff under
> drivers/platform/x86/intel/pmc/ first, please?
Yes, sure I will do that.
> 
> --
> With Best Regards,
> Andy Shevchenko
>

Kammela, Gayatri July 6, 2021, 5:17 p.m. UTC | #5

> -----Original Message-----
> From: You-Sheng Yang <vicamo.yang@canonical.com>
> Sent: Monday, July 5, 2021 3:59 AM
> To: Kammela, Gayatri <gayatri.kammela@intel.com>; platform-driver-
> x86@vger.kernel.org
> Cc: mgross@linux.intel.com; hdegoede@redhat.com;
> irenic.rajneesh@gmail.com; Pandruvada, Srinivas
> <srinivas.pandruvada@intel.com>; Andy Shevchenko
> <andriy.shevchenko@linux.intel.com>; Box, David E
> <david.e.box@intel.com>
> Subject: Re: [PATCH v1 0/4] Add Alder Lake PCH-S support to PMC core driver
> 
> Hi, this works for me.
> 
> Tested-By: You-Sheng Yang <vicamo.yang@canonical.com>
Thank you!
> 
> On 7/2/21 10:19 AM, Gayatri Kammela wrote:
> > Hi,
> > The patch series add Alder Lake PCH-S support to PMC core driver.
> >
> > Patch 1: Add Alderlake support to pmc_core driver Patch 2: Add Latency
> > Tolerance Reporting (LTR) support to Alder Lake Patch 3: Add Alder
> > Lake low power mode support for pmc_core Patch 4: Add GBE Package C10
> > fix for Alder Lake
> >
> > David E. Box (1):
> >   platform/x86: intel_pmc_core: Add GBE Package C10 fix for Alder Lake
> >     PCH
> >
> > Gayatri Kammela (3):
> >   platform/x86: intel_pmc_core: Add Alderlake support to pmc_core driver
> >   platform/x86: intel_pmc_core: Add Latency Tolerance Reporting (LTR)
> >     support to Alder Lake
> >   platform/x86: intel_pmc_core: Add Alder Lake low power mode support
> >     for pmc_core
> >
> >  drivers/platform/x86/intel_pmc_core.c | 307
> > +++++++++++++++++++++++++-  drivers/platform/x86/intel_pmc_core.h |
> > 17 ++
> >  2 files changed, 321 insertions(+), 3 deletions(-)
> >
> > Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
> > Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > Cc: David Box <david.e.box@intel.com>
> >
> > base-commit: 62fb9874f5da54fdb243003b386128037319b219
> >

Kammela, Gayatri July 6, 2021, 5:20 p.m. UTC | #6

> -----Original Message-----
> From: Hans de Goede <hdegoede@redhat.com>
> Sent: Tuesday, July 6, 2021 4:11 AM
> To: Kammela, Gayatri <gayatri.kammela@intel.com>; platform-driver-
> x86@vger.kernel.org
> Cc: mgross@linux.intel.com; irenic.rajneesh@gmail.com; Pandruvada,
> Srinivas <srinivas.pandruvada@intel.com>; Andy Shevchenko
> <andriy.shevchenko@linux.intel.com>; Box, David E
> <david.e.box@intel.com>
> Subject: Re: [PATCH v1 0/4] Add Alder Lake PCH-S support to PMC core driver
> 
> Hi,
> 
> On 7/2/21 4:19 AM, Gayatri Kammela wrote:
> > Hi,
> > The patch series add Alder Lake PCH-S support to PMC core driver.
> >
> > Patch 1: Add Alderlake support to pmc_core driver Patch 2: Add Latency
> > Tolerance Reporting (LTR) support to Alder Lake Patch 3: Add Alder
> > Lake low power mode support for pmc_core Patch 4: Add GBE Package C10
> > fix for Alder Lake
> >
> > David E. Box (1):
> >   platform/x86: intel_pmc_core: Add GBE Package C10 fix for Alder Lake
> >     PCH
> >
> > Gayatri Kammela (3):
> >   platform/x86: intel_pmc_core: Add Alderlake support to pmc_core driver
> >   platform/x86: intel_pmc_core: Add Latency Tolerance Reporting (LTR)
> >     support to Alder Lake
> >   platform/x86: intel_pmc_core: Add Alder Lake low power mode support
> >     for pmc_core
> >
> >  drivers/platform/x86/intel_pmc_core.c | 307
> > +++++++++++++++++++++++++-  drivers/platform/x86/intel_pmc_core.h |
> > 17 ++
> >  2 files changed, 321 insertions(+), 3 deletions(-)
> >
> > Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
> > Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > Cc: David Box <david.e.box@intel.com>
> >
> > base-commit: 62fb9874f5da54fdb243003b386128037319b219
> 
> Thanks, the series looks good to me:
> 
> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
> 
> For the series. As Andy already mentioned we are trying to move all the Intel
> files to drivers/platform/x86/intel. Can you please send a new version with
> an extra patch which first moves all the
> 
> drivers/platform/x86/intel_pmc_*.c files to: drivers/platform/x86/intel/pmc
> and then apply the 4 patches from this series on top, see:
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i
> d=72fbcac2f40e690e1a5584358750e546a2678c2c
> 
> For an example of a commit moving files to under
> drivers/platform/x86/intel/<subdir>
> 
> Regards,
> 
> Hans

Thanks Hans! Sure, I will send the new version.

[v1,0/4] Add Alder Lake PCH-S support to PMC core driver

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