| Message ID | 20210618130047.547986-1-benjamin.gaignard@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] iommu: rockchip: Fix physical address decoding | expand |
Le 18/06/2021 à 15:00, Benjamin Gaignard a écrit : > Restore bits 39 to 32 at correct position. > It reverses the operation done in rk_dma_addr_dte_v2(). > > Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") > > Reported-by: Dan Carpenter <dan.carpenter@oracle.com> > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> Gentle ping on this patch :-) Regards, Benjamin > --- > drivers/iommu/rockchip-iommu.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c > index 94b9d8e5b9a40..9febfb7f3025b 100644 > --- a/drivers/iommu/rockchip-iommu.c > +++ b/drivers/iommu/rockchip-iommu.c > @@ -544,12 +544,14 @@ static inline u32 rk_dma_addr_dte(dma_addr_t dt_dma) > } > > #define DT_HI_MASK GENMASK_ULL(39, 32) > +#define DTE_BASE_HI_MASK GENMASK(11, 4) > #define DT_SHIFT 28 > > static inline phys_addr_t rk_dte_addr_phys_v2(u32 addr) > { > - return (phys_addr_t)(addr & RK_DTE_PT_ADDRESS_MASK) | > - ((addr & DT_HI_MASK) << DT_SHIFT); > + u64 addr64 = addr; > + return (phys_addr_t)(addr64 & RK_DTE_PT_ADDRESS_MASK) | > + ((addr64 & DTE_BASE_HI_MASK) << DT_SHIFT); > } > > static inline u32 rk_dma_addr_dte_v2(dma_addr_t dt_dma)
Hi Benjamin,
On Mon, Jul 05, 2021 at 01:40:24PM +0200, Benjamin Gaignard wrote:
> Gentle ping on this patch :-)
Please fix the subject to match the IOMMU tree conventions. This would
be:
iommu/rockchip: Fix physical address decoding
Re-send the patch after the merge window is closed.
Thanks,
Joerg
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index 94b9d8e5b9a40..9febfb7f3025b 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -544,12 +544,14 @@ static inline u32 rk_dma_addr_dte(dma_addr_t dt_dma) } #define DT_HI_MASK GENMASK_ULL(39, 32) +#define DTE_BASE_HI_MASK GENMASK(11, 4) #define DT_SHIFT 28 static inline phys_addr_t rk_dte_addr_phys_v2(u32 addr) { - return (phys_addr_t)(addr & RK_DTE_PT_ADDRESS_MASK) | - ((addr & DT_HI_MASK) << DT_SHIFT); + u64 addr64 = addr; + return (phys_addr_t)(addr64 & RK_DTE_PT_ADDRESS_MASK) | + ((addr64 & DTE_BASE_HI_MASK) << DT_SHIFT); } static inline u32 rk_dma_addr_dte_v2(dma_addr_t dt_dma)
Restore bits 39 to 32 at correct position. It reverses the operation done in rk_dma_addr_dte_v2(). Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> --- drivers/iommu/rockchip-iommu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)