diff mbox series

arm64: dts: imx8mp: Add dsp node

Message ID 20210715115853.749025-1-daniel.baluta@oss.nxp.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mp: Add dsp node | expand

Commit Message

Daniel Baluta (OSS) July 15, 2021, 11:58 a.m. UTC
From: Daniel Baluta <daniel.baluta@nxp.com>

i.MX8 MPlus SoC integrates Cadence HIFI4 DSP. This core runs either a
custom firmware or the open source SOF firmware [1]

DSP device is handled by SOF OF driver found in
sound/soc/sof/sof-of-dev.c

Notice that the DSP node makes use of:
	- dsp_reserved, a reserved memory region for various Audio
	  resources (e.g firmware loading, audio buffers, etc).
	- Messaging Unit (mu2) for passing notifications betweem ARM
	  core and DSP.

[1] https://thesofproject.github.io/latest/platforms/index.html
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 28 +++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

Peng Fan July 16, 2021, 2:05 a.m. UTC | #1
Hi Daniel

> Subject: [PATCH] arm64: dts: imx8mp: Add dsp node
> 
> From: Daniel Baluta <daniel.baluta@nxp.com>
> 
> i.MX8 MPlus SoC integrates Cadence HIFI4 DSP. This core runs either a custom
> firmware or the open source SOF firmware [1]
> 
> DSP device is handled by SOF OF driver found in sound/soc/sof/sof-of-dev.c
> 
> Notice that the DSP node makes use of:
> 	- dsp_reserved, a reserved memory region for various Audio
> 	  resources (e.g firmware loading, audio buffers, etc).
> 	- Messaging Unit (mu2) for passing notifications betweem ARM
> 	  core and DSP.
> 
> [1] https://thesofproject.github.io/latest/platforms/index.html
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 28
> +++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 9f7c7f587d38..264ba540f363 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -135,6 +135,17 @@ clk_ext4: clock-ext4 {
>  		clock-output-names = "clk_ext4";
>  	};
> 
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		dsp_reserved: dsp@92400000 {
> +			reg = <0 0x92400000 0 0x2000000>;
> +			no-map;
> +		};
> +	};
> +
>  	pmu {
>  		compatible = "arm,cortex-a53-pmu";
>  		interrupts = <GIC_PPI 7
> @@ -698,6 +709,13 @@ mu: mailbox@30aa0000 {
>  				#mbox-cells = <2>;
>  			};
> 
> +			mu2: mailbox@30e60000 {
> +				compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
> +				reg = <0x30e60000 0x10000>;
> +				interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
> +				#mbox-cells = <2>;

I think better mark this node as disabled. If its clock not enabled,
kernel may hang.

Regards,
Peng.

> +			};
> +
>  			i2c5: i2c@30ad0000 {
>  				compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
>  				#address-cells = <1>;
> @@ -938,5 +956,15 @@ usb_dwc3_1: usb@38200000 {
>  				snps,dis-u2-freeclk-exists-quirk;
>  			};
>  		};
> +		dsp: dsp@3b6e8000 {
> +			compatible = "fsl,imx8mp-dsp";
> +			reg = <0x3b6e8000 0x88000>;
> +			mbox-names = "txdb0", "txdb1",
> +				"rxdb0", "rxdb1";
> +			mboxes = <&mu2 2 0>, <&mu2 2 1>,
> +				<&mu2 3 0>, <&mu2 3 1>;
> +			memory-region = <&dsp_reserved>;
> +			status = "disabled";
> +		};
>  	};
>  };
> --
> 2.27.0
Daniel Baluta July 16, 2021, 12:47 p.m. UTC | #2
On Fri, Jul 16, 2021 at 5:05 AM Peng Fan <peng.fan@nxp.com> wrote:
>
> Hi Daniel
>
> > Subject: [PATCH] arm64: dts: imx8mp: Add dsp node
> >
> > From: Daniel Baluta <daniel.baluta@nxp.com>
> >
> > i.MX8 MPlus SoC integrates Cadence HIFI4 DSP. This core runs either a custom
> > firmware or the open source SOF firmware [1]
> >
> > DSP device is handled by SOF OF driver found in sound/soc/sof/sof-of-dev.c
> >
> > Notice that the DSP node makes use of:
> >       - dsp_reserved, a reserved memory region for various Audio
> >         resources (e.g firmware loading, audio buffers, etc).
> >       - Messaging Unit (mu2) for passing notifications betweem ARM
> >         core and DSP.
> >
> > [1] https://thesofproject.github.io/latest/platforms/index.html
> > Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 28
> > +++++++++++++++++++++++
> >  1 file changed, 28 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 9f7c7f587d38..264ba540f363 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -135,6 +135,17 @@ clk_ext4: clock-ext4 {
> >               clock-output-names = "clk_ext4";
> >       };
> >
> > +     reserved-memory {
> > +             #address-cells = <2>;
> > +             #size-cells = <2>;
> > +             ranges;
> > +
> > +             dsp_reserved: dsp@92400000 {
> > +                     reg = <0 0x92400000 0 0x2000000>;
> > +                     no-map;
> > +             };
> > +     };
> > +
> >       pmu {
> >               compatible = "arm,cortex-a53-pmu";
> >               interrupts = <GIC_PPI 7
> > @@ -698,6 +709,13 @@ mu: mailbox@30aa0000 {
> >                               #mbox-cells = <2>;
> >                       };
> >
> > +                     mu2: mailbox@30e60000 {
> > +                             compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
> > +                             reg = <0x30e60000 0x10000>;
> > +                             interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
> > +                             #mbox-cells = <2>;
>
> I think better mark this node as disabled. If its clock not enabled,
> kernel may hang.

Good point. Fixed in v2.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9f7c7f587d38..264ba540f363 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -135,6 +135,17 @@  clk_ext4: clock-ext4 {
 		clock-output-names = "clk_ext4";
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dsp_reserved: dsp@92400000 {
+			reg = <0 0x92400000 0 0x2000000>;
+			no-map;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a53-pmu";
 		interrupts = <GIC_PPI 7
@@ -698,6 +709,13 @@  mu: mailbox@30aa0000 {
 				#mbox-cells = <2>;
 			};
 
+			mu2: mailbox@30e60000 {
+				compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
+				reg = <0x30e60000 0x10000>;
+				interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+				#mbox-cells = <2>;
+			};
+
 			i2c5: i2c@30ad0000 {
 				compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
 				#address-cells = <1>;
@@ -938,5 +956,15 @@  usb_dwc3_1: usb@38200000 {
 				snps,dis-u2-freeclk-exists-quirk;
 			};
 		};
+		dsp: dsp@3b6e8000 {
+			compatible = "fsl,imx8mp-dsp";
+			reg = <0x3b6e8000 0x88000>;
+			mbox-names = "txdb0", "txdb1",
+				"rxdb0", "rxdb1";
+			mboxes = <&mu2 2 0>, <&mu2 2 1>,
+				<&mu2 3 0>, <&mu2 3 1>;
+			memory-region = <&dsp_reserved>;
+			status = "disabled";
+		};
 	};
 };