| Message ID | 20210710012026.19705-9-vinay.belgaumkar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable GuC based power management features | expand |
Hi Vinay,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next drm/drm-next v5.13 next-20210709]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vinay-Belgaumkar/Enable-GuC-based-power-management-features/20210710-092520
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/ce93ba218ad070e0b1ae6f9823820fb4d2e14a8b
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vinay-Belgaumkar/Enable-GuC-based-power-management-features/20210710-092520
git checkout ce93ba218ad070e0b1ae6f9823820fb4d2e14a8b
# save the attached .config to linux build tree
mkdir build_dir
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/i915/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:258: warning: expecting prototype for intel_guc_slpc_max_freq_set(). Prototype was for intel_guc_slpc_set_max_freq() instead
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:292: warning: expecting prototype for intel_guc_slpc_min_freq_set(). Prototype was for intel_guc_slpc_set_min_freq() instead
vim +258 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
246
247 /**
248 * intel_guc_slpc_max_freq_set() - Set max frequency limit for SLPC.
249 * @slpc: pointer to intel_guc_slpc.
250 * @val: encoded frequency
251 *
252 * This function will invoke GuC SLPC action to update the max frequency
253 * limit for slice and unslice.
254 *
255 * Return: 0 on success, non-zero error code on failure.
256 */
257 int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val)
> 258 {
259 int ret;
260 struct drm_i915_private *i915 = slpc_to_i915(slpc);
261 intel_wakeref_t wakeref;
262
263 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
264
265 ret = slpc_set_param(slpc,
266 SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ,
267 val);
268
269 if (ret) {
270 drm_err(&i915->drm,
271 "Set max frequency unslice returned %d", ret);
272 ret = -EIO;
273 goto done;
274 }
275
276 done:
277 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
278 return ret;
279 }
280
281 /**
282 * intel_guc_slpc_min_freq_set() - Set min frequency limit for SLPC.
283 * @slpc: pointer to intel_guc_slpc.
284 * @val: encoded frequency
285 *
286 * This function will invoke GuC SLPC action to update the min frequency
287 * limit.
288 *
289 * Return: 0 on success, non-zero error code on failure.
290 */
291 int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val)
> 292 {
293 int ret;
294 struct intel_guc *guc = slpc_to_guc(slpc);
295 struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
296 intel_wakeref_t wakeref;
297
298 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
299
300 ret = slpc_set_param(slpc,
301 SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ,
302 val);
303 if (ret) {
304 drm_err(&i915->drm,
305 "Set min frequency for unslice returned %d", ret);
306 ret = -EIO;
307 goto done;
308 }
309
310 done:
311 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
312 return ret;
313 }
314
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
Hi Vinay,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next drm/drm-next v5.13 next-20210709]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vinay-Belgaumkar/Enable-GuC-based-power-management-features/20210710-092520
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a014-20210709 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 8d69635ed9ecf36fd0ca85906bfde17949671cbe)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/ce93ba218ad070e0b1ae6f9823820fb4d2e14a8b
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vinay-Belgaumkar/Enable-GuC-based-power-management-features/20210710-092520
git checkout ce93ba218ad070e0b1ae6f9823820fb4d2e14a8b
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/i915/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:258: warning: expecting prototype for intel_guc_slpc_max_freq_set(). Prototype was for intel_guc_slpc_set_max_freq() instead
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:292: warning: expecting prototype for intel_guc_slpc_min_freq_set(). Prototype was for intel_guc_slpc_set_min_freq() instead
vim +258 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
246
247 /**
248 * intel_guc_slpc_max_freq_set() - Set max frequency limit for SLPC.
249 * @slpc: pointer to intel_guc_slpc.
250 * @val: encoded frequency
251 *
252 * This function will invoke GuC SLPC action to update the max frequency
253 * limit for slice and unslice.
254 *
255 * Return: 0 on success, non-zero error code on failure.
256 */
257 int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val)
> 258 {
259 int ret;
260 struct drm_i915_private *i915 = slpc_to_i915(slpc);
261 intel_wakeref_t wakeref;
262
263 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
264
265 ret = slpc_set_param(slpc,
266 SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ,
267 val);
268
269 if (ret) {
270 drm_err(&i915->drm,
271 "Set max frequency unslice returned %d", ret);
272 ret = -EIO;
273 goto done;
274 }
275
276 done:
277 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
278 return ret;
279 }
280
281 /**
282 * intel_guc_slpc_min_freq_set() - Set min frequency limit for SLPC.
283 * @slpc: pointer to intel_guc_slpc.
284 * @val: encoded frequency
285 *
286 * This function will invoke GuC SLPC action to update the min frequency
287 * limit.
288 *
289 * Return: 0 on success, non-zero error code on failure.
290 */
291 int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val)
> 292 {
293 int ret;
294 struct intel_guc *guc = slpc_to_guc(slpc);
295 struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
296 intel_wakeref_t wakeref;
297
298 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
299
300 ret = slpc_set_param(slpc,
301 SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ,
302 val);
303 if (ret) {
304 drm_err(&i915->drm,
305 "Set min frequency for unslice returned %d", ret);
306 ret = -EIO;
307 goto done;
308 }
309
310 done:
311 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
312 return ret;
313 }
314
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
On 10.07.2021 03:20, Vinay Belgaumkar wrote: > Add param set h2g helpers to set the min and max frequencies > for use by SLPC. > > Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com> > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 94 +++++++++++++++++++++ > drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 + > 2 files changed, 96 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > index e579408d1c19..19cb26479942 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > @@ -106,6 +106,19 @@ static int slpc_send(struct intel_guc_slpc *slpc, > return intel_guc_send(guc, action, in_len); > } > > +static int host2guc_slpc_set_param(struct intel_guc_slpc *slpc, > + u32 id, u32 value) > +{ > + struct slpc_event_input data = {0}; > + > + data.header.value = SLPC_EVENT(SLPC_EVENT_PARAMETER_SET, 2); > + data.args[0] = id; > + data.args[1] = value; > + > + return slpc_send(slpc, &data, 4); as suggested before, use of explicit function like: static int guc_action_slpc_param(guc, u32 id, u32 value) { u32 request[] = { INTEL_GUC_ACTION_SLPC_REQUEST, SLPC_EVENT(SLPC_EVENT_PARAMETER_SET, 2), id, value, }; return intel_guc_send(guc, request, ARRAY_SIZE(request)); } will be simpler/cleaner > +} > + > + > static bool slpc_running(struct intel_guc_slpc *slpc) > { > struct slpc_shared_data *data; > @@ -134,6 +147,19 @@ static int host2guc_slpc_query_task_state(struct intel_guc_slpc *slpc) > return slpc_send(slpc, &data, 4); > } > > +static int slpc_set_param(struct intel_guc_slpc *slpc, u32 id, u32 value) > +{ > + struct drm_i915_private *i915 = slpc_to_i915(slpc); > + GEM_BUG_ON(id >= SLPC_MAX_PARAM); > + > + if (host2guc_slpc_set_param(slpc, id, value)) { > + drm_err(&i915->drm, "Unable to set param %x", id); missing \n what about printing value to be set ? what about printing send error %pe ? > + return -EIO; > + } > + > + return 0; > +} > + > static int slpc_read_task_state(struct intel_guc_slpc *slpc) > { > return host2guc_slpc_query_task_state(slpc); > @@ -218,6 +244,74 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) > return slpc_shared_data_init(slpc); > } > > +/** > + * intel_guc_slpc_max_freq_set() - Set max frequency limit for SLPC. > + * @slpc: pointer to intel_guc_slpc. > + * @val: encoded frequency what's the encoding ? > + * > + * This function will invoke GuC SLPC action to update the max frequency > + * limit for slice and unslice. > + * > + * Return: 0 on success, non-zero error code on failure. > + */ > +int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val) > +{ > + int ret; > + struct drm_i915_private *i915 = slpc_to_i915(slpc); > + intel_wakeref_t wakeref; > + > + wakeref = intel_runtime_pm_get(&i915->runtime_pm); use can use with_intel_runtime_pm(rpm, wakeref) > + > + ret = slpc_set_param(slpc, > + SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ, > + val); > + > + if (ret) { > + drm_err(&i915->drm, > + "Set max frequency unslice returned %d", ret); missing \n print error with %pe but slpc_set_param returns only -EIO ;( > + ret = -EIO; > + goto done; > + } > + > +done: > + intel_runtime_pm_put(&i915->runtime_pm, wakeref); > + return ret; > +} > + > +/** > + * intel_guc_slpc_min_freq_set() - Set min frequency limit for SLPC. > + * @slpc: pointer to intel_guc_slpc. > + * @val: encoded frequency > + * > + * This function will invoke GuC SLPC action to update the min frequency > + * limit. > + * > + * Return: 0 on success, non-zero error code on failure. > + */ > +int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) > +{ > + int ret; > + struct intel_guc *guc = slpc_to_guc(slpc); > + struct drm_i915_private *i915 = guc_to_gt(guc)->i915; > + intel_wakeref_t wakeref; > + > + wakeref = intel_runtime_pm_get(&i915->runtime_pm); > + > + ret = slpc_set_param(slpc, > + SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ, > + val); > + if (ret) { > + drm_err(&i915->drm, > + "Set min frequency for unslice returned %d", ret); as above Michal > + ret = -EIO; > + goto done; > + } > + > +done: > + intel_runtime_pm_put(&i915->runtime_pm, wakeref); > + return ret; > +} > + > /* > * intel_guc_slpc_enable() - Start SLPC > * @slpc: pointer to intel_guc_slpc. > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > index a2643b904165..a473e1ea7c10 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > @@ -34,5 +34,7 @@ struct intel_guc_slpc { > int intel_guc_slpc_init(struct intel_guc_slpc *slpc); > int intel_guc_slpc_enable(struct intel_guc_slpc *slpc); > void intel_guc_slpc_fini(struct intel_guc_slpc *slpc); > +int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val); > +int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val); > > #endif >
On 7/10/2021 10:47 AM, Michal Wajdeczko wrote: > > > On 10.07.2021 03:20, Vinay Belgaumkar wrote: >> Add param set h2g helpers to set the min and max frequencies >> for use by SLPC. >> >> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com> >> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> >> --- >> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 94 +++++++++++++++++++++ >> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 + >> 2 files changed, 96 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c >> index e579408d1c19..19cb26479942 100644 >> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c >> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c >> @@ -106,6 +106,19 @@ static int slpc_send(struct intel_guc_slpc *slpc, >> return intel_guc_send(guc, action, in_len); >> } >> >> +static int host2guc_slpc_set_param(struct intel_guc_slpc *slpc, >> + u32 id, u32 value) >> +{ >> + struct slpc_event_input data = {0}; >> + >> + data.header.value = SLPC_EVENT(SLPC_EVENT_PARAMETER_SET, 2); >> + data.args[0] = id; >> + data.args[1] = value; >> + >> + return slpc_send(slpc, &data, 4); > > as suggested before, use of explicit function like: > > static int guc_action_slpc_param(guc, u32 id, u32 value) > { > u32 request[] = { > INTEL_GUC_ACTION_SLPC_REQUEST, > SLPC_EVENT(SLPC_EVENT_PARAMETER_SET, 2), > id, > value, > }; > > return intel_guc_send(guc, request, ARRAY_SIZE(request)); > } > > will be simpler/cleaner done. > >> +} >> + >> + >> static bool slpc_running(struct intel_guc_slpc *slpc) >> { >> struct slpc_shared_data *data; >> @@ -134,6 +147,19 @@ static int host2guc_slpc_query_task_state(struct intel_guc_slpc *slpc) >> return slpc_send(slpc, &data, 4); >> } >> >> +static int slpc_set_param(struct intel_guc_slpc *slpc, u32 id, u32 value) >> +{ >> + struct drm_i915_private *i915 = slpc_to_i915(slpc); >> + GEM_BUG_ON(id >= SLPC_MAX_PARAM); >> + >> + if (host2guc_slpc_set_param(slpc, id, value)) { >> + drm_err(&i915->drm, "Unable to set param %x", id); > > missing \n > what about printing value to be set ? > what about printing send error %pe ? done. > >> + return -EIO; >> + } >> + >> + return 0; >> +} >> + >> static int slpc_read_task_state(struct intel_guc_slpc *slpc) >> { >> return host2guc_slpc_query_task_state(slpc); >> @@ -218,6 +244,74 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) >> return slpc_shared_data_init(slpc); >> } >> >> +/** >> + * intel_guc_slpc_max_freq_set() - Set max frequency limit for SLPC. >> + * @slpc: pointer to intel_guc_slpc. >> + * @val: encoded frequency > > what's the encoding ? It should just be frequency (MHz). > >> + * >> + * This function will invoke GuC SLPC action to update the max frequency >> + * limit for slice and unslice. >> + * >> + * Return: 0 on success, non-zero error code on failure. >> + */ >> +int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val) >> +{ >> + int ret; >> + struct drm_i915_private *i915 = slpc_to_i915(slpc); >> + intel_wakeref_t wakeref; >> + >> + wakeref = intel_runtime_pm_get(&i915->runtime_pm); > > use can use with_intel_runtime_pm(rpm, wakeref) Ok. > >> + >> + ret = slpc_set_param(slpc, >> + SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ, >> + val); >> + >> + if (ret) { >> + drm_err(&i915->drm, >> + "Set max frequency unslice returned %d", ret); > > missing \n > print error with %pe > but slpc_set_param returns only -EIO ;( I was done that way so the sysfs method that calls it gets a standard value. Will change that. > >> + ret = -EIO; >> + goto done; >> + } >> + >> +done: >> + intel_runtime_pm_put(&i915->runtime_pm, wakeref); >> + return ret; >> +} >> + >> +/** >> + * intel_guc_slpc_min_freq_set() - Set min frequency limit for SLPC. >> + * @slpc: pointer to intel_guc_slpc. >> + * @val: encoded frequency >> + * >> + * This function will invoke GuC SLPC action to update the min frequency >> + * limit. >> + * >> + * Return: 0 on success, non-zero error code on failure. >> + */ >> +int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) >> +{ >> + int ret; >> + struct intel_guc *guc = slpc_to_guc(slpc); >> + struct drm_i915_private *i915 = guc_to_gt(guc)->i915; >> + intel_wakeref_t wakeref; >> + >> + wakeref = intel_runtime_pm_get(&i915->runtime_pm); >> + >> + ret = slpc_set_param(slpc, >> + SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ, >> + val); >> + if (ret) { >> + drm_err(&i915->drm, >> + "Set min frequency for unslice returned %d", ret); > > as above done. Thanks, Vinay. > > Michal > >> + ret = -EIO; >> + goto done; >> + } >> + >> +done: >> + intel_runtime_pm_put(&i915->runtime_pm, wakeref); >> + return ret; >> +} >> + >> /* >> * intel_guc_slpc_enable() - Start SLPC >> * @slpc: pointer to intel_guc_slpc. >> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h >> index a2643b904165..a473e1ea7c10 100644 >> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h >> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h >> @@ -34,5 +34,7 @@ struct intel_guc_slpc { >> int intel_guc_slpc_init(struct intel_guc_slpc *slpc); >> int intel_guc_slpc_enable(struct intel_guc_slpc *slpc); >> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc); >> +int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val); >> +int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val); >> >> #endif >>
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index e579408d1c19..19cb26479942 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -106,6 +106,19 @@ static int slpc_send(struct intel_guc_slpc *slpc, return intel_guc_send(guc, action, in_len); } +static int host2guc_slpc_set_param(struct intel_guc_slpc *slpc, + u32 id, u32 value) +{ + struct slpc_event_input data = {0}; + + data.header.value = SLPC_EVENT(SLPC_EVENT_PARAMETER_SET, 2); + data.args[0] = id; + data.args[1] = value; + + return slpc_send(slpc, &data, 4); +} + + static bool slpc_running(struct intel_guc_slpc *slpc) { struct slpc_shared_data *data; @@ -134,6 +147,19 @@ static int host2guc_slpc_query_task_state(struct intel_guc_slpc *slpc) return slpc_send(slpc, &data, 4); } +static int slpc_set_param(struct intel_guc_slpc *slpc, u32 id, u32 value) +{ + struct drm_i915_private *i915 = slpc_to_i915(slpc); + GEM_BUG_ON(id >= SLPC_MAX_PARAM); + + if (host2guc_slpc_set_param(slpc, id, value)) { + drm_err(&i915->drm, "Unable to set param %x", id); + return -EIO; + } + + return 0; +} + static int slpc_read_task_state(struct intel_guc_slpc *slpc) { return host2guc_slpc_query_task_state(slpc); @@ -218,6 +244,74 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) return slpc_shared_data_init(slpc); } +/** + * intel_guc_slpc_max_freq_set() - Set max frequency limit for SLPC. + * @slpc: pointer to intel_guc_slpc. + * @val: encoded frequency + * + * This function will invoke GuC SLPC action to update the max frequency + * limit for slice and unslice. + * + * Return: 0 on success, non-zero error code on failure. + */ +int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val) +{ + int ret; + struct drm_i915_private *i915 = slpc_to_i915(slpc); + intel_wakeref_t wakeref; + + wakeref = intel_runtime_pm_get(&i915->runtime_pm); + + ret = slpc_set_param(slpc, + SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ, + val); + + if (ret) { + drm_err(&i915->drm, + "Set max frequency unslice returned %d", ret); + ret = -EIO; + goto done; + } + +done: + intel_runtime_pm_put(&i915->runtime_pm, wakeref); + return ret; +} + +/** + * intel_guc_slpc_min_freq_set() - Set min frequency limit for SLPC. + * @slpc: pointer to intel_guc_slpc. + * @val: encoded frequency + * + * This function will invoke GuC SLPC action to update the min frequency + * limit. + * + * Return: 0 on success, non-zero error code on failure. + */ +int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) +{ + int ret; + struct intel_guc *guc = slpc_to_guc(slpc); + struct drm_i915_private *i915 = guc_to_gt(guc)->i915; + intel_wakeref_t wakeref; + + wakeref = intel_runtime_pm_get(&i915->runtime_pm); + + ret = slpc_set_param(slpc, + SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ, + val); + if (ret) { + drm_err(&i915->drm, + "Set min frequency for unslice returned %d", ret); + ret = -EIO; + goto done; + } + +done: + intel_runtime_pm_put(&i915->runtime_pm, wakeref); + return ret; +} + /* * intel_guc_slpc_enable() - Start SLPC * @slpc: pointer to intel_guc_slpc. diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h index a2643b904165..a473e1ea7c10 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h @@ -34,5 +34,7 @@ struct intel_guc_slpc { int intel_guc_slpc_init(struct intel_guc_slpc *slpc); int intel_guc_slpc_enable(struct intel_guc_slpc *slpc); void intel_guc_slpc_fini(struct intel_guc_slpc *slpc); +int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val); +int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val); #endif