| Message ID | 20210721105317.36742-5-cbranchereau@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/6] iio/adc: ingenic: rename has_aux2 to has_aux_md | expand |
Hi Christophe, Le mer., juil. 21 2021 at 12:53:15 +0200, citral23 <cbranchereau@gmail.com> a écrit : > The JZ4760B variant differs slightly from the JZ4760, in that it has > a bit called VBAT_SEL > in the CFG register. In order to correctly sample the battery voltage > on existing handhelds > using this SOC, the bit must be cleared. > > We leave the possibility to set the bit, by using the > "ingenic,use-internal-divider" in the devicetree. > > Signed-off-by: citral23 <cbranchereau@gmail.com> > --- > drivers/iio/adc/ingenic-adc.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/iio/adc/ingenic-adc.c > b/drivers/iio/adc/ingenic-adc.c > index 285e7aa8e37a..618150475421 100644 > --- a/drivers/iio/adc/ingenic-adc.c > +++ b/drivers/iio/adc/ingenic-adc.c > @@ -37,6 +37,7 @@ > #define JZ_ADC_REG_CFG_SAMPLE_NUM(n) ((n) << 10) > #define JZ_ADC_REG_CFG_PULL_UP(n) ((n) << 16) > #define JZ_ADC_REG_CFG_CMD_SEL BIT(22) > +#define JZ_ADC_REG_CFG_VBAT_SEL BIT(30) > #define JZ_ADC_REG_CFG_TOUCH_OPS_MASK (BIT(31) | GENMASK(23, 10)) > #define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0 > #define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16 > @@ -869,6 +870,10 @@ static int ingenic_adc_probe(struct > platform_device *pdev) > /* Put hardware in a known passive state. */ > writeb(0x00, adc->base + JZ_ADC_REG_ENABLE); > writeb(0xff, adc->base + JZ_ADC_REG_CTRL); > + > + if (!device_property_present(dev, "ingenic,use-internal-divider")) > /* JZ4760B specific */ > + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0); You miss an "else" part, no? Set the bit if the property is present, clear it if it is missing? You can't really rely on the reset value, since (e.g.) the bootloader could have changed it. Cheers, -Paul > + > usleep_range(2000, 3000); /* Must wait at least 2ms. */ > clk_disable(adc->clk); > > @@ -896,6 +901,7 @@ static const struct of_device_id > ingenic_adc_of_match[] = { > { .compatible = "ingenic,jz4725b-adc", .data = > &jz4725b_adc_soc_data, }, > { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, > }, > { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, > }, > + { .compatible = "ingenic,jz4760b-adc", .data = > &jz4760_adc_soc_data, }, > { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, > }, > { }, > }; > -- > 2.30.2 >
diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 285e7aa8e37a..618150475421 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -37,6 +37,7 @@ #define JZ_ADC_REG_CFG_SAMPLE_NUM(n) ((n) << 10) #define JZ_ADC_REG_CFG_PULL_UP(n) ((n) << 16) #define JZ_ADC_REG_CFG_CMD_SEL BIT(22) +#define JZ_ADC_REG_CFG_VBAT_SEL BIT(30) #define JZ_ADC_REG_CFG_TOUCH_OPS_MASK (BIT(31) | GENMASK(23, 10)) #define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0 #define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16 @@ -869,6 +870,10 @@ static int ingenic_adc_probe(struct platform_device *pdev) /* Put hardware in a known passive state. */ writeb(0x00, adc->base + JZ_ADC_REG_ENABLE); writeb(0xff, adc->base + JZ_ADC_REG_CTRL); + + if (!device_property_present(dev, "ingenic,use-internal-divider")) /* JZ4760B specific */ + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0); + usleep_range(2000, 3000); /* Must wait at least 2ms. */ clk_disable(adc->clk); @@ -896,6 +901,7 @@ static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, }, + { .compatible = "ingenic,jz4760b-adc", .data = &jz4760_adc_soc_data, }, { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, };
The JZ4760B variant differs slightly from the JZ4760, in that it has a bit called VBAT_SEL in the CFG register. In order to correctly sample the battery voltage on existing handhelds using this SOC, the bit must be cleared. We leave the possibility to set the bit, by using the "ingenic,use-internal-divider" in the devicetree. Signed-off-by: citral23 <cbranchereau@gmail.com> --- drivers/iio/adc/ingenic-adc.c | 6 ++++++ 1 file changed, 6 insertions(+)