| Message ID | 20210731144155.2738493-1-f4bug@amsat.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [PATCH-for-6.1?] target/mips: Remove MOVZ/MOVN opcodes from Loongson 2E | expand |
On 7/31/21 4:41 PM, Philippe Mathieu-Daudé wrote: > Per the "Godson-2E User Manual v0.6", the Loongson 2E processor > does not implement the MOVZ/MOVN instructions I'm confused because I can't find MOVZ/MOVN in the 2E manual and the 2F explicits the difference. However looking at binutils, these opcodes are also emited on the 2E: https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=350cc38db21f1cd651a6d46687542a0fce5e0303;hp=569502941afa825c5278b320ccedeefc82e8ed0e Cc'ing Mark & Maciej in case they can enlighten me, and few Loongson develeper in case they could check, because I don't have 2E hardware to test. > However it's enhanced version, the STLS2F01 processor, does. > See STLS2F01 User Manual (rev 1), chapter 13.1 "The compliance > overview": > > The STLS2F01 processor implements several special MIPS IV > instructions as the supplement to the MIPS III instructions. > These instructions include two MIPS IV instructions (i.e. MOVZ > and MOVNZ) ... > > Fixes: aa8f40090ab ("target-mips: enable movn/movz on loongson 2E & 2F") > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/mips/tcg/translate.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c > index bf71724f3f0..34a96159d15 100644 > --- a/target/mips/tcg/translate.c > +++ b/target/mips/tcg/translate.c > @@ -14156,8 +14156,7 @@ static void decode_opc_special_legacy(CPUMIPSState *env, DisasContext *ctx) > switch (op1) { > case OPC_MOVN: /* Conditional move */ > case OPC_MOVZ: > - check_insn(ctx, ISA_MIPS4 | ISA_MIPS_R1 | > - INSN_LOONGSON2E | INSN_LOONGSON2F); > + check_insn(ctx, ISA_MIPS4 | ISA_MIPS_R1 | INSN_LOONGSON2F); > gen_cond_move(ctx, op1, rd, rs, rt); > break; > case OPC_MFHI: /* Move from HI/LO */ >
On Mon, 2 Aug 2021, Philippe Mathieu-Daudé wrote: > > Per the "Godson-2E User Manual v0.6", the Loongson 2E processor > > does not implement the MOVZ/MOVN instructions > > I'm confused because I can't find MOVZ/MOVN in the 2E manual and > the 2F explicits the difference. However looking at binutils, > these opcodes are also emited on the 2E: > https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=350cc38db21f1cd651a6d46687542a0fce5e0303;hp=569502941afa825c5278b320ccedeefc82e8ed0e I find the manual a bit messy. It does say however: "3.2.3 Instruction set mode "Godson-2E processor implements a full feature MIPS III Instruction Set Architecture (ISA) plus some MIPS IV ISA instructions, like paired single, move condition and multiply add." > Cc'ing Mark & Maciej in case they can enlighten me, and few > Loongson develeper in case they could check, because I don't > have 2E hardware to test. At least this trivial program: int main(void) { asm volatile(".set push; .set mips4; movn $0,$0,$0; .set pop"); return 0; } does not trap on actual hardware. I may not be able to find time right now for a more exhaustive test. Maciej
On 8/2/21 2:18 PM, Maciej W. Rozycki wrote: > On Mon, 2 Aug 2021, Philippe Mathieu-Daudé wrote: > >>> Per the "Godson-2E User Manual v0.6", the Loongson 2E processor >>> does not implement the MOVZ/MOVN instructions >> >> I'm confused because I can't find MOVZ/MOVN in the 2E manual and >> the 2F explicits the difference. However looking at binutils, >> these opcodes are also emited on the 2E: >> https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=350cc38db21f1cd651a6d46687542a0fce5e0303;hp=569502941afa825c5278b320ccedeefc82e8ed0e > > I find the manual a bit messy. It does say however: > > "3.2.3 Instruction set mode > > "Godson-2E processor implements a full feature MIPS III Instruction Set > Architecture (ISA) plus some MIPS IV ISA instructions, like paired single, > move condition and multiply add." > >> Cc'ing Mark & Maciej in case they can enlighten me, and few >> Loongson develeper in case they could check, because I don't >> have 2E hardware to test. > > At least this trivial program: > > int main(void) > { > asm volatile(".set push; .set mips4; movn $0,$0,$0; .set pop"); > return 0; > } > > does not trap on actual hardware. Thank you very much for your time and testing! > I may not be able to find time right > now for a more exhaustive test. This is fine for me now, I'll add documentation to justify while the the documentation doesn't describe MOVZ/MOVN, it mentions "implements MIPS IV ISA instructions like move condition" so we assume they are, also with your test not trapping. Regards, Phil.
On Mon, 2 Aug 2021, Philippe Mathieu-Daudé wrote: > > At least this trivial program: > > > > int main(void) > > { > > asm volatile(".set push; .set mips4; movn $0,$0,$0; .set pop"); > > return 0; > > } > > > > does not trap on actual hardware. > > Thank you very much for your time and testing! You're welcome! I'm glad to be of help. Maciej
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index bf71724f3f0..34a96159d15 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -14156,8 +14156,7 @@ static void decode_opc_special_legacy(CPUMIPSState *env, DisasContext *ctx) switch (op1) { case OPC_MOVN: /* Conditional move */ case OPC_MOVZ: - check_insn(ctx, ISA_MIPS4 | ISA_MIPS_R1 | - INSN_LOONGSON2E | INSN_LOONGSON2F); + check_insn(ctx, ISA_MIPS4 | ISA_MIPS_R1 | INSN_LOONGSON2F); gen_cond_move(ctx, op1, rd, rs, rt); break; case OPC_MFHI: /* Move from HI/LO */
Per the "Godson-2E User Manual v0.6", the Loongson 2E processor does not implement the MOVZ/MOVN instructions However it's enhanced version, the STLS2F01 processor, does. See STLS2F01 User Manual (rev 1), chapter 13.1 "The compliance overview": The STLS2F01 processor implements several special MIPS IV instructions as the supplement to the MIPS III instructions. These instructions include two MIPS IV instructions (i.e. MOVZ and MOVNZ) ... Fixes: aa8f40090ab ("target-mips: enable movn/movz on loongson 2E & 2F") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- target/mips/tcg/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)