diff mbox series

arm64: dts: synaptics: remove unused DTSI for AS370

Message ID 20210806082635.20239-1-krzysztof.kozlowski@canonical.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: synaptics: remove unused DTSI for AS370 | expand

Commit Message

Krzysztof Kozlowski Aug. 6, 2021, 8:26 a.m. UTC 
The as370.dtsi for Synaptics AS370 SoC does not have a user (DTS board
file), is uncompilable and untestable.  It was added back in 2018.  No
user appeared since that time, so assume it won't be added.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
 .../devicetree/bindings/arm/syna.txt          |   4 -
 arch/arm64/boot/dts/synaptics/as370.dtsi      | 173 ------------------
 2 files changed, 177 deletions(-)
 delete mode 100644 arch/arm64/boot/dts/synaptics/as370.dtsi

Comments

Rob Herring (Arm) Aug. 13, 2021, 7:08 p.m. UTC | #1 
On Fri, 06 Aug 2021 10:26:35 +0200, Krzysztof Kozlowski wrote:
> The as370.dtsi for Synaptics AS370 SoC does not have a user (DTS board
> file), is uncompilable and untestable.  It was added back in 2018.  No
> user appeared since that time, so assume it won't be added.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> ---
>  .../devicetree/bindings/arm/syna.txt          |   4 -
>  arch/arm64/boot/dts/synaptics/as370.dtsi      | 173 ------------------
>  2 files changed, 177 deletions(-)
>  delete mode 100644 arch/arm64/boot/dts/synaptics/as370.dtsi
> 

I assume Arnd/Olof will take this.

Acked-by: Rob Herring <robh@kernel.org>
Arnd Bergmann Aug. 13, 2021, 8:43 p.m. UTC | #2 
On Fri, Aug 13, 2021 at 9:09 PM Rob Herring <robh@kernel.org> wrote:
>
> On Fri, 06 Aug 2021 10:26:35 +0200, Krzysztof Kozlowski wrote:
> > The as370.dtsi for Synaptics AS370 SoC does not have a user (DTS board
> > file), is uncompilable and untestable.  It was added back in 2018.  No
> > user appeared since that time, so assume it won't be added.
> >
> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > ---
> >  .../devicetree/bindings/arm/syna.txt          |   4 -
> >  arch/arm64/boot/dts/synaptics/as370.dtsi      | 173 ------------------
> >  2 files changed, 177 deletions(-)
> >  delete mode 100644 arch/arm64/boot/dts/synaptics/as370.dtsi
> >
>
> I assume Arnd/Olof will take this.
>
> Acked-by: Rob Herring <robh@kernel.org>

Sure, I can take that, but it would be nice to hear anything from Jisheng Zhang
about this.

I can see that the only two 64-bit Synaptics SoCs are as370 and bg4ct,
but both of them have apparently been replaced with newer versions that
never made it into the kernel: as371, as390, bg5ct, according to press
releases.

Jisheng, can you clarify whether you plan to complete the as370 support
or add the later SoCs?

       Arnd
Jisheng Zhang Aug. 19, 2021, 6:37 a.m. UTC | #3 
On Fri, 13 Aug 2021 22:43:26 +0200 Arnd Bergmann wrote:


> 
> On Fri, Aug 13, 2021 at 9:09 PM Rob Herring <robh@kernel.org> wrote:
> >
> > On Fri, 06 Aug 2021 10:26:35 +0200, Krzysztof Kozlowski wrote:  
> > > The as370.dtsi for Synaptics AS370 SoC does not have a user (DTS board
> > > file), is uncompilable and untestable.  It was added back in 2018.  No
> > > user appeared since that time, so assume it won't be added.
> > >
> > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > > ---
> > >  .../devicetree/bindings/arm/syna.txt          |   4 -
> > >  arch/arm64/boot/dts/synaptics/as370.dtsi      | 173 ------------------
> > >  2 files changed, 177 deletions(-)
> > >  delete mode 100644 arch/arm64/boot/dts/synaptics/as370.dtsi
> > >  
> >
> > I assume Arnd/Olof will take this.
> >
> > Acked-by: Rob Herring <robh@kernel.org>  
> 
> Sure, I can take that, but it would be nice to hear anything from Jisheng Zhang
> about this.
> 
> I can see that the only two 64-bit Synaptics SoCs are as370 and bg4ct,
> but both of them have apparently been replaced with newer versions that
> never made it into the kernel: as371, as390, bg5ct, according to press
> releases.
> 
> Jisheng, can you clarify whether you plan to complete the as370 support
> or add the later SoCs?

Hi Arnd, Rob, Krzysztof

Sorry for being late. I was on vocation in the past several days.
As for this as370 removing, I think we'd better keep it. I planned
to submit the as370-rdk board dts two years ago, but latter I focused
on Synaptics SoCs related drivers support such as gpio, pcie, sdhci and
so on. I will send a basic as370 rdk board dts. I'm also considering
to mainline basic support for a new SoC.

Thanks
Arnd Bergmann Aug. 19, 2021, 8:10 a.m. UTC | #4 
On Thu, Aug 19, 2021 at 8:38 AM Jisheng Zhang
<Jisheng.Zhang@synaptics.com> wrote:
> On Fri, 13 Aug 2021 22:43:26 +0200 Arnd Bergmann wrote:
> > On Fri, Aug 13, 2021 at 9:09 PM Rob Herring <robh@kernel.org> wrote:
> > > On Fri, 06 Aug 2021 10:26:35 +0200, Krzysztof Kozlowski wrote:
> > > > The as370.dtsi for Synaptics AS370 SoC does not have a user (DTS board
> > > > file), is uncompilable and untestable.  It was added back in 2018.  No
> > > > user appeared since that time, so assume it won't be added.
> > > >
> > > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > > > ---
> > > >  .../devicetree/bindings/arm/syna.txt          |   4 -
> > > >  arch/arm64/boot/dts/synaptics/as370.dtsi      | 173 ------------------
> > > >  2 files changed, 177 deletions(-)
> > > >  delete mode 100644 arch/arm64/boot/dts/synaptics/as370.dtsi
> > > >
> > >
> > > I assume Arnd/Olof will take this.
> > >
> > > Acked-by: Rob Herring <robh@kernel.org>
> >
> > Sure, I can take that, but it would be nice to hear anything from Jisheng Zhang
> > about this.
> >
> > I can see that the only two 64-bit Synaptics SoCs are as370 and bg4ct,
> > but both of them have apparently been replaced with newer versions that
> > never made it into the kernel: as371, as390, bg5ct, according to press
> > releases.
> >
> > Jisheng, can you clarify whether you plan to complete the as370 support
> > or add the later SoCs?
>
> Hi Arnd, Rob, Krzysztof
>
> Sorry for being late. I was on vocation in the past several days.
> As for this as370 removing, I think we'd better keep it. I planned
> to submit the as370-rdk board dts two years ago, but latter I focused
> on Synaptics SoCs related drivers support such as gpio, pcie, sdhci and
> so on. I will send a basic as370 rdk board dts. I'm also considering
> to mainline basic support for a new SoC.

Ok, sounds good. Let's keep it for now then. If you have the dts file at
hand, please send the patch to soc@kernel.org directly so I can still
apply it for 5.15 to enable it for build testing, even if it's still missing
functionality.

        Arnd
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/syna.txt b/Documentation/devicetree/bindings/arm/syna.txt
index d8b48f2edf1b..851f48ead927 100644
--- a/Documentation/devicetree/bindings/arm/syna.txt
+++ b/Documentation/devicetree/bindings/arm/syna.txt
@@ -18,10 +18,6 @@  stable binding/ABI.
 
 ---------------------------------------------------------------
 
-Boards with the Synaptics AS370 SoC shall have the following properties:
-  Required root node property:
-    compatible: "syna,as370"
-
 Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
 shall have the following properties:
 
diff --git a/arch/arm64/boot/dts/synaptics/as370.dtsi b/arch/arm64/boot/dts/synaptics/as370.dtsi
deleted file mode 100644
index 4bb5d650df9c..000000000000
--- a/arch/arm64/boot/dts/synaptics/as370.dtsi
+++ /dev/null
@@ -1,173 +0,0 @@ 
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2018 Synaptics Incorporated
- *
- * Author: Jisheng Zhang <jszhang@kernel.org>
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
-	compatible = "syna,as370";
-	interrupt-parent = <&gic>;
-	#address-cells = <2>;
-	#size-cells = <2>;
-
-	psci {
-		compatible = "arm,psci-1.0";
-		method = "smc";
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu0: cpu@0 {
-			compatible = "arm,cortex-a53";
-			device_type = "cpu";
-			reg = <0x0>;
-			enable-method = "psci";
-			next-level-cache = <&l2>;
-			cpu-idle-states = <&CPU_SLEEP_0>;
-		};
-
-		cpu1: cpu@1 {
-			compatible = "arm,cortex-a53";
-			device_type = "cpu";
-			reg = <0x1>;
-			enable-method = "psci";
-			next-level-cache = <&l2>;
-			cpu-idle-states = <&CPU_SLEEP_0>;
-		};
-
-		cpu2: cpu@2 {
-			compatible = "arm,cortex-a53";
-			device_type = "cpu";
-			reg = <0x2>;
-			enable-method = "psci";
-			next-level-cache = <&l2>;
-			cpu-idle-states = <&CPU_SLEEP_0>;
-		};
-
-		cpu3: cpu@3 {
-			compatible = "arm,cortex-a53";
-			device_type = "cpu";
-			reg = <0x3>;
-			enable-method = "psci";
-			next-level-cache = <&l2>;
-			cpu-idle-states = <&CPU_SLEEP_0>;
-		};
-
-		l2: cache {
-			compatible = "cache";
-		};
-
-		idle-states {
-			entry-method = "psci";
-			CPU_SLEEP_0: cpu-sleep-0 {
-				compatible = "arm,idle-state";
-				local-timer-stop;
-				arm,psci-suspend-param = <0x0010000>;
-				entry-latency-us = <75>;
-				exit-latency-us = <155>;
-				min-residency-us = <1000>;
-			};
-		};
-	};
-
-	osc: osc {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <25000000>;
-	};
-
-	pmu {
-		compatible = "arm,cortex-a53-pmu";
-		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-		interrupt-affinity = <&cpu0>,
-				     <&cpu1>,
-				     <&cpu2>,
-				     <&cpu3>;
-	};
-
-	timer {
-		compatible = "arm,armv8-timer";
-		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
-	};
-
-	soc@f7000000 {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0 0xf7000000 0x1000000>;
-
-		gic: interrupt-controller@901000 {
-			compatible = "arm,gic-400";
-			#interrupt-cells = <3>;
-			interrupt-controller;
-			reg = <0x901000 0x1000>,
-			      <0x902000 0x2000>,
-			      <0x904000 0x2000>,
-			      <0x906000 0x2000>;
-			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-		};
-
-		apb@e80000 {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 0xe80000 0x10000>;
-
-			uart0: serial@c00 {
-				compatible = "snps,dw-apb-uart";
-				reg = <0xc00 0x100>;
-				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&osc>;
-				reg-shift = <2>;
-				status = "disabled";
-			};
-
-			gpio0: gpio@1800 {
-				compatible = "snps,dw-apb-gpio";
-				reg = <0x1800 0x400>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				porta: gpio-port@0 {
-					compatible = "snps,dw-apb-gpio-port";
-					gpio-controller;
-					#gpio-cells = <2>;
-					ngpios = <32>;
-					reg = <0>;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-					interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
-				};
-			};
-
-			gpio1: gpio@2000 {
-				compatible = "snps,dw-apb-gpio";
-				reg = <0x2000 0x400>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				portb: gpio-port@1 {
-					compatible = "snps,dw-apb-gpio-port";
-					gpio-controller;
-					#gpio-cells = <2>;
-					ngpios = <32>;
-					reg = <0>;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-					interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-				};
-			};
-		};
-	};
-};