mbox series

[v6,0/5] Add Alder Lake PCH-S support to PMC core driver

Message ID cover.1627710765.git.gayatri.kammela@intel.com (mailing list archive)
Headers show
Series Add Alder Lake PCH-S support to PMC core driver | expand

Message

Kammela, Gayatri July 31, 2021, 6:07 a.m. UTC 
Hi,
The patch series move intel_pmc_core* files to pmc subfolder as well as
add Alder Lake PCH-S support to PMC core driver.

Patch 1: Move intel_pmc_core* files to pmc subfolder
Patch 2: Add Alderlake support to pmc core driver
Patch 3: Add Latency Tolerance Reporting (LTR) support to Alder Lake
Patch 4: Add Alder Lake low power mode support for pmc core
Patch 5: Add GBE Package C10 fix for Alder Lake

Changes since v1:
1) Add patch 1 to v2 i.e., Move intel_pmc_core* files to pmc subfolder.
2) Modify commit message for patch 2.

Changes since v2:
1) Dropped intel_pmc_ prefix from the file names.

Changes since v3:
1) Fixed an error reported by lkp.

Changes since v4:
1) Updated MAINTAINERS

Changes since v5:
1) Fixed an module name error reported by Chao Qin

David E. Box (1):
  platform/x86/intel: pmc/core: Add GBE Package C10 fix for Alder Lake
    PCH

Gayatri Kammela (4):
  platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc
    subfolder
  platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver
  platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR)
    support to Alder Lake
  platform/x86/intel: pmc/core: Add Alder Lake low power mode support
    for pmc core

 MAINTAINERS                                   |   2 +-
 drivers/platform/x86/Kconfig                  |  21 --
 drivers/platform/x86/Makefile                 |   1 -
 drivers/platform/x86/intel/Kconfig            |   1 +
 drivers/platform/x86/intel/Makefile           |   1 +
 drivers/platform/x86/intel/pmc/Kconfig        |  22 ++
 drivers/platform/x86/intel/pmc/Makefile       |   6 +
 .../{intel_pmc_core.c => intel/pmc/core.c}    | 309 +++++++++++++++++-
 .../{intel_pmc_core.h => intel/pmc/core.h}    |  17 +
 .../pmc/pltdrv.c}                             |   0
 10 files changed, 353 insertions(+), 27 deletions(-)
 create mode 100644 drivers/platform/x86/intel/pmc/Kconfig
 create mode 100644 drivers/platform/x86/intel/pmc/Makefile
 rename drivers/platform/x86/{intel_pmc_core.c => intel/pmc/core.c} (85%)
 rename drivers/platform/x86/{intel_pmc_core.h => intel/pmc/core.h} (95%)
 rename drivers/platform/x86/{intel_pmc_core_pltdrv.c => intel/pmc/pltdrv.c} (100%)

Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David Box <david.e.box@intel.com>
Cc: You-Sheng Yang <vicamo.yang@canonical.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>
Cc: Chao Qin <chao.qin@intel.com>

base-commit: c7d102232649226a69dddd58a4942cf13cff4f7c

Comments

Hans de Goede Aug. 3, 2021, 12:19 p.m. UTC | #1 
Hi Gayatri,


On 7/31/21 8:07 AM, Gayatri Kammela wrote:
> Hi,
> The patch series move intel_pmc_core* files to pmc subfolder as well as
> add Alder Lake PCH-S support to PMC core driver.
> 
> Patch 1: Move intel_pmc_core* files to pmc subfolder
> Patch 2: Add Alderlake support to pmc core driver
> Patch 3: Add Latency Tolerance Reporting (LTR) support to Alder Lake
> Patch 4: Add Alder Lake low power mode support for pmc core
> Patch 5: Add GBE Package C10 fix for Alder Lake
> 
> Changes since v1:
> 1) Add patch 1 to v2 i.e., Move intel_pmc_core* files to pmc subfolder.
> 2) Modify commit message for patch 2.
> 
> Changes since v2:
> 1) Dropped intel_pmc_ prefix from the file names.
> 
> Changes since v3:
> 1) Fixed an error reported by lkp.
> 
> Changes since v4:
> 1) Updated MAINTAINERS
> 
> Changes since v5:
> 1) Fixed an module name error reported by Chao Qin

Thank you for fixing this.

I expect that you will send a new version addressing Andy's remarks,
so I'm going to drop this version from my queue.

Regards,

Hans


> David E. Box (1):
>   platform/x86/intel: pmc/core: Add GBE Package C10 fix for Alder Lake
>     PCH
> 
> Gayatri Kammela (4):
>   platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc
>     subfolder
>   platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver
>   platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR)
>     support to Alder Lake
>   platform/x86/intel: pmc/core: Add Alder Lake low power mode support
>     for pmc core
> 
>  MAINTAINERS                                   |   2 +-
>  drivers/platform/x86/Kconfig                  |  21 --
>  drivers/platform/x86/Makefile                 |   1 -
>  drivers/platform/x86/intel/Kconfig            |   1 +
>  drivers/platform/x86/intel/Makefile           |   1 +
>  drivers/platform/x86/intel/pmc/Kconfig        |  22 ++
>  drivers/platform/x86/intel/pmc/Makefile       |   6 +
>  .../{intel_pmc_core.c => intel/pmc/core.c}    | 309 +++++++++++++++++-
>  .../{intel_pmc_core.h => intel/pmc/core.h}    |  17 +
>  .../pmc/pltdrv.c}                             |   0
>  10 files changed, 353 insertions(+), 27 deletions(-)
>  create mode 100644 drivers/platform/x86/intel/pmc/Kconfig
>  create mode 100644 drivers/platform/x86/intel/pmc/Makefile
>  rename drivers/platform/x86/{intel_pmc_core.c => intel/pmc/core.c} (85%)
>  rename drivers/platform/x86/{intel_pmc_core.h => intel/pmc/core.h} (95%)
>  rename drivers/platform/x86/{intel_pmc_core_pltdrv.c => intel/pmc/pltdrv.c} (100%)
> 
> Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Cc: David Box <david.e.box@intel.com>
> Cc: You-Sheng Yang <vicamo.yang@canonical.com>
> Cc: Hans de Goede <hdegoede@redhat.com>
> Cc: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>
> Cc: Chao Qin <chao.qin@intel.com>
> 
> base-commit: c7d102232649226a69dddd58a4942cf13cff4f7c
>
Kammela, Gayatri Aug. 16, 2021, 5:03 p.m. UTC | #2 
> -----Original Message-----
> From: Hans de Goede <hdegoede@redhat.com>
> Sent: Tuesday, August 3, 2021 5:19 AM
> To: Kammela, Gayatri <gayatri.kammela@intel.com>; platform-driver-
> x86@vger.kernel.org
> Cc: mgross@linux.intel.com; irenic.rajneesh@gmail.com;
> andriy.shevchenko@linux.intel.com; vicamo.yang@canonical.com;
> Pandruvada, Srinivas <srinivas.pandruvada@intel.com>; Box, David E
> <david.e.box@intel.com>; Qin, Chao <chao.qin@intel.com>; linux-
> kernel@vger.kernel.org; Mashiah, Tamar <tamar.mashiah@intel.com>;
> gregkh@linuxfoundation.org; rajatja@google.com; Shyam-sundar.S-
> k@amd.com; Alexander.Deucher@amd.com; mlimonci@amd.com
> Subject: Re: [PATCH v6 0/5] Add Alder Lake PCH-S support to PMC core driver
> 
> Hi Gayatri,
> 
> 
> On 7/31/21 8:07 AM, Gayatri Kammela wrote:
> > Hi,
> > The patch series move intel_pmc_core* files to pmc subfolder as well
> > as add Alder Lake PCH-S support to PMC core driver.
> >
> > Patch 1: Move intel_pmc_core* files to pmc subfolder Patch 2: Add
> > Alderlake support to pmc core driver Patch 3: Add Latency Tolerance
> > Reporting (LTR) support to Alder Lake Patch 4: Add Alder Lake low
> > power mode support for pmc core Patch 5: Add GBE Package C10 fix for
> > Alder Lake
> >
> > Changes since v1:
> > 1) Add patch 1 to v2 i.e., Move intel_pmc_core* files to pmc subfolder.
> > 2) Modify commit message for patch 2.
> >
> > Changes since v2:
> > 1) Dropped intel_pmc_ prefix from the file names.
> >
> > Changes since v3:
> > 1) Fixed an error reported by lkp.
> >
> > Changes since v4:
> > 1) Updated MAINTAINERS
> >
> > Changes since v5:
> > 1) Fixed an module name error reported by Chao Qin
> 
> Thank you for fixing this.
> 
> I expect that you will send a new version addressing Andy's remarks, so I'm
> going to drop this version from my queue.
Hi Hans! I just sent a new version addressing Andy's comments. Thanks!
> 
> Regards,
> 
> Hans
> 
> 
> > David E. Box (1):
> >   platform/x86/intel: pmc/core: Add GBE Package C10 fix for Alder Lake
> >     PCH
> >
> > Gayatri Kammela (4):
> >   platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc
> >     subfolder
> >   platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver
> >   platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR)
> >     support to Alder Lake
> >   platform/x86/intel: pmc/core: Add Alder Lake low power mode support
> >     for pmc core
> >
> >  MAINTAINERS                                   |   2 +-
> >  drivers/platform/x86/Kconfig                  |  21 --
> >  drivers/platform/x86/Makefile                 |   1 -
> >  drivers/platform/x86/intel/Kconfig            |   1 +
> >  drivers/platform/x86/intel/Makefile           |   1 +
> >  drivers/platform/x86/intel/pmc/Kconfig        |  22 ++
> >  drivers/platform/x86/intel/pmc/Makefile       |   6 +
> >  .../{intel_pmc_core.c => intel/pmc/core.c}    | 309 +++++++++++++++++-
> >  .../{intel_pmc_core.h => intel/pmc/core.h}    |  17 +
> >  .../pmc/pltdrv.c}                             |   0
> >  10 files changed, 353 insertions(+), 27 deletions(-)  create mode
> > 100644 drivers/platform/x86/intel/pmc/Kconfig
> >  create mode 100644 drivers/platform/x86/intel/pmc/Makefile
> >  rename drivers/platform/x86/{intel_pmc_core.c => intel/pmc/core.c}
> > (85%)  rename drivers/platform/x86/{intel_pmc_core.h =>
> > intel/pmc/core.h} (95%)  rename
> > drivers/platform/x86/{intel_pmc_core_pltdrv.c => intel/pmc/pltdrv.c}
> > (100%)
> >
> > Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
> > Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > Cc: David Box <david.e.box@intel.com>
> > Cc: You-Sheng Yang <vicamo.yang@canonical.com>
> > Cc: Hans de Goede <hdegoede@redhat.com>
> > Cc: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>
> > Cc: Chao Qin <chao.qin@intel.com>
> >
> > base-commit: c7d102232649226a69dddd58a4942cf13cff4f7c
> >