| Message ID | 20210819073940.1589383-1-steen.hegelund@microchip.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Adding Frame DMA functionality to Sparx5 | expand |
Hello: This series was applied to netdev/net-next.git (refs/heads/master): On Thu, 19 Aug 2021 09:39:38 +0200 you wrote: > v2: > Removed an unused variable (proc_ctrl) from sparx5_fdma_start. > > This add frame DMA functionality to the Sparx5 platform. > > Until now the Sparx5 SwitchDev driver has been using register based > injection and extraction when sending frames to/from the host CPU. > > [...] Here is the summary with links: - [net-next,v2,1/2] net: sparx5: switchdev: adding frame DMA functionality https://git.kernel.org/netdev/net-next/c/10615907e9b5 - [net-next,v2,2/2] arm64: dts: sparx5: Add the Sparx5 switch frame DMA support https://git.kernel.org/netdev/net-next/c/920c293af8d0 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
v2: Removed an unused variable (proc_ctrl) from sparx5_fdma_start. This add frame DMA functionality to the Sparx5 platform. Until now the Sparx5 SwitchDev driver has been using register based injection and extraction when sending frames to/from the host CPU. With this series the Frame DMA functionality now added. The Frame DMA is only used if the Frame DMA interrupt is configured in the device tree; otherwise the existing register based injection and extraction is used. The Sparx5 has two ports that can be used for sending and receiving frames, but there are 8 channels that can be configured: 6 for injection and 2 for extraction. The additional channels can be used for more advanced scenarios e.g. where virtual cores are used, but currently the driver only uses port 0 and channel 0 and 6 respectively. DCB (data control block) structures are passed to the Frame DMA with suitable information about frame start/end etc, as well as pointers to DB (data blocks) buffers. The Frame DMA engine can use interrupts to signal back when the frames have been injected or extracted. There is a limitation on the DB alignment also for injection: Block must start on 16byte boundaries, and this is why the driver currently copies the data to into separate buffers. The Sparx5 switch core needs a IFH (Internal Frame Header) to pass information from the port to the switch core, and this header is added before injection and stripped after extraction. Steen Hegelund (2): net: sparx5: switchdev: adding frame DMA functionality arm64: dts: sparx5: Add the Sparx5 switch frame DMA support arch/arm64/boot/dts/microchip/sparx5.dtsi | 5 +- .../net/ethernet/microchip/sparx5/Makefile | 2 +- .../ethernet/microchip/sparx5/sparx5_fdma.c | 593 ++++++++++++++++++ .../ethernet/microchip/sparx5/sparx5_main.c | 23 +- .../ethernet/microchip/sparx5/sparx5_main.h | 69 ++ .../ethernet/microchip/sparx5/sparx5_packet.c | 13 +- .../ethernet/microchip/sparx5/sparx5_port.c | 2 +- .../ethernet/microchip/sparx5/sparx5_port.h | 1 + 8 files changed, 696 insertions(+), 12 deletions(-) create mode 100644 drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c