Message ID | 20210901094153.227671-6-clg@kaod.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | ppc: cleanups | expand |
On Wed, Sep 01, 2021 at 11:41:50AM +0200, Cédric Le Goater wrote: > Signed-off-by: Cédric Le Goater <clg@kaod.org> Uh.. I thought the proposed assert was about making it clear there wouldn't be a divide by zero, which would want > 1, not < 2. > --- > hw/ppc/pnv.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index a62e90b15e27..761b82be7401 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -723,6 +723,8 @@ static uint64_t pnv_chip_get_ram_size(PnvMachineState *pnv, int chip_id) > return QEMU_ALIGN_DOWN(ram_per_chip, 1 * MiB); > } > > + assert(pnv->num_chips < 2); > + > ram_per_chip = (machine->ram_size - 1 * GiB) / (pnv->num_chips - 1); > return chip_id == 0 ? 1 * GiB : QEMU_ALIGN_DOWN(ram_per_chip, 1 * MiB); > }
On 9/2/21 3:37 AM, David Gibson wrote: > On Wed, Sep 01, 2021 at 11:41:50AM +0200, Cédric Le Goater wrote: >> Signed-off-by: Cédric Le Goater <clg@kaod.org> > > Uh.. I thought the proposed assert was about making it clear there > wouldn't be a divide by zero, which would want > 1, not < 2. This is very wrong :) How did I come with this ? I will keep it for the next round of powernv10. Are you ready for a v2 ? Thanks, C.
On Thu, Sep 02, 2021 at 08:28:49AM +0200, Cédric Le Goater wrote: > On 9/2/21 3:37 AM, David Gibson wrote: > > On Wed, Sep 01, 2021 at 11:41:50AM +0200, Cédric Le Goater wrote: > >> Signed-off-by: Cédric Le Goater <clg@kaod.org> > > > > Uh.. I thought the proposed assert was about making it clear there > > wouldn't be a divide by zero, which would want > 1, not < 2. > > This is very wrong :) How did I come with this ? > > I will keep it for the next round of powernv10. Are you ready for a > v2 ? Ready enough.
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index a62e90b15e27..761b82be7401 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -723,6 +723,8 @@ static uint64_t pnv_chip_get_ram_size(PnvMachineState *pnv, int chip_id) return QEMU_ALIGN_DOWN(ram_per_chip, 1 * MiB); } + assert(pnv->num_chips < 2); + ram_per_chip = (machine->ram_size - 1 * GiB) / (pnv->num_chips - 1); return chip_id == 0 ? 1 * GiB : QEMU_ALIGN_DOWN(ram_per_chip, 1 * MiB); }
Signed-off-by: Cédric Le Goater <clg@kaod.org> --- hw/ppc/pnv.c | 2 ++ 1 file changed, 2 insertions(+)