Message ID | 20210806134109.1182235-3-james.clark@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Support ETE decoding | expand |
On Fri, Aug 06, 2021 at 02:41:02PM +0100, James Clark wrote: > Currently the architecture is hard coded as ARCH_V8, but from ETMv4.4 > onwards this should be ARCH_AA64. > > Signed-off-by: James Clark <james.clark@arm.com> > --- > tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > index 187c038caa19..787b19642e78 100644 > --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > @@ -126,6 +126,20 @@ static int cs_etm_decoder__gen_etmv3_config(struct cs_etm_trace_params *params, > return 0; > } > > +#define TRCIDR1_TRCARCHMIN_SHIFT 4 > +#define TRCIDR1_TRCARCHMIN_MASK GENMASK(7, 4) > +#define TRCIDR1_TRCARCHMIN(x) (((x) & TRCIDR1_TRCARCHMIN_MASK) >> TRCIDR1_TRCARCHMIN_SHIFT) > +static enum _ocsd_arch_version cs_etm_decoder__get_etmv4_arch_ver(u32 reg_idr1) > +{ > + /* > + * For ETMv4 if the trace minor version is 4 or more then we can assume > + * the architecture is ARCH_AA64 rather than just V8. > + * ARCH_V8 = V8 architecture > + * ARCH_AA64 = Min v8r3 plus additional AA64 PE features > + */ > + return TRCIDR1_TRCARCHMIN(reg_idr1) >= 4 ? ARCH_AA64 : ARCH_V8; > +} > + > static void cs_etm_decoder__gen_etmv4_config(struct cs_etm_trace_params *params, > ocsd_etmv4_cfg *config) > { > @@ -140,7 +154,7 @@ static void cs_etm_decoder__gen_etmv4_config(struct cs_etm_trace_params *params, > config->reg_idr11 = 0; > config->reg_idr12 = 0; > config->reg_idr13 = 0; > - config->arch_ver = ARCH_V8; > + config->arch_ver = cs_etm_decoder__get_etmv4_arch_ver(params->etmv4.reg_idr1); > config->core_prof = profile_CortexA; > } Reviewed-by: Leo Yan <leo.yan@linaro.org> > > -- > 2.28.0 >
On 06/08/2021 14:41, James Clark wrote: > Currently the architecture is hard coded as ARCH_V8, but from ETMv4.4 > onwards this should be ARCH_AA64. > > Signed-off-by: James Clark <james.clark@arm.com> > --- > tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 16 +++++++++++++++- > 1 file changed, 15 insertions(+), 1 deletion(-) > > diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > index 187c038caa19..787b19642e78 100644 > --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > @@ -126,6 +126,20 @@ static int cs_etm_decoder__gen_etmv3_config(struct cs_etm_trace_params *params, > return 0; > } > > +#define TRCIDR1_TRCARCHMIN_SHIFT 4 > +#define TRCIDR1_TRCARCHMIN_MASK GENMASK(7, 4) > +#define TRCIDR1_TRCARCHMIN(x) (((x) & TRCIDR1_TRCARCHMIN_MASK) >> TRCIDR1_TRCARCHMIN_SHIFT) minor nit: Please add a blank line here > +static enum _ocsd_arch_version cs_etm_decoder__get_etmv4_arch_ver(u32 reg_idr1) > +{ > + /* > + * For ETMv4 if the trace minor version is 4 or more then we can assume > + * the architecture is ARCH_AA64 rather than just V8. > + * ARCH_V8 = V8 architecture > + * ARCH_AA64 = Min v8r3 plus additional AA64 PE features Does this need to be >= 3 then, to be accurate ? The comment "reads", minimum v8.3 and any additional features. Otherwise looks good to me. Suzuki
Em Fri, Sep 03, 2021 at 09:55:37AM +0100, Suzuki K Poulose escreveu: > On 06/08/2021 14:41, James Clark wrote: > > Currently the architecture is hard coded as ARCH_V8, but from ETMv4.4 > > onwards this should be ARCH_AA64. > > > > Signed-off-by: James Clark <james.clark@arm.com> > > --- > > tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 16 +++++++++++++++- > > 1 file changed, 15 insertions(+), 1 deletion(-) > > > > diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > index 187c038caa19..787b19642e78 100644 > > --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > @@ -126,6 +126,20 @@ static int cs_etm_decoder__gen_etmv3_config(struct cs_etm_trace_params *params, > > return 0; > > } > > +#define TRCIDR1_TRCARCHMIN_SHIFT 4 > > +#define TRCIDR1_TRCARCHMIN_MASK GENMASK(7, 4) > > +#define TRCIDR1_TRCARCHMIN(x) (((x) & TRCIDR1_TRCARCHMIN_MASK) >> TRCIDR1_TRCARCHMIN_SHIFT) > > minor nit: Please add a blank line here Fixed it > > +static enum _ocsd_arch_version cs_etm_decoder__get_etmv4_arch_ver(u32 reg_idr1) > > +{ > > + /* > > + * For ETMv4 if the trace minor version is 4 or more then we can assume > > + * the architecture is ARCH_AA64 rather than just V8. > > + * ARCH_V8 = V8 architecture > > + * ARCH_AA64 = Min v8r3 plus additional AA64 PE features > > Does this need to be >= 3 then, to be accurate ? > > The comment "reads", minimum v8.3 and any additional features. > > Otherwise looks good to me. Didn't have enough coffee, I think, can you please provide this as a patch? :) - Arnaldo
On Fri, 3 Sept 2021 at 12:07, Arnaldo Carvalho de Melo <acme@kernel.org> wrote: > > Em Fri, Sep 03, 2021 at 09:55:37AM +0100, Suzuki K Poulose escreveu: > > On 06/08/2021 14:41, James Clark wrote: > > > Currently the architecture is hard coded as ARCH_V8, but from ETMv4.4 > > > onwards this should be ARCH_AA64. > > > > > > Signed-off-by: James Clark <james.clark@arm.com> > > > --- > > > tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 16 +++++++++++++++- > > > 1 file changed, 15 insertions(+), 1 deletion(-) > > > > > > diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > > index 187c038caa19..787b19642e78 100644 > > > --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > > +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c > > > @@ -126,6 +126,20 @@ static int cs_etm_decoder__gen_etmv3_config(struct cs_etm_trace_params *params, > > > return 0; > > > } > > > +#define TRCIDR1_TRCARCHMIN_SHIFT 4 > > > +#define TRCIDR1_TRCARCHMIN_MASK GENMASK(7, 4) > > > +#define TRCIDR1_TRCARCHMIN(x) (((x) & TRCIDR1_TRCARCHMIN_MASK) >> TRCIDR1_TRCARCHMIN_SHIFT) > > > > minor nit: Please add a blank line here > > Fixed it > > > > +static enum _ocsd_arch_version cs_etm_decoder__get_etmv4_arch_ver(u32 reg_idr1) > > > +{ > > > + /* > > > + * For ETMv4 if the trace minor version is 4 or more then we can assume > > > + * the architecture is ARCH_AA64 rather than just V8. > > > + * ARCH_V8 = V8 architecture > > > + * ARCH_AA64 = Min v8r3 plus additional AA64 PE features > > > > Does this need to be >= 3 then, to be accurate ? > > > > The comment "reads", minimum v8.3 and any additional features. > > > > Otherwise looks good to me. > Behaviour correctly matches OpenCSD decoder requirements. Reviewed-by: Mike Leach <mike.leach@linaro.org> > Didn't have enough coffee, I think, can you please provide this as a > patch? :) > > - Arnaldo -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c index 187c038caa19..787b19642e78 100644 --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c @@ -126,6 +126,20 @@ static int cs_etm_decoder__gen_etmv3_config(struct cs_etm_trace_params *params, return 0; } +#define TRCIDR1_TRCARCHMIN_SHIFT 4 +#define TRCIDR1_TRCARCHMIN_MASK GENMASK(7, 4) +#define TRCIDR1_TRCARCHMIN(x) (((x) & TRCIDR1_TRCARCHMIN_MASK) >> TRCIDR1_TRCARCHMIN_SHIFT) +static enum _ocsd_arch_version cs_etm_decoder__get_etmv4_arch_ver(u32 reg_idr1) +{ + /* + * For ETMv4 if the trace minor version is 4 or more then we can assume + * the architecture is ARCH_AA64 rather than just V8. + * ARCH_V8 = V8 architecture + * ARCH_AA64 = Min v8r3 plus additional AA64 PE features + */ + return TRCIDR1_TRCARCHMIN(reg_idr1) >= 4 ? ARCH_AA64 : ARCH_V8; +} + static void cs_etm_decoder__gen_etmv4_config(struct cs_etm_trace_params *params, ocsd_etmv4_cfg *config) { @@ -140,7 +154,7 @@ static void cs_etm_decoder__gen_etmv4_config(struct cs_etm_trace_params *params, config->reg_idr11 = 0; config->reg_idr12 = 0; config->reg_idr13 = 0; - config->arch_ver = ARCH_V8; + config->arch_ver = cs_etm_decoder__get_etmv4_arch_ver(params->etmv4.reg_idr1); config->core_prof = profile_CortexA; }
Currently the architecture is hard coded as ARCH_V8, but from ETMv4.4 onwards this should be ARCH_AA64. Signed-off-by: James Clark <james.clark@arm.com> --- tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)