Message ID | 20210908111337.v2.2.If29cd838efbcee4450a62b8d84a99b23c86e0a3f@changeid (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2,1/3] clk: rockchip: rk3399: make CPU clocks critical | expand |
Hi, On Wed, Sep 8, 2021 at 11:14 AM Brian Norris <briannorris@chromium.org> wrote: > > We have DT IDs for PCLK_COREDBG_L and PCLK_COREDBG_B, but we don't > actually expose them. > > Note that this requires the previous patch (making "armclkl" and > "armclkb" into "critical" clocks) to prevent these clocks from taking > down the CPU. > > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> > Signed-off-by: Brian Norris <briannorris@chromium.org> > --- > > Changes in v2: > - Split "CPU clocks are critical" to a new patch, to make it more > obvious > > drivers/clk/rockchip/clk-rk3399.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Douglas Anderson <dianders@chromium.org>
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index 0ac9c72c4ee8..53ed5cca335b 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -481,7 +481,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { COMPOSITE_NOMUX(0, "atclk_core_l", "armclkl", CLK_IGNORE_UNUSED, RK3399_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY, RK3399_CLKGATE_CON(0), 5, GFLAGS), - COMPOSITE_NOMUX(0, "pclk_dbg_core_l", "armclkl", CLK_IGNORE_UNUSED, + COMPOSITE_NOMUX(PCLK_COREDBG_L, "pclk_dbg_core_l", "armclkl", CLK_IGNORE_UNUSED, RK3399_CLKSEL_CON(1), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY, RK3399_CLKGATE_CON(0), 6, GFLAGS), @@ -531,7 +531,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { GATE(ACLK_GIC_ADB400_CORE_B_2_GIC, "aclk_core_adb400_core_b_2_gic", "armclkb", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(14), 4, GFLAGS), - DIV(0, "pclken_dbg_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED, + DIV(PCLK_COREDBG_B, "pclken_dbg_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED, RK3399_CLKSEL_CON(3), 13, 2, DFLAGS | CLK_DIVIDER_READ_ONLY), GATE(0, "pclk_dbg_cxcs_pd_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,