| Message ID | 1631092255-25150-5-git-send-email-shengjiu.wang@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add remoteproc driver for DSP on i.MX | expand |
On Wed, Sep 8, 2021 at 12:39 PM Shengjiu Wang <shengjiu.wang@nxp.com> wrote: > > As there are two drivers for DSP on i.MX, one is for sound open > firmware, another is for remote processor framework. In order to > distinguish two kinds of driver, defining different compatible strings. > > For remote proc driver, the properties firmware-name and fsl,dsp-ctrl > are needed and the mailbox channel is different with SOF. > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Daniel Baluta <daniel.baluta@nxp.com> > --- > .../devicetree/bindings/dsp/fsl,dsp.yaml | 81 +++++++++++++++++-- > 1 file changed, 75 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > index 7afc9f2be13a..51ea657f6d42 100644 > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > @@ -8,6 +8,7 @@ title: NXP i.MX8 DSP core > > maintainers: > - Daniel Baluta <daniel.baluta@nxp.com> > + - Shengjiu Wang <shengjiu.wang@nxp.com> > > description: | > Some boards from i.MX8 family contain a DSP core used for > @@ -19,6 +20,10 @@ properties: > - fsl,imx8qxp-dsp > - fsl,imx8qm-dsp > - fsl,imx8mp-dsp > + - fsl,imx8qxp-hifi4 > + - fsl,imx8qm-hifi4 > + - fsl,imx8mp-hifi4 > + - fsl,imx8ulp-hifi4 > > reg: > maxItems: 1 > @@ -28,37 +33,63 @@ properties: > - description: ipg clock > - description: ocram clock > - description: core clock > + - description: debug interface clock > + - description: message unit clock > + minItems: 3 > + maxItems: 5 > > clock-names: > items: > - const: ipg > - const: ocram > - const: core > + - const: debug > + - const: mu > + minItems: 3 > + maxItems: 5 > > power-domains: > description: > List of phandle and PM domain specifier as documented in > Documentation/devicetree/bindings/power/power_domain.txt > + minItems: 1 > maxItems: 4 > > mboxes: > description: > List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB > + or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB > (see mailbox/fsl,mu.txt) > + minItems: 3 > maxItems: 4 > > mbox-names: > - items: > - - const: txdb0 > - - const: txdb1 > - - const: rxdb0 > - - const: rxdb1 > + oneOf: > + - items: > + - const: txdb0 > + - const: txdb1 > + - const: rxdb0 > + - const: rxdb1 > + - items: > + - const: tx > + - const: rx > + - const: rxdb > > memory-region: > description: > phandle to a node describing reserved memory (System RAM memory) > used by DSP (see bindings/reserved-memory/reserved-memory.txt) > - maxItems: 1 > + minItems: 1 > + maxItems: 4 > + > + firmware-name: > + description: | > + Default name of the firmware to load to the remote processor. > + > + fsl,dsp-ctrl: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle to syscon block which provide access for processor enablement > > required: > - compatible > @@ -91,3 +122,41 @@ examples: > mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; > memory-region = <&dsp_reserved>; > }; > + - | > + #include <dt-bindings/clock/imx8mp-clock.h> > + dsp_reserved: dsp@92400000 { > + reg = <0x92400000 0x1000000>; > + no-map; > + }; > + dsp_vdev0vring0: vdev0vring0@942f0000 { > + reg = <0x942f0000 0x8000>; > + no-map; > + }; > + dsp_vdev0vring1: vdev0vring1@942f8000 { > + reg = <0x942f8000 0x8000>; > + no-map; > + }; > + dsp_vdev0buffer: vdev0buffer@94300000 { > + compatible = "shared-dma-pool"; > + reg = <0x94300000 0x100000>; > + no-map; > + }; > + > + dsp: dsp@3b6e8000 { > + compatible = "fsl,imx8mp-hifi4"; > + reg = <0x3B6E8000 0x88000>; > + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, > + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>, > + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, > + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>; > + clock-names = "ipg", "ocram", "core", "debug"; > + firmware-name = "imx/dsp/hifi4.bin"; > + power-domains = <&audiomix_pd>; > + mbox-names = "tx", "rx", "rxdb"; > + mboxes = <&mu2 0 0>, > + <&mu2 1 0>, > + <&mu2 3 0>; > + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, > + <&dsp_vdev0vring1>, <&dsp_reserved>; > + fsl,dsp-ctrl = <&audio_blk_ctrl>; > + }; > -- > 2.17.1 >
On Wed, Sep 08, 2021 at 05:10:55PM +0800, Shengjiu Wang wrote: > As there are two drivers for DSP on i.MX, one is for sound open > firmware, another is for remote processor framework. In order to > distinguish two kinds of driver, defining different compatible strings. What determines which firmware is used? Is it tied to the board? Or for a given board, users could want different firmware? In the latter case, this configuration should not be in DT. > For remote proc driver, the properties firmware-name and fsl,dsp-ctrl > are needed and the mailbox channel is different with SOF. > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > --- > .../devicetree/bindings/dsp/fsl,dsp.yaml | 81 +++++++++++++++++-- > 1 file changed, 75 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > index 7afc9f2be13a..51ea657f6d42 100644 > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > @@ -8,6 +8,7 @@ title: NXP i.MX8 DSP core > > maintainers: > - Daniel Baluta <daniel.baluta@nxp.com> > + - Shengjiu Wang <shengjiu.wang@nxp.com> > > description: | > Some boards from i.MX8 family contain a DSP core used for > @@ -19,6 +20,10 @@ properties: > - fsl,imx8qxp-dsp > - fsl,imx8qm-dsp > - fsl,imx8mp-dsp > + - fsl,imx8qxp-hifi4 > + - fsl,imx8qm-hifi4 > + - fsl,imx8mp-hifi4 > + - fsl,imx8ulp-hifi4 > > reg: > maxItems: 1 > @@ -28,37 +33,63 @@ properties: > - description: ipg clock > - description: ocram clock > - description: core clock > + - description: debug interface clock > + - description: message unit clock > + minItems: 3 > + maxItems: 5 > > clock-names: > items: > - const: ipg > - const: ocram > - const: core > + - const: debug > + - const: mu > + minItems: 3 > + maxItems: 5 > > power-domains: > description: > List of phandle and PM domain specifier as documented in > Documentation/devicetree/bindings/power/power_domain.txt > + minItems: 1 > maxItems: 4 How does the same h/w have different number of power domains? > > mboxes: > description: > List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB > + or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB > (see mailbox/fsl,mu.txt) > + minItems: 3 > maxItems: 4 > > mbox-names: > - items: > - - const: txdb0 > - - const: txdb1 > - - const: rxdb0 > - - const: rxdb1 > + oneOf: > + - items: > + - const: txdb0 > + - const: txdb1 > + - const: rxdb0 > + - const: rxdb1 > + - items: > + - const: tx > + - const: rx > + - const: rxdb These are completely different mailboxes? > > memory-region: > description: > phandle to a node describing reserved memory (System RAM memory) > used by DSP (see bindings/reserved-memory/reserved-memory.txt) > - maxItems: 1 > + minItems: 1 > + maxItems: 4 > + > + firmware-name: > + description: | > + Default name of the firmware to load to the remote processor. > + > + fsl,dsp-ctrl: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle to syscon block which provide access for processor enablement Curious, how is this done with the open sound f/w? > > required: > - compatible > @@ -91,3 +122,41 @@ examples: > mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; > memory-region = <&dsp_reserved>; > }; > + - | > + #include <dt-bindings/clock/imx8mp-clock.h> > + dsp_reserved: dsp@92400000 { > + reg = <0x92400000 0x1000000>; > + no-map; > + }; > + dsp_vdev0vring0: vdev0vring0@942f0000 { > + reg = <0x942f0000 0x8000>; > + no-map; > + }; > + dsp_vdev0vring1: vdev0vring1@942f8000 { > + reg = <0x942f8000 0x8000>; > + no-map; > + }; > + dsp_vdev0buffer: vdev0buffer@94300000 { > + compatible = "shared-dma-pool"; > + reg = <0x94300000 0x100000>; > + no-map; > + }; > + > + dsp: dsp@3b6e8000 { > + compatible = "fsl,imx8mp-hifi4"; > + reg = <0x3B6E8000 0x88000>; > + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, > + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>, > + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, > + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>; > + clock-names = "ipg", "ocram", "core", "debug"; > + firmware-name = "imx/dsp/hifi4.bin"; > + power-domains = <&audiomix_pd>; > + mbox-names = "tx", "rx", "rxdb"; > + mboxes = <&mu2 0 0>, > + <&mu2 1 0>, > + <&mu2 3 0>; > + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, > + <&dsp_vdev0vring1>, <&dsp_reserved>; > + fsl,dsp-ctrl = <&audio_blk_ctrl>; > + }; > -- > 2.17.1 > >
Hi Rob On Sat, Sep 11, 2021 at 5:43 AM Rob Herring <robh@kernel.org> wrote: > > On Wed, Sep 08, 2021 at 05:10:55PM +0800, Shengjiu Wang wrote: > > As there are two drivers for DSP on i.MX, one is for sound open > > firmware, another is for remote processor framework. In order to > > distinguish two kinds of driver, defining different compatible strings. > > What determines which firmware is used? Is it tied to the board? Or for > a given board, users could want different firmware? In the latter case, > this configuration should not be in DT. The compatible string determines which firmware is used. For a given board, users could want different firmware, then need to reboot the kernel and switch to another DTB. > > > For remote proc driver, the properties firmware-name and fsl,dsp-ctrl > > are needed and the mailbox channel is different with SOF. > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > > --- > > .../devicetree/bindings/dsp/fsl,dsp.yaml | 81 +++++++++++++++++-- > > 1 file changed, 75 insertions(+), 6 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > index 7afc9f2be13a..51ea657f6d42 100644 > > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > @@ -8,6 +8,7 @@ title: NXP i.MX8 DSP core > > > > maintainers: > > - Daniel Baluta <daniel.baluta@nxp.com> > > + - Shengjiu Wang <shengjiu.wang@nxp.com> > > > > description: | > > Some boards from i.MX8 family contain a DSP core used for > > @@ -19,6 +20,10 @@ properties: > > - fsl,imx8qxp-dsp > > - fsl,imx8qm-dsp > > - fsl,imx8mp-dsp > > + - fsl,imx8qxp-hifi4 > > + - fsl,imx8qm-hifi4 > > + - fsl,imx8mp-hifi4 > > + - fsl,imx8ulp-hifi4 > > > > reg: > > maxItems: 1 > > @@ -28,37 +33,63 @@ properties: > > - description: ipg clock > > - description: ocram clock > > - description: core clock > > + - description: debug interface clock > > + - description: message unit clock > > + minItems: 3 > > + maxItems: 5 > > > > clock-names: > > items: > > - const: ipg > > - const: ocram > > - const: core > > + - const: debug > > + - const: mu > > + minItems: 3 > > + maxItems: 5 > > > > power-domains: > > description: > > List of phandle and PM domain specifier as documented in > > Documentation/devicetree/bindings/power/power_domain.txt > > + minItems: 1 > > maxItems: 4 > > How does the same h/w have different number of power domains? For different SoC, the integration is different, on i.MX8QM/8QXP, there are 4 power-domains for DSP, but on i.MX8MP, there are 1 power-domain. > > > > > mboxes: > > description: > > List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB > > + or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB > > (see mailbox/fsl,mu.txt) > > + minItems: 3 > > maxItems: 4 > > > > mbox-names: > > - items: > > - - const: txdb0 > > - - const: txdb1 > > - - const: rxdb0 > > - - const: rxdb1 > > + oneOf: > > + - items: > > + - const: txdb0 > > + - const: txdb1 > > + - const: rxdb0 > > + - const: rxdb1 > > + - items: > > + - const: tx > > + - const: rx > > + - const: rxdb > > These are completely different mailboxes? It is the same mailbox, for this mailbox, there are 16 channels (4 for tx, 4 for rx, 4 for txdb, 4 for rxdb). For sound open firmware and remoteproc firmware, they use different mailbox channels. > > > > > memory-region: > > description: > > phandle to a node describing reserved memory (System RAM memory) > > used by DSP (see bindings/reserved-memory/reserved-memory.txt) > > - maxItems: 1 > > + minItems: 1 > > + maxItems: 4 > > + > > + firmware-name: > > + description: | > > + Default name of the firmware to load to the remote processor. > > + > > + fsl,dsp-ctrl: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: > > + Phandle to syscon block which provide access for processor enablement > > Curious, how is this done with the open sound f/w? Currently the code for this in sound open firmware is not upsteamed, I think this phandle is also applied for sound open firmware. By the way, Should I separate the change of this file from this patch series? Does it belong to your linux tree? Best Regards Wang Shengjiu
On Sun, 12 Sept 2021 at 20:50, Shengjiu Wang <shengjiu.wang@gmail.com> wrote: > > Hi Rob > > On Sat, Sep 11, 2021 at 5:43 AM Rob Herring <robh@kernel.org> wrote: > > > > On Wed, Sep 08, 2021 at 05:10:55PM +0800, Shengjiu Wang wrote: > > > As there are two drivers for DSP on i.MX, one is for sound open > > > firmware, another is for remote processor framework. In order to > > > distinguish two kinds of driver, defining different compatible strings. > > > > What determines which firmware is used? Is it tied to the board? Or for > > a given board, users could want different firmware? In the latter case, > > this configuration should not be in DT. > > The compatible string determines which firmware is used. > For a given board, users could want different firmware, then need > to reboot the kernel and switch to another DTB. > > > > > > For remote proc driver, the properties firmware-name and fsl,dsp-ctrl > > > are needed and the mailbox channel is different with SOF. > > > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > > > --- > > > .../devicetree/bindings/dsp/fsl,dsp.yaml | 81 +++++++++++++++++-- > > > 1 file changed, 75 insertions(+), 6 deletions(-) > > > > > > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > > index 7afc9f2be13a..51ea657f6d42 100644 > > > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > > @@ -8,6 +8,7 @@ title: NXP i.MX8 DSP core > > > > > > maintainers: > > > - Daniel Baluta <daniel.baluta@nxp.com> > > > + - Shengjiu Wang <shengjiu.wang@nxp.com> > > > > > > description: | > > > Some boards from i.MX8 family contain a DSP core used for > > > @@ -19,6 +20,10 @@ properties: > > > - fsl,imx8qxp-dsp > > > - fsl,imx8qm-dsp > > > - fsl,imx8mp-dsp > > > + - fsl,imx8qxp-hifi4 > > > + - fsl,imx8qm-hifi4 > > > + - fsl,imx8mp-hifi4 > > > + - fsl,imx8ulp-hifi4 > > > > > > reg: > > > maxItems: 1 > > > @@ -28,37 +33,63 @@ properties: > > > - description: ipg clock > > > - description: ocram clock > > > - description: core clock > > > + - description: debug interface clock > > > + - description: message unit clock > > > + minItems: 3 > > > + maxItems: 5 > > > > > > clock-names: > > > items: > > > - const: ipg > > > - const: ocram > > > - const: core > > > + - const: debug > > > + - const: mu > > > + minItems: 3 > > > + maxItems: 5 > > > > > > power-domains: > > > description: > > > List of phandle and PM domain specifier as documented in > > > Documentation/devicetree/bindings/power/power_domain.txt > > > + minItems: 1 > > > maxItems: 4 > > > > How does the same h/w have different number of power domains? > > For different SoC, the integration is different, on i.MX8QM/8QXP, there are > 4 power-domains for DSP, but on i.MX8MP, there are 1 power-domain. > > > > > > > > > mboxes: > > > description: > > > List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB > > > + or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB > > > (see mailbox/fsl,mu.txt) > > > + minItems: 3 > > > maxItems: 4 > > > > > > mbox-names: > > > - items: > > > - - const: txdb0 > > > - - const: txdb1 > > > - - const: rxdb0 > > > - - const: rxdb1 > > > + oneOf: > > > + - items: > > > + - const: txdb0 > > > + - const: txdb1 > > > + - const: rxdb0 > > > + - const: rxdb1 > > > + - items: > > > + - const: tx > > > + - const: rx > > > + - const: rxdb > > > > These are completely different mailboxes? > > It is the same mailbox, for this mailbox, there are 16 channels > (4 for tx, 4 for rx, 4 for txdb, 4 for rxdb). > For sound open firmware and remoteproc firmware, they > use different mailbox channels. > > > > > > > > > memory-region: > > > description: > > > phandle to a node describing reserved memory (System RAM memory) > > > used by DSP (see bindings/reserved-memory/reserved-memory.txt) > > > - maxItems: 1 > > > + minItems: 1 > > > + maxItems: 4 > > > + > > > + firmware-name: > > > + description: | > > > + Default name of the firmware to load to the remote processor. > > > + > > > + fsl,dsp-ctrl: > > > + $ref: /schemas/types.yaml#/definitions/phandle > > > + description: > > > + Phandle to syscon block which provide access for processor enablement > > > > Curious, how is this done with the open sound f/w? > > Currently the code for this in sound open firmware is not upsteamed, > I think this phandle is also applied for sound open firmware. > > By the way, Should I separate the change of this file from this > patch series? Does it belong to your linux tree? Please keep the patches together. Once Rob acks the bindings, patches in this series will be picked up in the remoteproc tree. Thanks, Mathieu > > > Best Regards > Wang Shengjiu
On Sat, Sep 11, 2021 at 12:45 AM Rob Herring <robh@kernel.org> wrote: > > On Wed, Sep 08, 2021 at 05:10:55PM +0800, Shengjiu Wang wrote: > > As there are two drivers for DSP on i.MX, one is for sound open > > firmware, another is for remote processor framework. In order to > > distinguish two kinds of driver, defining different compatible strings. > > What determines which firmware is used? Is it tied to the board? Or for > a given board, users could want different firmware? In the latter case, > this configuration should not be in DT. > > > For remote proc driver, the properties firmware-name and fsl,dsp-ctrl > > are needed and the mailbox channel is different with SOF. > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > > --- > > .../devicetree/bindings/dsp/fsl,dsp.yaml | 81 +++++++++++++++++-- > > 1 file changed, 75 insertions(+), 6 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > index 7afc9f2be13a..51ea657f6d42 100644 > > --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > @@ -8,6 +8,7 @@ title: NXP i.MX8 DSP core > > > > maintainers: > > - Daniel Baluta <daniel.baluta@nxp.com> > > + - Shengjiu Wang <shengjiu.wang@nxp.com> > > > > description: | > > Some boards from i.MX8 family contain a DSP core used for > > @@ -19,6 +20,10 @@ properties: > > - fsl,imx8qxp-dsp > > - fsl,imx8qm-dsp > > - fsl,imx8mp-dsp > > + - fsl,imx8qxp-hifi4 > > + - fsl,imx8qm-hifi4 > > + - fsl,imx8mp-hifi4 > > + - fsl,imx8ulp-hifi4 > > > > reg: > > maxItems: 1 > > @@ -28,37 +33,63 @@ properties: > > - description: ipg clock > > - description: ocram clock > > - description: core clock > > + - description: debug interface clock > > + - description: message unit clock > > + minItems: 3 > > + maxItems: 5 > > > > clock-names: > > items: > > - const: ipg > > - const: ocram > > - const: core > > + - const: debug > > + - const: mu > > + minItems: 3 > > + maxItems: 5 > > > > power-domains: > > description: > > List of phandle and PM domain specifier as documented in > > Documentation/devicetree/bindings/power/power_domain.txt > > + minItems: 1 > > maxItems: 4 > > How does the same h/w have different number of power domains? > > > > > mboxes: > > description: > > List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB > > + or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB > > (see mailbox/fsl,mu.txt) > > + minItems: 3 > > maxItems: 4 > > > > mbox-names: > > - items: > > - - const: txdb0 > > - - const: txdb1 > > - - const: rxdb0 > > - - const: rxdb1 > > + oneOf: > > + - items: > > + - const: txdb0 > > + - const: txdb1 > > + - const: rxdb0 > > + - const: rxdb1 > > + - items: > > + - const: tx > > + - const: rx > > + - const: rxdb > > These are completely different mailboxes? > > > > > memory-region: > > description: > > phandle to a node describing reserved memory (System RAM memory) > > used by DSP (see bindings/reserved-memory/reserved-memory.txt) > > - maxItems: 1 > > + minItems: 1 > > + maxItems: 4 > > + > > + firmware-name: > > + description: | > > + Default name of the firmware to load to the remote processor. > > + > > + fsl,dsp-ctrl: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: > > + Phandle to syscon block which provide access for processor enablement > > Curious, how is this done with the open sound f/w? Hi Rob, Should be the same story. Here is the PR sent for review with Sound Open Firmware (SOF): https://github.com/thesofproject/linux/pull/3156 The only difference is that SOF uses: syscon_regmap_lookup_by_compatible while remoteproc driver uses syscon_regmap_lookup_by_phandle. thanks, Daniel.
diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml index 7afc9f2be13a..51ea657f6d42 100644 --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml @@ -8,6 +8,7 @@ title: NXP i.MX8 DSP core maintainers: - Daniel Baluta <daniel.baluta@nxp.com> + - Shengjiu Wang <shengjiu.wang@nxp.com> description: | Some boards from i.MX8 family contain a DSP core used for @@ -19,6 +20,10 @@ properties: - fsl,imx8qxp-dsp - fsl,imx8qm-dsp - fsl,imx8mp-dsp + - fsl,imx8qxp-hifi4 + - fsl,imx8qm-hifi4 + - fsl,imx8mp-hifi4 + - fsl,imx8ulp-hifi4 reg: maxItems: 1 @@ -28,37 +33,63 @@ properties: - description: ipg clock - description: ocram clock - description: core clock + - description: debug interface clock + - description: message unit clock + minItems: 3 + maxItems: 5 clock-names: items: - const: ipg - const: ocram - const: core + - const: debug + - const: mu + minItems: 3 + maxItems: 5 power-domains: description: List of phandle and PM domain specifier as documented in Documentation/devicetree/bindings/power/power_domain.txt + minItems: 1 maxItems: 4 mboxes: description: List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB + or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB (see mailbox/fsl,mu.txt) + minItems: 3 maxItems: 4 mbox-names: - items: - - const: txdb0 - - const: txdb1 - - const: rxdb0 - - const: rxdb1 + oneOf: + - items: + - const: txdb0 + - const: txdb1 + - const: rxdb0 + - const: rxdb1 + - items: + - const: tx + - const: rx + - const: rxdb memory-region: description: phandle to a node describing reserved memory (System RAM memory) used by DSP (see bindings/reserved-memory/reserved-memory.txt) - maxItems: 1 + minItems: 1 + maxItems: 4 + + firmware-name: + description: | + Default name of the firmware to load to the remote processor. + + fsl,dsp-ctrl: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to syscon block which provide access for processor enablement required: - compatible @@ -91,3 +122,41 @@ examples: mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; memory-region = <&dsp_reserved>; }; + - | + #include <dt-bindings/clock/imx8mp-clock.h> + dsp_reserved: dsp@92400000 { + reg = <0x92400000 0x1000000>; + no-map; + }; + dsp_vdev0vring0: vdev0vring0@942f0000 { + reg = <0x942f0000 0x8000>; + no-map; + }; + dsp_vdev0vring1: vdev0vring1@942f8000 { + reg = <0x942f8000 0x8000>; + no-map; + }; + dsp_vdev0buffer: vdev0buffer@94300000 { + compatible = "shared-dma-pool"; + reg = <0x94300000 0x100000>; + no-map; + }; + + dsp: dsp@3b6e8000 { + compatible = "fsl,imx8mp-hifi4"; + reg = <0x3B6E8000 0x88000>; + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>, + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, + <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>; + clock-names = "ipg", "ocram", "core", "debug"; + firmware-name = "imx/dsp/hifi4.bin"; + power-domains = <&audiomix_pd>; + mbox-names = "tx", "rx", "rxdb"; + mboxes = <&mu2 0 0>, + <&mu2 1 0>, + <&mu2 3 0>; + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, + <&dsp_vdev0vring1>, <&dsp_reserved>; + fsl,dsp-ctrl = <&audio_blk_ctrl>; + };
As there are two drivers for DSP on i.MX, one is for sound open firmware, another is for remote processor framework. In order to distinguish two kinds of driver, defining different compatible strings. For remote proc driver, the properties firmware-name and fsl,dsp-ctrl are needed and the mailbox channel is different with SOF. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> --- .../devicetree/bindings/dsp/fsl,dsp.yaml | 81 +++++++++++++++++-- 1 file changed, 75 insertions(+), 6 deletions(-)