diff mbox series

[1/2] x86: Rename TIF_ADDR32 to TIF_32BIT

Message ID 20210921110252.2593542-2-sxwjean@me.com (mailing list archive)
State New
Headers show
Series Use generic code for virtual address of randomization of x86 | expand

Commit Message

Xiongwei Song Sept. 21, 2021, 11:02 a.m. UTC
From: Xiongwei Song <sxwjean@gmail.com>

In arm64 or powerpc or sparc, the 32 bits process in 64 bits kernel is set
flag TIF_32BIT. However in x86, that flag name is TIF_ADDR32. This patch
makes the flag name in x86 same as other archs.

Signed-off-by: Xiongwei Song <sxwjean@gmail.com>
---
 arch/x86/include/asm/elf.h           | 2 +-
 arch/x86/include/asm/page_64_types.h | 6 +++---
 arch/x86/include/asm/thread_info.h   | 4 ++--
 arch/x86/kernel/process_64.c         | 4 ++--
 4 files changed, 8 insertions(+), 8 deletions(-)

Comments

Peter Zijlstra Sept. 21, 2021, 11:50 a.m. UTC | #1
On Tue, Sep 21, 2021 at 07:02:51PM +0800, sxwjean@me.com wrote:
> From: Xiongwei Song <sxwjean@gmail.com>
> 
> In arm64 or powerpc or sparc, the 32 bits process in 64 bits kernel is set
> flag TIF_32BIT. However in x86, that flag name is TIF_ADDR32. This patch
> makes the flag name in x86 same as other archs.

x86 is fundamentally different here, the TIF flag does not say (nor can
it) anything about the bitness of the code running. On x86_64 a 64bit
process can run 32bit code without the kernel necessarily knowing
anything about it.

The only thing it does it limit the address range, and as such the name
is correct.
Xiongwei Song Sept. 21, 2021, 2:13 p.m. UTC | #2
> On Sep 21, 2021, at 7:50 PM, Peter Zijlstra <peterz@infradead.org> wrote:
> 
> On Tue, Sep 21, 2021 at 07:02:51PM +0800, sxwjean@me.com wrote:
>> From: Xiongwei Song <sxwjean@gmail.com>
>> 
>> In arm64 or powerpc or sparc, the 32 bits process in 64 bits kernel is set
>> flag TIF_32BIT. However in x86, that flag name is TIF_ADDR32. This patch
>> makes the flag name in x86 same as other archs.
> 
> x86 is fundamentally different here, the TIF flag does not say (nor can
> it) anything about the bitness of the code running. On x86_64 a 64bit
> process can run 32bit code without the kernel necessarily knowing
> anything about it.
> 
> The only thing it does it limit the address range, and as such the name
> is correct.
> 
Hi Peter,

Thanks for your comments. But I missed email addresses for patch 1 and 2. 
I will resend the patches.

Regards,
Xiongwei
diff mbox series

Patch

diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 29fea180a665..aa6ae2bc20bd 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -322,7 +322,7 @@  static inline int mmap_is_ia32(void)
 {
 	return IS_ENABLED(CONFIG_X86_32) ||
 	       (IS_ENABLED(CONFIG_COMPAT) &&
-		test_thread_flag(TIF_ADDR32));
+		test_thread_flag(TIF_32BIT));
 }
 
 extern unsigned long task_size_32bit(void);
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
index a8d4ad856568..f4631bee9119 100644
--- a/arch/x86/include/asm/page_64_types.h
+++ b/arch/x86/include/asm/page_64_types.h
@@ -70,11 +70,11 @@ 
 #define IA32_PAGE_OFFSET	((current->personality & ADDR_LIMIT_3GB) ? \
 					0xc0000000 : 0xFFFFe000)
 
-#define TASK_SIZE_LOW		(test_thread_flag(TIF_ADDR32) ? \
+#define TASK_SIZE_LOW		(test_thread_flag(TIF_32BIT) ? \
 					IA32_PAGE_OFFSET : DEFAULT_MAP_WINDOW)
-#define TASK_SIZE		(test_thread_flag(TIF_ADDR32) ? \
+#define TASK_SIZE		(test_thread_flag(TIF_32BIT) ? \
 					IA32_PAGE_OFFSET : TASK_SIZE_MAX)
-#define TASK_SIZE_OF(child)	((test_tsk_thread_flag(child, TIF_ADDR32)) ? \
+#define TASK_SIZE_OF(child)	((test_tsk_thread_flag(child, TIF_32BIT)) ? \
 					IA32_PAGE_OFFSET : TASK_SIZE_MAX)
 
 #define STACK_TOP		TASK_SIZE_LOW
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index cf132663c219..9e768e7714cc 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -97,7 +97,7 @@  struct thread_info {
 #define TIF_FORCED_TF		24	/* true if TF in eflags artificially */
 #define TIF_BLOCKSTEP		25	/* set when we want DEBUGCTLMSR_BTF */
 #define TIF_LAZY_MMU_UPDATES	27	/* task is updating the mmu lazily */
-#define TIF_ADDR32		29	/* 32-bit address space on 64 bits */
+#define TIF_32BIT		29	/* 32-bit address space on 64 bits */
 
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
@@ -120,7 +120,7 @@  struct thread_info {
 #define _TIF_FORCED_TF		(1 << TIF_FORCED_TF)
 #define _TIF_BLOCKSTEP		(1 << TIF_BLOCKSTEP)
 #define _TIF_LAZY_MMU_UPDATES	(1 << TIF_LAZY_MMU_UPDATES)
-#define _TIF_ADDR32		(1 << TIF_ADDR32)
+#define _TIF_32BIT		(1 << TIF_32BIT)
 
 /* flags to check in __switch_to() */
 #define _TIF_WORK_CTXSW_BASE					\
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index ec0d836a13b1..a8a94f87548f 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -666,7 +666,7 @@  void set_personality_64bit(void)
 	/* inherit personality from parent */
 
 	/* Make sure to be in 64bit mode */
-	clear_thread_flag(TIF_ADDR32);
+	clear_thread_flag(TIF_32BIT);
 	/* Pretend that this comes from a 64bit execve */
 	task_pt_regs(current)->orig_ax = __NR_execve;
 	current_thread_info()->status &= ~TS_COMPAT;
@@ -721,7 +721,7 @@  static void __set_personality_ia32(void)
 void set_personality_ia32(bool x32)
 {
 	/* Make sure to be in 32bit mode */
-	set_thread_flag(TIF_ADDR32);
+	set_thread_flag(TIF_32BIT);
 
 	if (x32)
 		__set_personality_x32();